gem5/python/m5
Ali Saidi c27c122afc Add the bus and connector objects to scons
change getPort parameter from char* to string
Add an extra phase between construction and init called connect

SConscript:
    Add the bus and connector objects to scons
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    the connection to memory shouldn't be made until we know the memory
    object exists (e.g. after construction)
dev/io_device.hh:
    change to const string
mem/bus.hh:
    change getPort parameter from char* to string
    initialize num_interfaces
mem/mem_object.hh:
    change getPort parameter from char* to string
mem/physical.cc:
mem/physical.hh:
    change getPort parameter from char* to string
    get rid of the bus object I created last time
python/m5/objects/PhysicalMemory.py:
    get rid of the bus object I created last time
sim/main.cc:
sim/sim_object.cc:
sim/sim_object.hh:
    Add an extra phase between construction and init called connect

--HG--
extra : convert_revision : 0e994f93374fa72a06d291655c440ff1b8e155a9
2006-03-26 21:44:22 -05:00
..
objects Add the bus and connector objects to scons 2006-03-26 21:44:22 -05:00
__init__.py Regression tests now run under scons! 2005-09-05 16:31:27 -04:00
config.py Actually, you should'nt do math on Clock in the config files. 2005-11-21 00:22:29 -05:00
convert.py Allow math on CheckedInt-derived ParamValue classes w/o 2005-11-01 14:11:54 -05:00
multidict.py Add licenses in python dir. 2005-06-05 01:57:57 -04:00
smartdict.py Add licenses in python dir. 2005-06-05 01:57:57 -04:00