7b40c36fbd
Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
19 lines
827 B
Plaintext
Executable file
19 lines
827 B
Plaintext
Executable file
M5 Simulator System
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Copyright (c) 2001-2008
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The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Apr 21 2009 18:38:50
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M5 revision e6dd09514462 6117 default qtip tip stats-update
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M5 started Apr 21 2009 18:39:20
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M5 executing on zizzer
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command line: build/SPARC_FS/m5.fast -d build/SPARC_FS/tests/fast/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re tests/run.py build/SPARC_FS/tests/fast/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic
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Global frequency set at 2000000000 ticks per second
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info: No kernel set for full system simulation. Assuming you know what you're doing...
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info: Entering event queue @ 0. Starting simulation...
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info: Ignoring write to SPARC ERROR regsiter
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info: Ignoring write to SPARC ERROR regsiter
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Exiting @ tick 2233777512 because m5_exit instruction encountered
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