29e34a739b
User script now invokes initialization and simulation loop after building configuration. These functions are exported from C++ to Python using SWIG. SConstruct: Set up SWIG builder & scanner. Set up symlinking of source files into build directory (by not disabling the default behavior). configs/test/test.py: Rewrite to use new script-driven interface. Include a sample option. src/SConscript: Set up symlinking of source files into build directory (by not disabling the default behavior). Add SWIG-generated main_wrap.cc to source list. src/arch/SConscript: Set up symlinking of source files into build directory (by not disabling the default behavior). src/arch/alpha/ev5.cc: src/arch/alpha/isa/decoder.isa: src/cpu/o3/alpha_cpu_impl.hh: src/cpu/trace/opt_cpu.cc: src/cpu/trace/trace_cpu.cc: src/sim/pseudo_inst.cc: src/sim/root.cc: src/sim/serialize.cc: src/sim/syscall_emul.cc: SimExit() is now exitSimLoop(). src/cpu/base.cc: SimExitEvent is now SimLoopExitEvent src/python/SConscript: Add SWIG build command for main.i. Use python/m5 in build dir as source for zip archive... easy now with file duplication enabled. src/python/m5/__init__.py: - Move copyright notice back to C++ so we can print it right away, even for interactive sessions. - Get rid of argument parsing code; just provide default option descriptors for user script to call optparse with. - Don't clutter m5 namespace by sucking in all of m5.config and m5.objects. - Move instantiate() function here from config.py. src/python/m5/config.py: - Move instantiate() function to __init__.py. - Param.Foo deferred type lookups must use m5.objects namespace now (not m5). src/python/m5/objects/AlphaConsole.py: src/python/m5/objects/AlphaFullCPU.py: src/python/m5/objects/AlphaTLB.py: src/python/m5/objects/BadDevice.py: src/python/m5/objects/BaseCPU.py: src/python/m5/objects/BaseCache.py: src/python/m5/objects/Bridge.py: src/python/m5/objects/Bus.py: src/python/m5/objects/CoherenceProtocol.py: src/python/m5/objects/Device.py: src/python/m5/objects/DiskImage.py: src/python/m5/objects/Ethernet.py: src/python/m5/objects/Ide.py: src/python/m5/objects/IntrControl.py: src/python/m5/objects/MemObject.py: src/python/m5/objects/MemTest.py: src/python/m5/objects/Pci.py: src/python/m5/objects/PhysicalMemory.py: src/python/m5/objects/Platform.py: src/python/m5/objects/Process.py: src/python/m5/objects/Repl.py: src/python/m5/objects/Root.py: src/python/m5/objects/SimConsole.py: src/python/m5/objects/SimpleDisk.py: src/python/m5/objects/System.py: src/python/m5/objects/Tsunami.py: src/python/m5/objects/Uart.py: Fix up imports (m5 namespace no longer includes m5.config). src/sim/eventq.cc: src/sim/eventq.hh: Support for Python-called simulate() function: - Use IsExitEvent flag to signal events that want to exit the simulation loop gracefully (instead of calling exit() to terminate the process). - Modify interface to hand exit event object back to caller so it can be inspected for cause. src/sim/host.hh: Add MaxTick constant. src/sim/main.cc: Move copyright notice back to C++ so we can print it right away, even for interactive sessions. Use PYTHONPATH environment var to set module path (instead of clunky code injection method). Move main control from here into Python: - Separate initialization code and simulation loop into separate functions callable from Python. - Make Python interpreter invocation more pure (more like directly invoking interpreter). Add -i and -p flags (only options on binary itself; other options processed by Python). Import readline package when using interactive mode. src/sim/sim_events.cc: SimExitEvent is now SimLoopExitEvent, and uses IsSimExit flag to terminate loop (instead of exiting simulator process). src/sim/sim_events.hh: SimExitEvent is now SimLoopExitEvent, and uses IsSimExit flag to terminate loop (instead of exiting simulator process). Get rid of a few unused constructors. src/sim/sim_exit.hh: SimExit() is now exitSimLoop(). Get rid of unused functions. Add comments. --HG-- extra : convert_revision : 280b0d671516b25545a6f24cefa64a68319ff3d4
406 lines
11 KiB
C++
406 lines
11 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Nathan Binkert
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*/
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#include <iostream>
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#include <string>
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#include <sstream>
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#include "base/cprintf.hh"
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#include "base/loader/symtab.hh"
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#include "base/misc.hh"
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#include "base/output.hh"
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#include "cpu/base.hh"
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#include "cpu/cpuevent.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/profile.hh"
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#include "cpu/sampler/sampler.hh"
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#include "sim/param.hh"
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#include "sim/process.hh"
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#include "sim/sim_events.hh"
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#include "sim/system.hh"
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#include "base/trace.hh"
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#if FULL_SYSTEM
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#include "kern/kernel_stats.hh"
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#endif
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using namespace std;
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vector<BaseCPU *> BaseCPU::cpuList;
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// This variable reflects the max number of threads in any CPU. Be
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// careful to only use it once all the CPUs that you care about have
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// been initialized
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int maxThreadsPerCPU = 1;
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#if FULL_SYSTEM
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BaseCPU::BaseCPU(Params *p)
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: SimObject(p->name), clock(p->clock), checkInterrupts(true),
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params(p), number_of_threads(p->numberOfThreads), system(p->system)
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#else
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BaseCPU::BaseCPU(Params *p)
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: SimObject(p->name), clock(p->clock), params(p),
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number_of_threads(p->numberOfThreads), system(p->system)
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#endif
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{
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DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
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// add self to global list of CPUs
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cpuList.push_back(this);
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DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
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this);
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if (number_of_threads > maxThreadsPerCPU)
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maxThreadsPerCPU = number_of_threads;
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// allocate per-thread instruction-based event queues
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comInstEventQueue = new EventQueue *[number_of_threads];
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for (int i = 0; i < number_of_threads; ++i)
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comInstEventQueue[i] = new EventQueue("instruction-based event queue");
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//
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// set up instruction-count-based termination events, if any
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//
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if (p->max_insts_any_thread != 0)
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for (int i = 0; i < number_of_threads; ++i)
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new SimLoopExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
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"a thread reached the max instruction count");
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if (p->max_insts_all_threads != 0) {
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// allocate & initialize shared downcounter: each event will
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// decrement this when triggered; simulation will terminate
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// when counter reaches 0
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int *counter = new int;
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*counter = number_of_threads;
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for (int i = 0; i < number_of_threads; ++i)
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new CountedExitEvent(comInstEventQueue[i],
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"all threads reached the max instruction count",
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p->max_insts_all_threads, *counter);
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}
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// allocate per-thread load-based event queues
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comLoadEventQueue = new EventQueue *[number_of_threads];
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for (int i = 0; i < number_of_threads; ++i)
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comLoadEventQueue[i] = new EventQueue("load-based event queue");
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//
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// set up instruction-count-based termination events, if any
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//
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if (p->max_loads_any_thread != 0)
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for (int i = 0; i < number_of_threads; ++i)
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new SimLoopExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
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"a thread reached the max load count");
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if (p->max_loads_all_threads != 0) {
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// allocate & initialize shared downcounter: each event will
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// decrement this when triggered; simulation will terminate
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// when counter reaches 0
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int *counter = new int;
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*counter = number_of_threads;
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for (int i = 0; i < number_of_threads; ++i)
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new CountedExitEvent(comLoadEventQueue[i],
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"all threads reached the max load count",
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p->max_loads_all_threads, *counter);
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}
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#if FULL_SYSTEM
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memset(interrupts, 0, sizeof(interrupts));
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intstatus = 0;
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#endif
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functionTracingEnabled = false;
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if (p->functionTrace) {
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functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
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currentFunctionStart = currentFunctionEnd = 0;
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functionEntryTick = p->functionTraceStart;
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if (p->functionTraceStart == 0) {
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functionTracingEnabled = true;
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} else {
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Event *e =
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new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
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true);
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e->schedule(p->functionTraceStart);
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}
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}
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#if FULL_SYSTEM
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profileEvent = NULL;
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if (params->profile)
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profileEvent = new ProfileEvent(this, params->profile);
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kernelStats = new Kernel::Statistics(system);
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#endif
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}
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BaseCPU::Params::Params()
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{
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#if FULL_SYSTEM
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profile = false;
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#endif
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}
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void
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BaseCPU::enableFunctionTrace()
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{
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functionTracingEnabled = true;
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}
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BaseCPU::~BaseCPU()
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{
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#if FULL_SYSTEM
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if (kernelStats)
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delete kernelStats;
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#endif
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}
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void
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BaseCPU::init()
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{
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if (!params->deferRegistration)
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registerExecContexts();
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}
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void
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BaseCPU::startup()
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{
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#if FULL_SYSTEM
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if (!params->deferRegistration && profileEvent)
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profileEvent->schedule(curTick);
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#endif
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}
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void
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BaseCPU::regStats()
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{
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using namespace Stats;
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numCycles
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.name(name() + ".numCycles")
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.desc("number of cpu cycles simulated")
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;
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int size = execContexts.size();
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if (size > 1) {
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for (int i = 0; i < size; ++i) {
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stringstream namestr;
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ccprintf(namestr, "%s.ctx%d", name(), i);
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execContexts[i]->regStats(namestr.str());
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}
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} else if (size == 1)
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execContexts[0]->regStats(name());
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#if FULL_SYSTEM
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if (kernelStats)
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kernelStats->regStats(name() + ".kern");
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#endif
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}
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void
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BaseCPU::registerExecContexts()
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{
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for (int i = 0; i < execContexts.size(); ++i) {
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ExecContext *xc = execContexts[i];
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#if FULL_SYSTEM
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int id = params->cpu_id;
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if (id != -1)
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id += i;
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xc->setCpuId(system->registerExecContext(xc, id));
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#else
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xc->setCpuId(xc->getProcessPtr()->registerExecContext(xc));
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#endif
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}
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}
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void
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BaseCPU::switchOut(Sampler *sampler)
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{
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panic("This CPU doesn't support sampling!");
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}
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void
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BaseCPU::takeOverFrom(BaseCPU *oldCPU)
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{
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assert(execContexts.size() == oldCPU->execContexts.size());
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for (int i = 0; i < execContexts.size(); ++i) {
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ExecContext *newXC = execContexts[i];
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ExecContext *oldXC = oldCPU->execContexts[i];
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newXC->takeOverFrom(oldXC);
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CpuEvent::replaceExecContext(oldXC, newXC);
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assert(newXC->readCpuId() == oldXC->readCpuId());
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#if FULL_SYSTEM
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system->replaceExecContext(newXC, newXC->readCpuId());
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#else
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assert(newXC->getProcessPtr() == oldXC->getProcessPtr());
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newXC->getProcessPtr()->replaceExecContext(newXC, newXC->readCpuId());
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#endif
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}
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#if FULL_SYSTEM
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for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
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interrupts[i] = oldCPU->interrupts[i];
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intstatus = oldCPU->intstatus;
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for (int i = 0; i < execContexts.size(); ++i)
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execContexts[i]->profileClear();
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if (profileEvent)
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profileEvent->schedule(curTick);
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#endif
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}
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#if FULL_SYSTEM
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BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
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: Event(&mainEventQueue), cpu(_cpu), interval(_interval)
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{ }
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void
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BaseCPU::ProfileEvent::process()
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{
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for (int i = 0, size = cpu->execContexts.size(); i < size; ++i) {
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ExecContext *xc = cpu->execContexts[i];
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xc->profileSample();
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}
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schedule(curTick + interval);
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}
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void
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BaseCPU::post_interrupt(int int_num, int index)
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{
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DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
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if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
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panic("int_num out of bounds\n");
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if (index < 0 || index >= sizeof(uint64_t) * 8)
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panic("int_num out of bounds\n");
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checkInterrupts = true;
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interrupts[int_num] |= 1 << index;
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intstatus |= (ULL(1) << int_num);
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}
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void
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BaseCPU::clear_interrupt(int int_num, int index)
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{
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DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
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if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
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panic("int_num out of bounds\n");
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if (index < 0 || index >= sizeof(uint64_t) * 8)
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panic("int_num out of bounds\n");
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interrupts[int_num] &= ~(1 << index);
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if (interrupts[int_num] == 0)
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intstatus &= ~(ULL(1) << int_num);
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}
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void
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BaseCPU::clear_interrupts()
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{
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DPRINTF(Interrupt, "Interrupts all cleared\n");
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memset(interrupts, 0, sizeof(interrupts));
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intstatus = 0;
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}
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void
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BaseCPU::serialize(std::ostream &os)
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{
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SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
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SERIALIZE_SCALAR(intstatus);
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#if FULL_SYSTEM
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if (kernelStats)
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kernelStats->serialize(os);
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#endif
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}
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void
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BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
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UNSERIALIZE_SCALAR(intstatus);
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#if FULL_SYSTEM
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if (kernelStats)
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kernelStats->unserialize(cp, section);
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#endif
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}
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#endif // FULL_SYSTEM
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void
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BaseCPU::traceFunctionsInternal(Addr pc)
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{
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if (!debugSymbolTable)
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return;
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// if pc enters different function, print new function symbol and
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// update saved range. Otherwise do nothing.
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if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
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string sym_str;
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bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
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currentFunctionStart,
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currentFunctionEnd);
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if (!found) {
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// no symbol found: use addr as label
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sym_str = csprintf("0x%x", pc);
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currentFunctionStart = pc;
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currentFunctionEnd = pc + 1;
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}
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ccprintf(*functionTraceStream, " (%d)\n%d: %s",
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curTick - functionEntryTick, curTick, sym_str);
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functionEntryTick = curTick;
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}
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}
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DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
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