gem5/src/arch/x86/regs
Andreas Hansson 72538294fb gcc: Clean-up of non-C++0x compliant code, first steps
This patch cleans up a number of minor issues aiming to get closer to
compliance with the C++0x standard as interpreted by gcc and clang
(compile with std=c++0x and -pedantic-errors). In particular, the
patch cleans up enums where the last item was succeded by a comma,
namespaces closed by a curcly brace followed by a semi-colon, and the
use of the GNU-extension typeof (replaced by templated functions). It
does not address variable-length arrays, zero-size arrays, anonymous
structs, range expressions in switch statements, and the use of long
long. The generated CPU code also has a large number of issues that
remain to be fixed, mainly related to overflows in implicit constant
conversion (due to shifts).
2012-03-19 06:36:09 -04:00
..
apic.hh X86: Create a directory for files that define register indexes. 2010-08-23 16:14:24 -07:00
float.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
int.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
misc.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
msr.cc X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
msr.hh X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
SConscript X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
segment.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00