Ali Saidi 271b9a5435 first cut at a sparc tlb ... src/arch/sparc/SConscript: Add code to serialize/unserialze tlb entries src/arch/sparc/asi.cc: src/arch/sparc/asi.hh: update asi names for how they're listed in the supplement add asis add more asi functions src/arch/sparc/isa_traits.hh: move the interrupt stuff and some basic address space stuff into isa traits src/arch/sparc/miscregfile.cc: src/arch/sparc/miscregfile.hh: add mmu registers to tlb get rid of implicit asi stuff... the tlb will handle it src/arch/sparc/regfile.hh: make isnt/dataAsid return ints not asis src/arch/sparc/tlb.cc: src/arch/sparc/tlb.hh: first cut at sparc tlb src/arch/sparc/vtophys.hh: pagatable nedes to be included here src/mem/request.hh: add asi and if the request is a memory mapped register to the requset object src/sim/host.hh: fix incorrect definition of LL --HG-- extra : convert_revision : 6c85cd1681c62c8cd8eab04f70b1f15a034b0aa3		2006-11-23 01:42:57 -05:00
..
arch	first cut at a sparc tlb	2006-11-23 01:42:57 -05:00
base	first cut at a sparc tlb	2006-11-23 01:42:57 -05:00
cpu	More interrupt reworking.	2006-11-13 02:49:03 -05:00
dev	fix endian issues with condition codes	2006-11-10 20:17:42 -05:00
doxygen	Fix up doxygen.	2006-08-14 19:25:07 -04:00
kern	Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha specific DepTag constants.	2006-11-09 21:30:48 -05:00
mem	first cut at a sparc tlb	2006-11-23 01:42:57 -05:00
python	Create a module called internal where swigged stuff goes.	2006-11-12 18:49:16 -08:00
sim	first cut at a sparc tlb	2006-11-23 01:42:57 -05:00
unittest	first cut at a sparc tlb	2006-11-23 01:42:57 -05:00
Doxyfile	Fix up doxygen.	2006-08-14 19:25:07 -04:00
SConscript	Create a module called internal where swigged stuff goes.	2006-11-12 18:49:16 -08:00