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Ron Dreslinski 1ccfdb442f Timing cache works for hello world test. 
Still need
1) detailed CPU (blocking ability in cache)
1a) Multiple outstanding requests (need to keep track of times for events)
2)Multi-level support
3)MP coherece support
4)LL/SC support
5)Functional path needs to be correctly implemented (temporarily works without multiple outstanding requests (simple cpu))

src/cpu/simple/timing.cc:
    Temp hack because timing cpu doesn't export ports properly so single I/D cache communicates only through the Icache port.
src/mem/cache/base_cache.cc:
    Handle marking MSHR's in service
    Add support for getting CSHR's
src/mem/cache/base_cache.hh:
    Make these functions visible at the base cache level
src/mem/cache/cache.hh:
    make the functions virtual
src/mem/cache/cache_impl.hh:
    Rename the function to make sense
src/mem/packet.hh:
    Accidentally clearing the needsResponse field when sending a response back.

--HG--
extra : convert_revision : 2325d4e0b77e470fa9da91490317dc8ed88b17e2
2006-07-06 16:52:05 -04:00
build_opts split off fullsystem and se iprs into two functions to remove lots of #ifs 2006-05-29 16:53:47 -04:00
configs Add default responder to bus 2006-07-06 14:41:01 -04:00
docs Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
ext New directory structure: 2006-05-22 14:29:33 -04:00
src Timing cache works for hello world test. 2006-07-06 16:52:05 -04:00
util Minor updates. 2006-06-17 22:55:00 -04:00
AUTHORS Make O3CPU model independent of the ISA 2006-06-30 19:52:08 -04:00
LICENSE Remove authors from copyright. 2006-05-28 23:26:15 -04:00
README Update the readme to point people to m5.eecs.umich.edu 2006-06-29 16:52:47 -04:00
RELEASE_NOTES Update the readme to point people to m5.eecs.umich.edu 2006-06-29 16:52:47 -04:00
SConstruct Make O3CPU model independent of the ISA 2006-06-30 19:52:08 -04:00

README 

This is release 2.0 of the M5 simulator.

For information about building the simulator and getting started please refer
to: http://m5.eecs.umich.edu/

Specific Pages of Interest are:
http://m5.eecs.umich.edu/wiki/index.php/Compiling_M5
http://m5.eecs.umich.edu/wiki/index.php/Running_M5

If you have questions, please send mail to m5sim-users@lists.sourceforge.net.

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: 
   - src: source code of the m5 simulator
   - test: regression tests
   - ext: less-common external packages needed to build m5
   - system/alpha: source for Alpha console and PALcode

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system_2.0.tar.bz2.  This file
is included on the CD release, or you can download it separately from
Sourceforge.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-dev@eecs.umich.edu.

The CD release includes a few extra goodies, such as a tar file
containing doxygen-generated HTML documentation (html-docs.tar.gz), a
set of Linux source patches (linux_m5-2.6.8.1.diff), and the scons
program needed to build M5.  If you do not have the CD, the same HTML
documentation is available online at http://m5.eecs.umich.edu/docs,
the Linux source patches are available at
http://m5.eecs.umich.edu/dist/linux_m5-2.6.8.1.diff, the scons
program is available from http://www.scons.org, and swig is available from
http://www.swig.org.