gem5/src
Korey Sewell 1a451cd2c5 sparc: compilation fixes for inorder
Add a few constants and functions that the InOrder model wants for SPARC.
* * *
sparc: add eaComp function
InOrder separates the address generation from the actual access so give
Sparc that functionality
* * *
sparc: add control flags for branches
branch predictors and other cpu model functions need to know specific information
about branches, so add the necessary flags here
2011-06-09 01:34:06 -04:00
..
arch sparc: compilation fixes for inorder 2011-06-09 01:34:06 -04:00
base gcc 4.0: Add some virtual destructors to make gcc 4.0 happy. 2011-06-07 00:24:49 -07:00
cpu sparc: compilation fixes for inorder 2011-06-09 01:34:06 -04:00
dev scons: rename TraceFlags to DebugFlags 2011-06-02 17:36:21 -07:00
doxygen
kern scons: rename TraceFlags to DebugFlags 2011-06-02 17:36:21 -07:00
mem Ruby: Correctly set access permissions for directory entries 2011-06-08 11:58:09 -05:00
python copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
sim scons: rename TraceFlags to DebugFlags 2011-06-02 17:36:21 -07:00
unittest copyright: clean up copyright blocks 2011-06-02 14:36:35 -07:00
Doxyfile
SConscript scons: rename TraceFlags to DebugFlags 2011-06-02 17:36:21 -07:00