gem5/src
Ali Saidi 17b0e9714d add boiler plate intel nic code
src/SConscript:
    add intel nic to sconscript
src/dev/pcidev.cc:
    fix bug with subsystemid value
src/python/m5/objects/Ethernet.py:
    add intel nic to ethernet.py
src/python/m5/objects/Ide.py:
src/python/m5/objects/Pci.py:
    Move config_latency into pci where it belogs

--HG--
extra : convert_revision : 7163aaf7b4098496518b0910cef62f2ce3dd574d
2006-09-18 20:12:45 -04:00
..
arch Finished changing how stat structures are translated, fixed the handling of various ids as LiveProcess parameters. 2006-09-17 03:00:55 -04:00
base add annotation code to m5 2006-09-11 17:57:20 -04:00
cpu Merge zizzer.eecs.umich.edu:/bk/newmem 2006-09-15 00:59:39 -04:00
dev add boiler plate intel nic code 2006-09-18 20:12:45 -04:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern Finished changing how stat structures are translated, fixed the handling of various ids as LiveProcess parameters. 2006-09-17 03:00:55 -04:00
mem Move more common functionality into SimpleTimingPort, 2006-08-30 16:24:26 -07:00
python add boiler plate intel nic code 2006-09-18 20:12:45 -04:00
sim Finished changing how stat structures are translated, fixed the handling of various ids as LiveProcess parameters. 2006-09-17 03:00:55 -04:00
unittest Merge iceaxe.:/Volumes/work/research/m5/head 2006-06-11 22:01:34 -04:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript add boiler plate intel nic code 2006-09-18 20:12:45 -04:00