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Ali Saidi 3a5a20769b add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think 
the device is there, and in good working order.

src/dev/SConscript:
    add intel gbe to the dev SCons file
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
    use new manner of registers and implement all device registers that are touched through boot and ifup

--HG--
extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
2007-03-15 15:16:23 -04:00
..
alpha Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
sparc fix interrupting during a quisce on sparc 2007-03-13 00:05:52 -04:00
baddev.cc make our code a little more standards compliant 2007-01-26 18:48:51 -05:00
baddev.hh Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
disk_image.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
disk_image.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherbus.cc Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
etherbus.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherdump.cc Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
etherdump.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherint.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherint.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherlink.cc Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
etherlink.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherpkt.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
etherpkt.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
ethertap.cc fix endian issues with condition codes 2006-11-10 20:17:42 -05:00
ethertap.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
i8254xGBe.cc add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think 2007-03-15 15:16:23 -04:00
i8254xGBe.hh add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think 2007-03-15 15:16:23 -04:00
i8254xGBe_defs.hh add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think 2007-03-15 15:16:23 -04:00
ide_atareg.h make our code a little more standards compliant 2007-01-26 18:48:51 -05:00
ide_ctrl.cc Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
ide_ctrl.hh Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
ide_disk.cc Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
ide_disk.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
ide_wdcreg.h New directory structure: 2006-05-22 14:29:33 -04:00
io_device.cc Ports now have a pointer to the MemObject that owns it (can be NULL). 2006-10-31 13:59:30 -05:00
io_device.hh Make memory commands dense again to avoid cache stat table explosion. 2007-02-07 10:53:37 -08:00
isa_fake.cc More changes to get SPARC fs closer. Now at 1.2M cycles before difference 2006-12-04 00:54:40 -05:00
isa_fake.hh More changes to get SPARC fs closer. Now at 1.2M cycles before difference 2006-12-04 00:54:40 -05:00
ns_gige.cc Make sure that all variables in the NSGigE device model are 2007-02-21 20:45:05 -08:00
ns_gige.hh Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
ns_gige_reg.h Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
pciconfigall.cc make our code a little more standards compliant 2007-01-26 18:48:51 -05:00
pciconfigall.hh Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
pcidev.cc Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
pcidev.hh make our code a little more standards compliant 2007-01-26 18:48:51 -05:00
pcireg.h Get rid of unneeded union. 2006-08-28 11:01:25 -07:00
pitreg.h Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
pktfifo.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
pktfifo.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
platform.cc make our code a little more standards compliant 2007-01-26 18:48:51 -05:00
platform.hh Make mulitple consoles work and be distinguishable from each other 2007-02-13 15:58:06 -05:00
rtcreg.h Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
SConscript add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think 2007-03-15 15:16:23 -04:00
simconsole.cc Get rid of the ConsoleListener SimObject and just fold the 2007-02-21 22:14:11 -08:00
simconsole.hh Get rid of the ConsoleListener SimObject and just fold the 2007-02-21 22:14:11 -08:00
simple_disk.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
simple_disk.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
sinic.cc Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
sinic.hh Use PacketPtr everywhere 2006-10-20 00:10:12 -07:00
sinicreg.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
uart.cc Make mulitple consoles work and be distinguishable from each other 2007-02-13 15:58:06 -05:00
uart.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
uart8250.cc Got rid of stray alpha include 2006-11-06 19:10:13 -05:00
uart8250.hh Make mulitple consoles work and be distinguishable from each other 2007-02-13 15:58:06 -05:00