gem5/src/arch/arm/isa
Gabe Black 05d880f7a1 ARM: Restrict the shift amount from a register to 8 bits.
The shift amount when taken from a register is supposed to be truncated to an
8 bit value.
2010-06-02 12:58:04 -05:00
..
decoder ARM: Define the VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
formats ARM: Decode the VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
insts ARM: Restrict the shift amount from a register to 8 bits. 2010-06-02 12:58:04 -05:00
templates ARM: Add templates for VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
bitfields.isa ARM: Hook the new multiply instructions into all the decoders. 2010-06-02 12:58:03 -05:00
copyright.txt ARM: Remove IsControl from operands that don't imply control transfers. 2010-06-02 12:57:59 -05:00
includes.isa ARM: Remove unnecessary cruft from includes.isa. 2010-06-02 12:58:03 -05:00
main.isa ARM: Define the load instructions from outside the decoder. 2010-06-02 12:58:01 -05:00
operands.isa ARM: Add an fp version of one of the microop indexed registers. 2010-06-02 12:58:04 -05:00