Steve Reinhardt 1249728494 cache: fail SC when invalidated while waiting for bus ... Corrects an oversight in cset f97b62be544f. The fix there only failed queued SCUpgradeReq packets that encountered an invalidation, which meant that the upgrade had to reach the L2 cache. To handle pending requests in the L1 we must similarly fail StoreCondReq packets too.		2010-09-09 14:40:19 -04:00
..
prefetch	Force prefetches to check cache and MSHRs immediately prior to issue.	2009-09-26 10:50:50 -07:00
tags	MEM: Make CLREX a first class request operation and clear locks in caches when it in received	2010-08-23 11:18:41 -05:00
base.cc	cache: Make caches sharing aware and add occupancy stats.	2010-02-23 09:34:22 -08:00
base.hh	cache: coherence protocol enhancements & bug fixes	2010-09-09 14:40:18 -04:00
BaseCache.py	cache: Make caches sharing aware and add occupancy stats.	2010-02-23 09:34:22 -08:00
blk.cc	Fix #include lines for renamed cache files.	2008-02-10 14:45:25 -08:00
blk.hh	cache: Make caches sharing aware and add occupancy stats.	2010-02-23 09:34:22 -08:00
builder.cc	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	2009-09-23 08:34:21 -07:00
cache.cc	remove the totally obsolete split cache	2008-10-23 16:11:28 -04:00
cache.hh	cache: coherence protocol enhancements & bug fixes	2010-09-09 14:40:18 -04:00
cache_impl.hh	cache: fail SC when invalidated while waiting for bus	2010-09-09 14:40:19 -04:00
mshr.cc	cache: fail SC when invalidated while waiting for bus	2010-09-09 14:40:19 -04:00
mshr.hh	cache: coherence protocol enhancements & bug fixes	2010-09-09 14:40:18 -04:00
mshr_queue.cc	cache: coherence protocol enhancements & bug fixes	2010-09-09 14:40:18 -04:00
mshr_queue.hh	cache: coherence protocol enhancements & bug fixes	2010-09-09 14:40:18 -04:00
SConscript	Rename cache files for brevity and consistency with rest of tree.	2008-02-10 14:15:42 -08:00