2759 lines
75 KiB
Text
2759 lines
75 KiB
Text
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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virtual_net_0: active, unordered
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virtual_net_1: active, unordered
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virtual_net_2: active, unordered
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virtual_net_3: inactive
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virtual_net_4: inactive
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virtual_net_5: inactive
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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Real time: Mar/18/2010 15:38:52
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 30
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Elapsed_time_in_minutes: 0.5
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Elapsed_time_in_hours: 0.00833333
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Elapsed_time_in_days: 0.000347222
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Virtual_time_in_seconds: 30.63
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Virtual_time_in_minutes: 0.5105
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Virtual_time_in_hours: 0.00850833
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Virtual_time_in_days: 0.000354514
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Ruby_current_time: 3383480
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Ruby_start_time: 0
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Ruby_cycles: 3383480
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mbytes_resident: 31.1758
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mbytes_total: 332.199
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resident_ratio: 0.0938584
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ruby_cycles_executed: [ 3383481 3383481 3383481 3383481 3383481 3383481 3383481 3383481 ]
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Busy Controller Counts:
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L2Cache-0:0
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L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 2 count: 1224321 average: 1.94443 | standard deviation: 0.229099 | 0 68041 1156280 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 32 max: 3867 count: 1224307 average: 42.2125 | standard deviation: 176.83 | 1120193 100 18422 250 3697 208 20055 99 4698 333 9493 182 6212 231 4498 196 5380 146 3026 431 3578 201 1712 1300 2300 299 1246 1179 1311 691 911 859 562 1056 709 654 462 707 409 573 330 526 208 545 261 415 162 365 175 313 146 267 103 218 103 205 80 151 93 135 60 94 55 71 59 59 41 45 41 43 25 43 16 31 21 32 21 10 15 14 10 15 8 8 10 11 3 5 9 6 6 4 4 6 2 6 2 1 4 2 3 3 0 4 0 0 3 1 0 0 0 1 0 0 0 0 3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_2: [binsize: 32 max: 3867 count: 795461 average: 41.7693 | standard deviation: 175.853 | 728451 2 12003 191 2273 112 13052 34 3039 166 6174 100 3966 173 2859 112 3400 77 2124 112 2321 116 1129 856 1452 179 824 756 1029 226 579 535 370 687 463 438 297 467 315 303 212 351 132 368 156 264 104 243 137 191 94 174 61 126 56 132 56 96 69 83 39 57 32 46 30 39 31 29 27 22 22 23 12 25 9 21 12 7 10 7 7 11 7 7 5 7 3 3 9 6 1 1 1 4 1 5 0 0 2 1 2 2 0 3 0 0 1 1 0 0 0 1 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_3: [binsize: 32 max: 3728 count: 428846 average: 43.0346 | standard deviation: 178.625 | 391742 98 6419 59 1424 96 7003 65 1659 167 3319 82 2246 58 1639 84 1980 69 902 319 1257 85 583 444 848 120 422 423 282 465 332 324 192 369 246 216 165 240 94 270 118 175 76 177 105 151 58 122 38 122 52 93 42 92 47 73 24 55 24 52 21 37 23 25 29 20 10 16 14 21 3 20 4 6 12 11 9 3 5 7 3 4 1 1 5 4 0 2 0 0 5 3 3 2 1 1 2 1 2 1 1 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 30
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system_time: 0
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page_reclaims: 9017
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page_faults: 0
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swaps: 0
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block_inputs: 0
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block_outputs: 0
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Network Stats
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-------------
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 0.130563
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links_utilized_percent_switch_0_link_0: 0.0497661 bw: 640000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 0.211361 bw: 160000 base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 1 72 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_ResponseLocal_Data: 12977 934344 [ 0 0 12977 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Control: 4794 38352 [ 0 0 4794 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Forwarded_Control: 13008 104064 [ 13008 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Invalidate_Control: 102 816 [ 102 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Request_Control: 12995 103960 [ 12995 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_ResponseLocal_Data: 12993 935496 [ 0 0 12993 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Response_Control: 102 816 [ 0 0 102 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Unblock_Control: 12993 103944 [ 0 0 12993 0 0 0 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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links_utilized_percent_switch_1: 0.131025
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links_utilized_percent_switch_1_link_0: 0.0500265 bw: 640000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 0.212023 bw: 160000 base_latency: 1
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outgoing_messages_switch_1_link_0_Response_Data: 1 72 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_ResponseLocal_Data: 13047 939384 [ 0 0 13047 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Response_Control: 4825 38600 [ 0 0 4825 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Forwarded_Control: 13041 104328 [ 13041 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Invalidate_Control: 113 904 [ 113 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Request_Control: 13065 104520 [ 13065 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_ResponseLocal_Data: 13026 937872 [ 0 0 13026 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Response_Control: 113 904 [ 0 0 113 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Unblock_Control: 13063 104504 [ 0 0 13063 0 0 0 0 0 0 0 ] base_latency: 1
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switch_2_inlinks: 2
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switch_2_outlinks: 2
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links_utilized_percent_switch_2: 0.130359
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links_utilized_percent_switch_2_link_0: 0.0496922 bw: 640000 base_latency: 1
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links_utilized_percent_switch_2_link_1: 0.211027 bw: 160000 base_latency: 1
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outgoing_messages_switch_2_link_0_ResponseLocal_Data: 12963 933336 [ 0 0 12963 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Response_Control: 4756 38048 [ 0 0 4756 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Forwarded_Control: 12986 103888 [ 12986 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Invalidate_Control: 97 776 [ 97 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Request_Control: 12979 103832 [ 12979 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_ResponseLocal_Data: 12972 933984 [ 0 0 12972 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Response_Control: 97 776 [ 0 0 97 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Unblock_Control: 12977 103816 [ 0 0 12977 0 0 0 0 0 0 0 ] base_latency: 1
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switch_3_inlinks: 2
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switch_3_outlinks: 2
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links_utilized_percent_switch_3: 0.13073
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links_utilized_percent_switch_3_link_0: 0.0497838 bw: 640000 base_latency: 1
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links_utilized_percent_switch_3_link_1: 0.211677 bw: 160000 base_latency: 1
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outgoing_messages_switch_3_link_0_ResponseLocal_Data: 12985 934920 [ 0 0 12985 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_0_Response_Control: 4762 38096 [ 0 0 4762 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_0_Forwarded_Control: 13023 104184 [ 13023 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_0_Invalidate_Control: 104 832 [ 104 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Request_Control: 12993 103944 [ 12993 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_ResponseLocal_Data: 13017 937224 [ 0 0 13017 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Response_Control: 104 832 [ 0 0 104 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Unblock_Control: 12991 103928 [ 0 0 12991 0 0 0 0 0 0 0 ] base_latency: 1
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switch_4_inlinks: 2
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switch_4_outlinks: 2
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links_utilized_percent_switch_4: 0.131205
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links_utilized_percent_switch_4_link_0: 0.0500587 bw: 640000 base_latency: 1
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links_utilized_percent_switch_4_link_1: 0.212351 bw: 160000 base_latency: 1
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outgoing_messages_switch_4_link_0_ResponseLocal_Data: 13069 940968 [ 0 0 13069 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_0_Response_Control: 4715 37720 [ 0 0 4715 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_0_Forwarded_Control: 13059 104472 [ 13059 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_0_Invalidate_Control: 103 824 [ 103 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_1_Request_Control: 13082 104656 [ 13082 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_1_ResponseLocal_Data: 13048 939456 [ 0 0 13048 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_1_Response_Control: 103 824 [ 0 0 103 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_1_Unblock_Control: 13080 104640 [ 0 0 13080 0 0 0 0 0 0 0 ] base_latency: 1
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switch_5_inlinks: 2
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switch_5_outlinks: 2
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links_utilized_percent_switch_5: 0.13071
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links_utilized_percent_switch_5_link_0: 0.0498414 bw: 640000 base_latency: 1
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links_utilized_percent_switch_5_link_1: 0.211579 bw: 160000 base_latency: 1
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outgoing_messages_switch_5_link_0_ResponseLocal_Data: 13020 937440 [ 0 0 13020 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_0_Response_Control: 4616 36928 [ 0 0 4616 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_0_Forwarded_Control: 13012 104096 [ 13012 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_0_Invalidate_Control: 102 816 [ 102 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_1_Request_Control: 13033 104264 [ 13033 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_1_ResponseLocal_Data: 13001 936072 [ 0 0 13001 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_1_Response_Control: 102 816 [ 0 0 102 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_1_Unblock_Control: 13031 104248 [ 0 0 13031 0 0 0 0 0 0 0 ] base_latency: 1
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switch_6_inlinks: 2
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switch_6_outlinks: 2
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links_utilized_percent_switch_6: 0.131064
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links_utilized_percent_switch_6_link_0: 0.0499375 bw: 640000 base_latency: 1
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links_utilized_percent_switch_6_link_1: 0.212191 bw: 160000 base_latency: 1
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outgoing_messages_switch_6_link_0_ResponseLocal_Data: 13031 938232 [ 0 0 13031 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_0_Response_Control: 4732 37856 [ 0 0 4732 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_0_Forwarded_Control: 13061 104488 [ 13061 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_0_Invalidate_Control: 98 784 [ 98 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_1_Request_Control: 13048 104384 [ 13048 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_1_ResponseLocal_Data: 13044 939168 [ 0 0 13044 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_1_Response_Control: 98 784 [ 0 0 98 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_1_Unblock_Control: 13047 104376 [ 0 0 13047 0 0 0 0 0 0 0 ] base_latency: 1
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switch_7_inlinks: 2
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switch_7_outlinks: 2
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links_utilized_percent_switch_7: 0.130272
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links_utilized_percent_switch_7_link_0: 0.0497081 bw: 640000 base_latency: 1
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links_utilized_percent_switch_7_link_1: 0.210836 bw: 160000 base_latency: 1
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outgoing_messages_switch_7_link_0_ResponseLocal_Data: 12964 933408 [ 0 0 12964 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_0_Response_Control: 4785 38280 [ 0 0 4785 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_0_Forwarded_Control: 12972 103776 [ 12972 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_0_Invalidate_Control: 116 928 [ 116 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_1_Request_Control: 12981 103848 [ 12981 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_1_ResponseLocal_Data: 12955 932760 [ 0 0 12955 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_1_Response_Control: 116 928 [ 0 0 116 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_7_link_1_Unblock_Control: 12980 103840 [ 0 0 12980 0 0 0 0 0 0 0 ] base_latency: 1
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switch_8_inlinks: 2
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switch_8_outlinks: 2
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links_utilized_percent_switch_8: 0.143257
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links_utilized_percent_switch_8_link_0: 0.0769755 bw: 640000 base_latency: 1
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links_utilized_percent_switch_8_link_1: 0.209539 bw: 160000 base_latency: 1
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outgoing_messages_switch_8_link_0_Request_Control: 104176 833408 [ 104176 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_0_Response_Data: 2 144 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_0_Unblock_Control: 104162 833296 [ 0 0 104162 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_1_Request_Control: 2 16 [ 0 2 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_1_Response_Data: 2 144 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_1_Response_Control: 37150 297200 [ 0 0 37150 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_1_Forwarded_Control: 104162 833296 [ 104162 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_1_Invalidate_Control: 460 3680 [ 460 0 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_8_link_1_Unblock_Control: 2 16 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
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switch_9_inlinks: 2
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switch_9_outlinks: 2
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links_utilized_percent_switch_9: 1.40388e-05
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links_utilized_percent_switch_9_link_0: 1.47777e-06 bw: 640000 base_latency: 1
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links_utilized_percent_switch_9_link_1: 2.65998e-05 bw: 160000 base_latency: 1
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outgoing_messages_switch_9_link_0_Request_Control: 2 16 [ 0 2 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_9_link_0_Unblock_Control: 2 16 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_9_link_1_Response_Data: 2 144 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
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switch_10_inlinks: 10
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switch_10_outlinks: 10
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links_utilized_percent_switch_10: 0.190316
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links_utilized_percent_switch_10_link_0: 0.199064 bw: 160000 base_latency: 1
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links_utilized_percent_switch_10_link_1: 0.200106 bw: 160000 base_latency: 1
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links_utilized_percent_switch_10_link_2: 0.198769 bw: 160000 base_latency: 1
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links_utilized_percent_switch_10_link_3: 0.199135 bw: 160000 base_latency: 1
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links_utilized_percent_switch_10_link_4: 0.200235 bw: 160000 base_latency: 1
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links_utilized_percent_switch_10_link_5: 0.199366 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_10_link_6: 0.19975 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_10_link_7: 0.198832 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_10_link_8: 0.307902 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_10_link_9: 5.91107e-06 bw: 160000 base_latency: 1
|
|
|
|
outgoing_messages_switch_10_link_0_Response_Data: 1 72 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_0_ResponseLocal_Data: 12977 934344 [ 0 0 12977 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_0_Response_Control: 4794 38352 [ 0 0 4794 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_0_Forwarded_Control: 13008 104064 [ 13008 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_0_Invalidate_Control: 102 816 [ 102 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_1_Response_Data: 1 72 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_1_ResponseLocal_Data: 13047 939384 [ 0 0 13047 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_1_Response_Control: 4825 38600 [ 0 0 4825 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_1_Forwarded_Control: 13041 104328 [ 13041 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_1_Invalidate_Control: 113 904 [ 113 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_2_ResponseLocal_Data: 12963 933336 [ 0 0 12963 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_2_Response_Control: 4756 38048 [ 0 0 4756 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_2_Forwarded_Control: 12986 103888 [ 12986 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_2_Invalidate_Control: 97 776 [ 97 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_3_ResponseLocal_Data: 12985 934920 [ 0 0 12985 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_3_Response_Control: 4762 38096 [ 0 0 4762 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_3_Forwarded_Control: 13023 104184 [ 13023 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_3_Invalidate_Control: 104 832 [ 104 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_4_ResponseLocal_Data: 13069 940968 [ 0 0 13069 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_4_Response_Control: 4715 37720 [ 0 0 4715 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_4_Forwarded_Control: 13059 104472 [ 13059 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_4_Invalidate_Control: 103 824 [ 103 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_5_ResponseLocal_Data: 13020 937440 [ 0 0 13020 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_5_Response_Control: 4616 36928 [ 0 0 4616 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_5_Forwarded_Control: 13012 104096 [ 13012 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_5_Invalidate_Control: 102 816 [ 102 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_6_ResponseLocal_Data: 13031 938232 [ 0 0 13031 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_6_Response_Control: 4732 37856 [ 0 0 4732 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_6_Forwarded_Control: 13061 104488 [ 13061 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_6_Invalidate_Control: 98 784 [ 98 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_7_ResponseLocal_Data: 12964 933408 [ 0 0 12964 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_7_Response_Control: 4785 38280 [ 0 0 4785 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_7_Forwarded_Control: 12972 103776 [ 12972 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_7_Invalidate_Control: 116 928 [ 116 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_8_Request_Control: 104176 833408 [ 104176 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_8_Response_Data: 2 144 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_8_Unblock_Control: 104162 833296 [ 0 0 104162 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_9_Request_Control: 2 16 [ 0 2 0 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_10_link_9_Unblock_Control: 2 16 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 0 ---
|
|
- Event Counts -
|
|
Load 99023
|
|
Ifetch 0
|
|
Store 53582
|
|
L1_Replacement 0
|
|
Own_GETX 15
|
|
Fwd_GETX 21995
|
|
Fwd_GETS 41350
|
|
Fwd_DMA 0
|
|
Inv 102
|
|
Ack 4794
|
|
Data 115
|
|
Exclusive_Data 12863
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4711
|
|
Use_Timeout 12878
|
|
|
|
- Transitions -
|
|
I Load 8283
|
|
I Ifetch 0 <--
|
|
I Store 4542
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 166
|
|
S Ifetch 0 <--
|
|
S Store 100
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 15
|
|
|
|
O Load 114
|
|
O Ifetch 0 <--
|
|
O Store 70
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 0 <--
|
|
O Fwd_GETS 7
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 138
|
|
M Ifetch 0 <--
|
|
M Store 67
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 32
|
|
M Fwd_GETS 70
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 14727
|
|
M_W Ifetch 0 <--
|
|
M_W Store 7998
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1309
|
|
M_W Fwd_GETS 2512
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 169
|
|
|
|
MM Load 11464
|
|
MM Ifetch 0 <--
|
|
MM Store 6136
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4431
|
|
MM Fwd_GETS 8345
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 64131
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34669
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16168
|
|
MM_W Fwd_GETS 30363
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12709
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4704
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4683
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 87
|
|
SM Ack 24
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 13
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 15
|
|
OM Fwd_GETX 55
|
|
OM Fwd_GETS 53
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 66
|
|
OM All_acks 4711
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 115
|
|
IS Exclusive_Data 8167
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links1.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links1.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 1 ---
|
|
- Event Counts -
|
|
Load 99832
|
|
Ifetch 0
|
|
Store 53534
|
|
L1_Replacement 0
|
|
Own_GETX 15
|
|
Fwd_GETX 22841
|
|
Fwd_GETS 40784
|
|
Fwd_DMA 0
|
|
Inv 113
|
|
Ack 4825
|
|
Data 126
|
|
Exclusive_Data 12922
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4716
|
|
Use_Timeout 12937
|
|
|
|
- Transitions -
|
|
I Load 8348
|
|
I Ifetch 0 <--
|
|
I Store 4563
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 229
|
|
S Ifetch 0 <--
|
|
S Store 102
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 24
|
|
|
|
O Load 78
|
|
O Ifetch 0 <--
|
|
O Store 52
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 2
|
|
O Fwd_GETS 2
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 127
|
|
M Ifetch 0 <--
|
|
M Store 53
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 32
|
|
M Fwd_GETS 54
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 14558
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8082
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1302
|
|
M_W Fwd_GETS 2460
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 139
|
|
|
|
MM Load 11606
|
|
MM Ifetch 0 <--
|
|
MM Store 6135
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4608
|
|
MM Fwd_GETS 8243
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 64886
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34547
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16860
|
|
MM_W Fwd_GETS 29977
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12798
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4712
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4688
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 89
|
|
SM Ack 30
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 13
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 15
|
|
OM Fwd_GETX 37
|
|
OM Fwd_GETS 48
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 83
|
|
OM All_acks 4716
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 126
|
|
IS Exclusive_Data 8221
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links2.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links2.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 2 ---
|
|
- Event Counts -
|
|
Load 98648
|
|
Ifetch 0
|
|
Store 53693
|
|
L1_Replacement 0
|
|
Own_GETX 14
|
|
Fwd_GETX 22578
|
|
Fwd_GETS 40716
|
|
Fwd_DMA 0
|
|
Inv 97
|
|
Ack 4756
|
|
Data 101
|
|
Exclusive_Data 12862
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4665
|
|
Use_Timeout 12876
|
|
|
|
- Transitions -
|
|
I Load 8314
|
|
I Ifetch 0 <--
|
|
I Store 4523
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 156
|
|
S Ifetch 0 <--
|
|
S Store 88
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 13
|
|
|
|
O Load 95
|
|
O Ifetch 0 <--
|
|
O Store 54
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 1
|
|
O Fwd_GETS 5
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 117
|
|
M Ifetch 0 <--
|
|
M Store 75
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 25
|
|
M Fwd_GETS 55
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 14809
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8056
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1398
|
|
M_W Fwd_GETS 2484
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 155
|
|
|
|
MM Load 11304
|
|
MM Ifetch 0 <--
|
|
MM Store 6290
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4562
|
|
MM Fwd_GETS 8234
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 63853
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34607
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16552
|
|
MM_W Fwd_GETS 29888
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12721
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4666
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4647
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 84
|
|
SM Ack 7
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 4
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 14
|
|
OM Fwd_GETX 40
|
|
OM Fwd_GETS 50
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 83
|
|
OM All_acks 4665
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 101
|
|
IS Exclusive_Data 8211
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links3.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links3.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 3 ---
|
|
- Event Counts -
|
|
Load 99441
|
|
Ifetch 0
|
|
Store 53405
|
|
L1_Replacement 0
|
|
Own_GETX 6
|
|
Fwd_GETX 22814
|
|
Fwd_GETS 40551
|
|
Fwd_DMA 0
|
|
Inv 104
|
|
Ack 4762
|
|
Data 117
|
|
Exclusive_Data 12868
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4673
|
|
Use_Timeout 12874
|
|
|
|
- Transitions -
|
|
I Load 8319
|
|
I Ifetch 0 <--
|
|
I Store 4518
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 207
|
|
S Ifetch 0 <--
|
|
S Store 92
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 25
|
|
|
|
O Load 119
|
|
O Ifetch 0 <--
|
|
O Store 64
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 2
|
|
O Fwd_GETS 6
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 168
|
|
M Ifetch 0 <--
|
|
M Store 54
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 44
|
|
M Fwd_GETS 66
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 15070
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8037
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1396
|
|
M_W Fwd_GETS 2516
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 164
|
|
|
|
MM Load 11490
|
|
MM Ifetch 0 <--
|
|
MM Store 6222
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4591
|
|
MM Fwd_GETS 8173
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 64068
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34418
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16723
|
|
MM_W Fwd_GETS 29713
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12710
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4672
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4654
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 79
|
|
SM Ack 33
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 13
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 6
|
|
OM Fwd_GETX 58
|
|
OM Fwd_GETS 77
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 57
|
|
OM All_acks 4673
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 117
|
|
IS Exclusive_Data 8201
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links4.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links4.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 4 ---
|
|
- Event Counts -
|
|
Load 99795
|
|
Ifetch 0
|
|
Store 53955
|
|
L1_Replacement 0
|
|
Own_GETX 11
|
|
Fwd_GETX 22437
|
|
Fwd_GETS 41296
|
|
Fwd_DMA 0
|
|
Inv 103
|
|
Ack 4715
|
|
Data 119
|
|
Exclusive_Data 12950
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4613
|
|
Use_Timeout 12961
|
|
|
|
- Transitions -
|
|
I Load 8468
|
|
I Ifetch 0 <--
|
|
I Store 4465
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 183
|
|
S Ifetch 0 <--
|
|
S Store 100
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 19
|
|
|
|
O Load 97
|
|
O Ifetch 0 <--
|
|
O Store 49
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 5
|
|
O Fwd_GETS 4
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 132
|
|
M Ifetch 0 <--
|
|
M Store 65
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 37
|
|
M Fwd_GETS 54
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 15376
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8192
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1382
|
|
M_W Fwd_GETS 2630
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 156
|
|
|
|
MM Load 11543
|
|
MM Ifetch 0 <--
|
|
MM Store 6269
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4521
|
|
MM Fwd_GETS 8349
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 63996
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34815
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16454
|
|
MM_W Fwd_GETS 30219
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12805
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4614
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4586
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 84
|
|
SM Ack 29
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 16
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 11
|
|
OM Fwd_GETX 38
|
|
OM Fwd_GETS 40
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 72
|
|
OM All_acks 4613
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 119
|
|
IS Exclusive_Data 8348
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links5.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links5.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 5 ---
|
|
- Event Counts -
|
|
Load 99739
|
|
Ifetch 0
|
|
Store 53481
|
|
L1_Replacement 0
|
|
Own_GETX 11
|
|
Fwd_GETX 22829
|
|
Fwd_GETS 40648
|
|
Fwd_DMA 0
|
|
Inv 102
|
|
Ack 4616
|
|
Data 118
|
|
Exclusive_Data 12902
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4488
|
|
Use_Timeout 12913
|
|
|
|
- Transitions -
|
|
I Load 8545
|
|
I Ifetch 0 <--
|
|
I Store 4332
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 143
|
|
S Ifetch 0 <--
|
|
S Store 107
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 11
|
|
|
|
O Load 59
|
|
O Ifetch 0 <--
|
|
O Store 49
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 1
|
|
O Fwd_GETS 1
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 116
|
|
M Ifetch 0 <--
|
|
M Store 73
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 34
|
|
M Fwd_GETS 50
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 15492
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8268
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1474
|
|
M_W Fwd_GETS 2608
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 157
|
|
|
|
MM Load 11554
|
|
MM Ifetch 0 <--
|
|
MM Store 6300
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4609
|
|
MM Fwd_GETS 8220
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 63830
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34352
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16673
|
|
MM_W Fwd_GETS 29721
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12756
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4494
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4461
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 91
|
|
SM Ack 29
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 16
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 11
|
|
OM Fwd_GETX 38
|
|
OM Fwd_GETS 48
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 93
|
|
OM All_acks 4488
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 118
|
|
IS Exclusive_Data 8425
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links6.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links6.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 6 ---
|
|
- Event Counts -
|
|
Load 100001
|
|
Ifetch 0
|
|
Store 53654
|
|
L1_Replacement 0
|
|
Own_GETX 16
|
|
Fwd_GETX 22688
|
|
Fwd_GETS 40941
|
|
Fwd_DMA 0
|
|
Inv 98
|
|
Ack 4732
|
|
Data 112
|
|
Exclusive_Data 12919
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4621
|
|
Use_Timeout 12934
|
|
|
|
- Transitions -
|
|
I Load 8427
|
|
I Ifetch 0 <--
|
|
I Store 4464
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 142
|
|
S Ifetch 0 <--
|
|
S Store 98
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 14
|
|
|
|
O Load 101
|
|
O Ifetch 0 <--
|
|
O Store 59
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 2
|
|
O Fwd_GETS 4
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 128
|
|
M Ifetch 0 <--
|
|
M Store 65
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 31
|
|
M Fwd_GETS 61
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 15324
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8157
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1433
|
|
M_W Fwd_GETS 2557
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 157
|
|
|
|
MM Load 11583
|
|
MM Ifetch 0 <--
|
|
MM Store 6297
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4582
|
|
MM Fwd_GETS 8260
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 64296
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34514
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16597
|
|
MM_W Fwd_GETS 29998
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12777
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4614
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4591
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 84
|
|
SM Ack 29
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 14
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 16
|
|
OM Fwd_GETX 43
|
|
OM Fwd_GETS 61
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 89
|
|
OM All_acks 4621
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 112
|
|
IS Exclusive_Data 8314
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links7.ext_node.sequencer.icache
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.icache_total_misses: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.icache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.icache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.icache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.icache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache_total_misses: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links7.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L1Cache 7 ---
|
|
- Event Counts -
|
|
Load 98992
|
|
Ifetch 0
|
|
Store 53546
|
|
L1_Replacement 0
|
|
Own_GETX 16
|
|
Fwd_GETX 22318
|
|
Fwd_GETS 40836
|
|
Fwd_DMA 0
|
|
Inv 116
|
|
Ack 4785
|
|
Data 125
|
|
Exclusive_Data 12839
|
|
Writeback_Ack 0
|
|
Writeback_Ack_Data 0
|
|
Writeback_Nack 0
|
|
All_acks 4665
|
|
Use_Timeout 12854
|
|
|
|
- Transitions -
|
|
I Load 8316
|
|
I Ifetch 0 <--
|
|
I Store 4506
|
|
I L1_Replacement 0 <--
|
|
I Inv 0 <--
|
|
|
|
S Load 205
|
|
S Ifetch 0 <--
|
|
S Store 104
|
|
S L1_Replacement 0 <--
|
|
S Fwd_GETS 0 <--
|
|
S Fwd_DMA 0 <--
|
|
S Inv 21
|
|
|
|
O Load 96
|
|
O Ifetch 0 <--
|
|
O Store 55
|
|
O L1_Replacement 0 <--
|
|
O Fwd_GETX 4
|
|
O Fwd_GETS 4
|
|
O Fwd_DMA 0 <--
|
|
|
|
M Load 145
|
|
M Ifetch 0 <--
|
|
M Store 63
|
|
M L1_Replacement 0 <--
|
|
M Fwd_GETX 32
|
|
M Fwd_GETS 59
|
|
M Fwd_DMA 0 <--
|
|
|
|
M_W Load 14823
|
|
M_W Ifetch 0 <--
|
|
M_W Store 8036
|
|
M_W L1_Replacement 0 <--
|
|
M_W Own_GETX 0 <--
|
|
M_W Fwd_GETX 1327
|
|
M_W Fwd_GETS 2573
|
|
M_W Fwd_DMA 0 <--
|
|
M_W Inv 0 <--
|
|
M_W Use_Timeout 154
|
|
|
|
MM Load 11394
|
|
MM Ifetch 0 <--
|
|
MM Store 6188
|
|
MM L1_Replacement 0 <--
|
|
MM Fwd_GETX 4510
|
|
MM Fwd_GETS 8253
|
|
MM Fwd_DMA 0 <--
|
|
|
|
MM_W Load 64013
|
|
MM_W Ifetch 0 <--
|
|
MM_W Store 34594
|
|
MM_W L1_Replacement 0 <--
|
|
MM_W Own_GETX 0 <--
|
|
MM_W Fwd_GETX 16406
|
|
MM_W Fwd_GETS 29893
|
|
MM_W Fwd_DMA 0 <--
|
|
MM_W Inv 0 <--
|
|
MM_W Use_Timeout 12700
|
|
|
|
IM Load 0 <--
|
|
IM Ifetch 0 <--
|
|
IM Store 0 <--
|
|
IM L1_Replacement 0 <--
|
|
IM Inv 0 <--
|
|
IM Ack 4682
|
|
IM Data 0 <--
|
|
IM Exclusive_Data 4640
|
|
|
|
SM Load 0 <--
|
|
SM Ifetch 0 <--
|
|
SM Store 0 <--
|
|
SM L1_Replacement 0 <--
|
|
SM Fwd_GETS 0 <--
|
|
SM Fwd_DMA 0 <--
|
|
SM Inv 95
|
|
SM Ack 18
|
|
SM Data 0 <--
|
|
SM Exclusive_Data 9
|
|
|
|
OM Load 0 <--
|
|
OM Ifetch 0 <--
|
|
OM Store 0 <--
|
|
OM L1_Replacement 0 <--
|
|
OM Own_GETX 16
|
|
OM Fwd_GETX 39
|
|
OM Fwd_GETS 54
|
|
OM Fwd_DMA 0 <--
|
|
OM Ack 85
|
|
OM All_acks 4665
|
|
|
|
IS Load 0 <--
|
|
IS Ifetch 0 <--
|
|
IS Store 0 <--
|
|
IS L1_Replacement 0 <--
|
|
IS Inv 0 <--
|
|
IS Data 125
|
|
IS Exclusive_Data 8190
|
|
|
|
SI Load 0 <--
|
|
SI Ifetch 0 <--
|
|
SI Store 0 <--
|
|
SI L1_Replacement 0 <--
|
|
SI Fwd_GETS 0 <--
|
|
SI Fwd_DMA 0 <--
|
|
SI Inv 0 <--
|
|
SI Writeback_Ack 0 <--
|
|
SI Writeback_Ack_Data 0 <--
|
|
SI Writeback_Nack 0 <--
|
|
|
|
OI Load 0 <--
|
|
OI Ifetch 0 <--
|
|
OI Store 0 <--
|
|
OI L1_Replacement 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Ack_Data 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
|
|
MI Load 0 <--
|
|
MI Ifetch 0 <--
|
|
MI Store 0 <--
|
|
MI L1_Replacement 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI Writeback_Ack_Data 0 <--
|
|
MI Writeback_Nack 0 <--
|
|
|
|
II Load 0 <--
|
|
II Ifetch 0 <--
|
|
II Store 0 <--
|
|
II L1_Replacement 0 <--
|
|
II Inv 0 <--
|
|
II Writeback_Ack 0 <--
|
|
II Writeback_Ack_Data 0 <--
|
|
II Writeback_Nack 0 <--
|
|
|
|
Cache Stats: system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory
|
|
system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory_total_misses: 0
|
|
system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory_total_demand_misses: 0
|
|
system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory_total_prefetches: 0
|
|
system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory_total_sw_prefetches: 0
|
|
system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.ruby.network.topology.ext_links8.ext_node.L2cacheMemory_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
--- L2Cache 0 ---
|
|
- Event Counts -
|
|
L1_GETS 2730499
|
|
L1_GETX 1517781
|
|
L1_PUTO 0
|
|
L1_PUTX 0
|
|
L1_PUTS_only 0
|
|
L1_PUTS 0
|
|
Fwd_GETX 0
|
|
Fwd_GETS 0
|
|
Fwd_DMA 0
|
|
Own_GETX 0
|
|
Inv 0
|
|
IntAck 0
|
|
ExtAck 0
|
|
All_Acks 2
|
|
Data 2
|
|
Data_Exclusive 0
|
|
L1_WBCLEANDATA 0
|
|
L1_WBDIRTYDATA 0
|
|
Writeback_Ack 0
|
|
Writeback_Nack 0
|
|
Unblock 933
|
|
Exclusive_Unblock 103229
|
|
L2_Replacement 0
|
|
|
|
- Transitions -
|
|
NP L1_GETS 0 <--
|
|
NP L1_GETX 2
|
|
NP L1_PUTO 0 <--
|
|
NP L1_PUTX 0 <--
|
|
NP L1_PUTS 0 <--
|
|
NP Inv 0 <--
|
|
|
|
I L1_GETS 0 <--
|
|
I L1_GETX 0 <--
|
|
I L1_PUTO 0 <--
|
|
I L1_PUTX 0 <--
|
|
I L1_PUTS 0 <--
|
|
I Inv 0 <--
|
|
I L2_Replacement 0 <--
|
|
|
|
ILS L1_GETS 0 <--
|
|
ILS L1_GETX 0 <--
|
|
ILS L1_PUTO 0 <--
|
|
ILS L1_PUTX 0 <--
|
|
ILS L1_PUTS_only 0 <--
|
|
ILS L1_PUTS 0 <--
|
|
ILS Inv 0 <--
|
|
ILS L2_Replacement 0 <--
|
|
|
|
ILX L1_GETS 66548
|
|
ILX L1_GETX 36681
|
|
ILX L1_PUTO 0 <--
|
|
ILX L1_PUTX 0 <--
|
|
ILX L1_PUTS_only 0 <--
|
|
ILX L1_PUTS 0 <--
|
|
ILX Fwd_GETX 0 <--
|
|
ILX Fwd_GETS 0 <--
|
|
ILX Fwd_DMA 0 <--
|
|
ILX Inv 0 <--
|
|
ILX Data 0 <--
|
|
ILX L2_Replacement 0 <--
|
|
|
|
ILO L1_GETS 0 <--
|
|
ILO L1_GETX 0 <--
|
|
ILO L1_PUTO 0 <--
|
|
ILO L1_PUTX 0 <--
|
|
ILO L1_PUTS 0 <--
|
|
ILO Fwd_GETX 0 <--
|
|
ILO Fwd_GETS 0 <--
|
|
ILO Fwd_DMA 0 <--
|
|
ILO Inv 0 <--
|
|
ILO Data 0 <--
|
|
ILO L2_Replacement 0 <--
|
|
|
|
ILOX L1_GETS 0 <--
|
|
ILOX L1_GETX 0 <--
|
|
ILOX L1_PUTO 0 <--
|
|
ILOX L1_PUTX 0 <--
|
|
ILOX L1_PUTS 0 <--
|
|
ILOX Fwd_GETX 0 <--
|
|
ILOX Fwd_GETS 0 <--
|
|
ILOX Fwd_DMA 0 <--
|
|
ILOX Data 0 <--
|
|
|
|
ILOS L1_GETS 0 <--
|
|
ILOS L1_GETX 0 <--
|
|
ILOS L1_PUTO 0 <--
|
|
ILOS L1_PUTX 0 <--
|
|
ILOS L1_PUTS_only 0 <--
|
|
ILOS L1_PUTS 0 <--
|
|
ILOS Fwd_GETX 0 <--
|
|
ILOS Fwd_GETS 0 <--
|
|
ILOS Fwd_DMA 0 <--
|
|
ILOS Data 0 <--
|
|
ILOS L2_Replacement 0 <--
|
|
|
|
ILOSX L1_GETS 464
|
|
ILOSX L1_GETX 469
|
|
ILOSX L1_PUTO 0 <--
|
|
ILOSX L1_PUTX 0 <--
|
|
ILOSX L1_PUTS_only 0 <--
|
|
ILOSX L1_PUTS 0 <--
|
|
ILOSX Fwd_GETX 0 <--
|
|
ILOSX Fwd_GETS 0 <--
|
|
ILOSX Fwd_DMA 0 <--
|
|
ILOSX Data 0 <--
|
|
|
|
S L1_GETS 0 <--
|
|
S L1_GETX 0 <--
|
|
S L1_PUTX 0 <--
|
|
S L1_PUTS 0 <--
|
|
S Inv 0 <--
|
|
S L2_Replacement 0 <--
|
|
|
|
O L1_GETS 0 <--
|
|
O L1_GETX 0 <--
|
|
O L1_PUTX 0 <--
|
|
O Fwd_GETX 0 <--
|
|
O Fwd_GETS 0 <--
|
|
O Fwd_DMA 0 <--
|
|
O L2_Replacement 0 <--
|
|
|
|
OLS L1_GETS 0 <--
|
|
OLS L1_GETX 0 <--
|
|
OLS L1_PUTX 0 <--
|
|
OLS L1_PUTS_only 0 <--
|
|
OLS L1_PUTS 0 <--
|
|
OLS Fwd_GETX 0 <--
|
|
OLS Fwd_GETS 0 <--
|
|
OLS Fwd_DMA 0 <--
|
|
OLS L2_Replacement 0 <--
|
|
|
|
OLSX L1_GETS 0 <--
|
|
OLSX L1_GETX 0 <--
|
|
OLSX L1_PUTO 0 <--
|
|
OLSX L1_PUTX 0 <--
|
|
OLSX L1_PUTS_only 0 <--
|
|
OLSX L1_PUTS 0 <--
|
|
OLSX Fwd_GETX 0 <--
|
|
OLSX Fwd_GETS 0 <--
|
|
OLSX Fwd_DMA 0 <--
|
|
OLSX L2_Replacement 0 <--
|
|
|
|
SLS L1_GETS 0 <--
|
|
SLS L1_GETX 0 <--
|
|
SLS L1_PUTX 0 <--
|
|
SLS L1_PUTS_only 0 <--
|
|
SLS L1_PUTS 0 <--
|
|
SLS Inv 0 <--
|
|
SLS L2_Replacement 0 <--
|
|
|
|
M L1_GETS 0 <--
|
|
M L1_GETX 0 <--
|
|
M L1_PUTO 0 <--
|
|
M L1_PUTX 0 <--
|
|
M L1_PUTS 0 <--
|
|
M Fwd_GETX 0 <--
|
|
M Fwd_GETS 0 <--
|
|
M Fwd_DMA 0 <--
|
|
M L2_Replacement 0 <--
|
|
|
|
IFGX L1_GETS 0 <--
|
|
IFGX L1_GETX 0 <--
|
|
IFGX L1_PUTO 0 <--
|
|
IFGX L1_PUTX 0 <--
|
|
IFGX L1_PUTS_only 0 <--
|
|
IFGX L1_PUTS 0 <--
|
|
IFGX Fwd_GETX 0 <--
|
|
IFGX Fwd_GETS 0 <--
|
|
IFGX Fwd_DMA 0 <--
|
|
IFGX Inv 0 <--
|
|
IFGX Data 0 <--
|
|
IFGX Data_Exclusive 0 <--
|
|
IFGX L2_Replacement 0 <--
|
|
|
|
IFGS L1_GETS 0 <--
|
|
IFGS L1_GETX 0 <--
|
|
IFGS L1_PUTO 0 <--
|
|
IFGS L1_PUTX 0 <--
|
|
IFGS L1_PUTS_only 0 <--
|
|
IFGS L1_PUTS 0 <--
|
|
IFGS Fwd_GETX 0 <--
|
|
IFGS Fwd_GETS 0 <--
|
|
IFGS Fwd_DMA 0 <--
|
|
IFGS Inv 0 <--
|
|
IFGS Data 0 <--
|
|
IFGS Data_Exclusive 0 <--
|
|
IFGS L2_Replacement 0 <--
|
|
|
|
ISFGS L1_GETS 0 <--
|
|
ISFGS L1_GETX 0 <--
|
|
ISFGS L1_PUTO 0 <--
|
|
ISFGS L1_PUTX 0 <--
|
|
ISFGS L1_PUTS_only 0 <--
|
|
ISFGS L1_PUTS 0 <--
|
|
ISFGS Fwd_GETX 0 <--
|
|
ISFGS Fwd_GETS 0 <--
|
|
ISFGS Fwd_DMA 0 <--
|
|
ISFGS Inv 0 <--
|
|
ISFGS Data 0 <--
|
|
ISFGS L2_Replacement 0 <--
|
|
|
|
IFGXX L1_GETS 0 <--
|
|
IFGXX L1_GETX 0 <--
|
|
IFGXX L1_PUTO 0 <--
|
|
IFGXX L1_PUTX 0 <--
|
|
IFGXX L1_PUTS_only 0 <--
|
|
IFGXX L1_PUTS 0 <--
|
|
IFGXX Fwd_GETX 0 <--
|
|
IFGXX Fwd_GETS 0 <--
|
|
IFGXX Fwd_DMA 0 <--
|
|
IFGXX Inv 0 <--
|
|
IFGXX IntAck 0 <--
|
|
IFGXX All_Acks 0 <--
|
|
IFGXX Data_Exclusive 0 <--
|
|
IFGXX L2_Replacement 0 <--
|
|
|
|
OFGX L1_GETS 0 <--
|
|
OFGX L1_GETX 0 <--
|
|
OFGX L1_PUTO 0 <--
|
|
OFGX L1_PUTX 0 <--
|
|
OFGX L1_PUTS_only 0 <--
|
|
OFGX L1_PUTS 0 <--
|
|
OFGX Fwd_GETX 0 <--
|
|
OFGX Fwd_GETS 0 <--
|
|
OFGX Fwd_DMA 0 <--
|
|
OFGX Inv 0 <--
|
|
OFGX L2_Replacement 0 <--
|
|
|
|
OLSF L1_GETS 0 <--
|
|
OLSF L1_GETX 0 <--
|
|
OLSF L1_PUTO 0 <--
|
|
OLSF L1_PUTX 0 <--
|
|
OLSF L1_PUTS_only 0 <--
|
|
OLSF L1_PUTS 0 <--
|
|
OLSF Fwd_GETX 0 <--
|
|
OLSF Fwd_GETS 0 <--
|
|
OLSF Fwd_DMA 0 <--
|
|
OLSF Inv 0 <--
|
|
OLSF IntAck 0 <--
|
|
OLSF All_Acks 0 <--
|
|
OLSF L2_Replacement 0 <--
|
|
|
|
ILOW L1_GETS 0 <--
|
|
ILOW L1_GETX 0 <--
|
|
ILOW L1_PUTO 0 <--
|
|
ILOW L1_PUTX 0 <--
|
|
ILOW L1_PUTS_only 0 <--
|
|
ILOW L1_PUTS 0 <--
|
|
ILOW Fwd_GETX 0 <--
|
|
ILOW Fwd_GETS 0 <--
|
|
ILOW Fwd_DMA 0 <--
|
|
ILOW Inv 0 <--
|
|
ILOW L1_WBCLEANDATA 0 <--
|
|
ILOW L1_WBDIRTYDATA 0 <--
|
|
ILOW Unblock 0 <--
|
|
ILOW L2_Replacement 0 <--
|
|
|
|
ILOXW L1_GETS 0 <--
|
|
ILOXW L1_GETX 0 <--
|
|
ILOXW L1_PUTO 0 <--
|
|
ILOXW L1_PUTX 0 <--
|
|
ILOXW L1_PUTS_only 0 <--
|
|
ILOXW L1_PUTS 0 <--
|
|
ILOXW Fwd_GETX 0 <--
|
|
ILOXW Fwd_GETS 0 <--
|
|
ILOXW Fwd_DMA 0 <--
|
|
ILOXW Inv 0 <--
|
|
ILOXW L1_WBCLEANDATA 0 <--
|
|
ILOXW L1_WBDIRTYDATA 0 <--
|
|
ILOXW Unblock 0 <--
|
|
ILOXW L2_Replacement 0 <--
|
|
|
|
ILOSW L1_GETS 0 <--
|
|
ILOSW L1_GETX 0 <--
|
|
ILOSW L1_PUTO 0 <--
|
|
ILOSW L1_PUTX 0 <--
|
|
ILOSW L1_PUTS_only 0 <--
|
|
ILOSW L1_PUTS 0 <--
|
|
ILOSW Fwd_GETX 0 <--
|
|
ILOSW Fwd_GETS 0 <--
|
|
ILOSW Fwd_DMA 0 <--
|
|
ILOSW Inv 0 <--
|
|
ILOSW L1_WBCLEANDATA 0 <--
|
|
ILOSW L1_WBDIRTYDATA 0 <--
|
|
ILOSW Unblock 0 <--
|
|
ILOSW L2_Replacement 0 <--
|
|
|
|
ILOSXW L1_GETS 0 <--
|
|
ILOSXW L1_GETX 0 <--
|
|
ILOSXW L1_PUTO 0 <--
|
|
ILOSXW L1_PUTX 0 <--
|
|
ILOSXW L1_PUTS_only 0 <--
|
|
ILOSXW L1_PUTS 0 <--
|
|
ILOSXW Fwd_GETX 0 <--
|
|
ILOSXW Fwd_GETS 0 <--
|
|
ILOSXW Fwd_DMA 0 <--
|
|
ILOSXW Inv 0 <--
|
|
ILOSXW L1_WBCLEANDATA 0 <--
|
|
ILOSXW L1_WBDIRTYDATA 0 <--
|
|
ILOSXW Unblock 0 <--
|
|
ILOSXW L2_Replacement 0 <--
|
|
|
|
SLSW L1_GETS 0 <--
|
|
SLSW L1_GETX 0 <--
|
|
SLSW L1_PUTO 0 <--
|
|
SLSW L1_PUTX 0 <--
|
|
SLSW L1_PUTS_only 0 <--
|
|
SLSW L1_PUTS 0 <--
|
|
SLSW Fwd_GETX 0 <--
|
|
SLSW Fwd_GETS 0 <--
|
|
SLSW Fwd_DMA 0 <--
|
|
SLSW Inv 0 <--
|
|
SLSW Unblock 0 <--
|
|
SLSW L2_Replacement 0 <--
|
|
|
|
OLSW L1_GETS 0 <--
|
|
OLSW L1_GETX 0 <--
|
|
OLSW L1_PUTO 0 <--
|
|
OLSW L1_PUTX 0 <--
|
|
OLSW L1_PUTS_only 0 <--
|
|
OLSW L1_PUTS 0 <--
|
|
OLSW Fwd_GETX 0 <--
|
|
OLSW Fwd_GETS 0 <--
|
|
OLSW Fwd_DMA 0 <--
|
|
OLSW Inv 0 <--
|
|
OLSW Unblock 0 <--
|
|
OLSW L2_Replacement 0 <--
|
|
|
|
ILSW L1_GETS 0 <--
|
|
ILSW L1_GETX 0 <--
|
|
ILSW L1_PUTO 0 <--
|
|
ILSW L1_PUTX 0 <--
|
|
ILSW L1_PUTS_only 0 <--
|
|
ILSW L1_PUTS 0 <--
|
|
ILSW Fwd_GETX 0 <--
|
|
ILSW Fwd_GETS 0 <--
|
|
ILSW Fwd_DMA 0 <--
|
|
ILSW Inv 0 <--
|
|
ILSW L1_WBCLEANDATA 0 <--
|
|
ILSW Unblock 0 <--
|
|
ILSW L2_Replacement 0 <--
|
|
|
|
IW L1_GETS 0 <--
|
|
IW L1_GETX 0 <--
|
|
IW L1_PUTO 0 <--
|
|
IW L1_PUTX 0 <--
|
|
IW L1_PUTS_only 0 <--
|
|
IW L1_PUTS 0 <--
|
|
IW Fwd_GETX 0 <--
|
|
IW Fwd_GETS 0 <--
|
|
IW Fwd_DMA 0 <--
|
|
IW Inv 0 <--
|
|
IW L1_WBCLEANDATA 0 <--
|
|
IW L2_Replacement 0 <--
|
|
|
|
OW L1_GETS 0 <--
|
|
OW L1_GETX 0 <--
|
|
OW L1_PUTO 0 <--
|
|
OW L1_PUTX 0 <--
|
|
OW L1_PUTS_only 0 <--
|
|
OW L1_PUTS 0 <--
|
|
OW Fwd_GETX 0 <--
|
|
OW Fwd_GETS 0 <--
|
|
OW Fwd_DMA 0 <--
|
|
OW Inv 0 <--
|
|
OW Unblock 0 <--
|
|
OW L2_Replacement 0 <--
|
|
|
|
SW L1_GETS 0 <--
|
|
SW L1_GETX 0 <--
|
|
SW L1_PUTO 0 <--
|
|
SW L1_PUTX 0 <--
|
|
SW L1_PUTS_only 0 <--
|
|
SW L1_PUTS 0 <--
|
|
SW Fwd_GETX 0 <--
|
|
SW Fwd_GETS 0 <--
|
|
SW Fwd_DMA 0 <--
|
|
SW Inv 0 <--
|
|
SW Unblock 0 <--
|
|
SW L2_Replacement 0 <--
|
|
|
|
OXW L1_GETS 0 <--
|
|
OXW L1_GETX 0 <--
|
|
OXW L1_PUTO 0 <--
|
|
OXW L1_PUTX 0 <--
|
|
OXW L1_PUTS_only 0 <--
|
|
OXW L1_PUTS 0 <--
|
|
OXW Fwd_GETX 0 <--
|
|
OXW Fwd_GETS 0 <--
|
|
OXW Fwd_DMA 0 <--
|
|
OXW Inv 0 <--
|
|
OXW Unblock 0 <--
|
|
OXW L2_Replacement 0 <--
|
|
|
|
OLSXW L1_GETS 0 <--
|
|
OLSXW L1_GETX 0 <--
|
|
OLSXW L1_PUTO 0 <--
|
|
OLSXW L1_PUTX 0 <--
|
|
OLSXW L1_PUTS_only 0 <--
|
|
OLSXW L1_PUTS 0 <--
|
|
OLSXW Fwd_GETX 0 <--
|
|
OLSXW Fwd_GETS 0 <--
|
|
OLSXW Fwd_DMA 0 <--
|
|
OLSXW Inv 0 <--
|
|
OLSXW Unblock 0 <--
|
|
OLSXW L2_Replacement 0 <--
|
|
|
|
ILXW L1_GETS 0 <--
|
|
ILXW L1_GETX 0 <--
|
|
ILXW L1_PUTO 0 <--
|
|
ILXW L1_PUTX 0 <--
|
|
ILXW L1_PUTS_only 0 <--
|
|
ILXW L1_PUTS 0 <--
|
|
ILXW Fwd_GETX 0 <--
|
|
ILXW Fwd_GETS 0 <--
|
|
ILXW Fwd_DMA 0 <--
|
|
ILXW Inv 0 <--
|
|
ILXW Data 0 <--
|
|
ILXW L1_WBCLEANDATA 0 <--
|
|
ILXW L1_WBDIRTYDATA 0 <--
|
|
ILXW Unblock 0 <--
|
|
ILXW L2_Replacement 0 <--
|
|
|
|
IFLS L1_GETS 0 <--
|
|
IFLS L1_GETX 0 <--
|
|
IFLS L1_PUTO 0 <--
|
|
IFLS L1_PUTX 0 <--
|
|
IFLS L1_PUTS_only 0 <--
|
|
IFLS L1_PUTS 0 <--
|
|
IFLS Fwd_GETX 0 <--
|
|
IFLS Fwd_GETS 0 <--
|
|
IFLS Fwd_DMA 0 <--
|
|
IFLS Inv 0 <--
|
|
IFLS Unblock 0 <--
|
|
IFLS L2_Replacement 0 <--
|
|
|
|
IFLO L1_GETS 0 <--
|
|
IFLO L1_GETX 0 <--
|
|
IFLO L1_PUTO 0 <--
|
|
IFLO L1_PUTX 0 <--
|
|
IFLO L1_PUTS_only 0 <--
|
|
IFLO L1_PUTS 0 <--
|
|
IFLO Fwd_GETX 0 <--
|
|
IFLO Fwd_GETS 0 <--
|
|
IFLO Fwd_DMA 0 <--
|
|
IFLO Inv 0 <--
|
|
IFLO Unblock 0 <--
|
|
IFLO L2_Replacement 0 <--
|
|
|
|
IFLOX L1_GETS 0 <--
|
|
IFLOX L1_GETX 0 <--
|
|
IFLOX L1_PUTO 0 <--
|
|
IFLOX L1_PUTX 0 <--
|
|
IFLOX L1_PUTS_only 0 <--
|
|
IFLOX L1_PUTS 0 <--
|
|
IFLOX Fwd_GETX 0 <--
|
|
IFLOX Fwd_GETS 0 <--
|
|
IFLOX Fwd_DMA 0 <--
|
|
IFLOX Inv 0 <--
|
|
IFLOX Unblock 0 <--
|
|
IFLOX Exclusive_Unblock 0 <--
|
|
IFLOX L2_Replacement 0 <--
|
|
|
|
IFLOXX L1_GETS 2656172
|
|
IFLOXX L1_GETX 1471349
|
|
IFLOXX L1_PUTO 0 <--
|
|
IFLOXX L1_PUTX 0 <--
|
|
IFLOXX L1_PUTS_only 0 <--
|
|
IFLOXX L1_PUTS 0 <--
|
|
IFLOXX Fwd_GETX 0 <--
|
|
IFLOXX Fwd_GETS 0 <--
|
|
IFLOXX Fwd_DMA 0 <--
|
|
IFLOXX Inv 0 <--
|
|
IFLOXX Unblock 469
|
|
IFLOXX Exclusive_Unblock 102758
|
|
IFLOXX L2_Replacement 0 <--
|
|
|
|
IFLOSX L1_GETS 3369
|
|
IFLOSX L1_GETX 4420
|
|
IFLOSX L1_PUTO 0 <--
|
|
IFLOSX L1_PUTX 0 <--
|
|
IFLOSX L1_PUTS_only 0 <--
|
|
IFLOSX L1_PUTS 0 <--
|
|
IFLOSX Fwd_GETX 0 <--
|
|
IFLOSX Fwd_GETS 0 <--
|
|
IFLOSX Fwd_DMA 0 <--
|
|
IFLOSX Inv 0 <--
|
|
IFLOSX Unblock 464
|
|
IFLOSX Exclusive_Unblock 0 <--
|
|
IFLOSX L2_Replacement 0 <--
|
|
|
|
IFLXO L1_GETS 3686
|
|
IFLXO L1_GETX 4665
|
|
IFLXO L1_PUTO 0 <--
|
|
IFLXO L1_PUTX 0 <--
|
|
IFLXO L1_PUTS_only 0 <--
|
|
IFLXO L1_PUTS 0 <--
|
|
IFLXO Fwd_GETX 0 <--
|
|
IFLXO Fwd_GETS 0 <--
|
|
IFLXO Fwd_DMA 0 <--
|
|
IFLXO Inv 0 <--
|
|
IFLXO Exclusive_Unblock 469
|
|
IFLXO L2_Replacement 0 <--
|
|
|
|
IGS L1_GETS 0 <--
|
|
IGS L1_GETX 0 <--
|
|
IGS L1_PUTO 0 <--
|
|
IGS L1_PUTX 0 <--
|
|
IGS L1_PUTS_only 0 <--
|
|
IGS L1_PUTS 0 <--
|
|
IGS Fwd_GETX 0 <--
|
|
IGS Fwd_GETS 0 <--
|
|
IGS Fwd_DMA 0 <--
|
|
IGS Own_GETX 0 <--
|
|
IGS Inv 0 <--
|
|
IGS Data 0 <--
|
|
IGS Data_Exclusive 0 <--
|
|
IGS Unblock 0 <--
|
|
IGS Exclusive_Unblock 0 <--
|
|
IGS L2_Replacement 0 <--
|
|
|
|
IGM L1_GETS 244
|
|
IGM L1_GETX 183
|
|
IGM L1_PUTO 0 <--
|
|
IGM L1_PUTX 0 <--
|
|
IGM L1_PUTS_only 0 <--
|
|
IGM L1_PUTS 0 <--
|
|
IGM Fwd_GETX 0 <--
|
|
IGM Fwd_GETS 0 <--
|
|
IGM Fwd_DMA 0 <--
|
|
IGM Own_GETX 0 <--
|
|
IGM Inv 0 <--
|
|
IGM ExtAck 0 <--
|
|
IGM Data 2
|
|
IGM Data_Exclusive 0 <--
|
|
IGM L2_Replacement 0 <--
|
|
|
|
IGMLS L1_GETS 0 <--
|
|
IGMLS L1_GETX 0 <--
|
|
IGMLS L1_PUTO 0 <--
|
|
IGMLS L1_PUTX 0 <--
|
|
IGMLS L1_PUTS_only 0 <--
|
|
IGMLS L1_PUTS 0 <--
|
|
IGMLS Inv 0 <--
|
|
IGMLS IntAck 0 <--
|
|
IGMLS ExtAck 0 <--
|
|
IGMLS All_Acks 0 <--
|
|
IGMLS Data 0 <--
|
|
IGMLS Data_Exclusive 0 <--
|
|
IGMLS L2_Replacement 0 <--
|
|
|
|
IGMO L1_GETS 16
|
|
IGMO L1_GETX 12
|
|
IGMO L1_PUTO 0 <--
|
|
IGMO L1_PUTX 0 <--
|
|
IGMO L1_PUTS_only 0 <--
|
|
IGMO L1_PUTS 0 <--
|
|
IGMO Fwd_GETX 0 <--
|
|
IGMO Fwd_GETS 0 <--
|
|
IGMO Fwd_DMA 0 <--
|
|
IGMO Own_GETX 0 <--
|
|
IGMO ExtAck 0 <--
|
|
IGMO All_Acks 2
|
|
IGMO Exclusive_Unblock 2
|
|
IGMO L2_Replacement 0 <--
|
|
|
|
IGMIO L1_GETS 0 <--
|
|
IGMIO L1_GETX 0 <--
|
|
IGMIO L1_PUTO 0 <--
|
|
IGMIO L1_PUTX 0 <--
|
|
IGMIO L1_PUTS_only 0 <--
|
|
IGMIO L1_PUTS 0 <--
|
|
IGMIO Fwd_GETX 0 <--
|
|
IGMIO Fwd_GETS 0 <--
|
|
IGMIO Fwd_DMA 0 <--
|
|
IGMIO Own_GETX 0 <--
|
|
IGMIO ExtAck 0 <--
|
|
IGMIO All_Acks 0 <--
|
|
|
|
OGMIO L1_GETS 0 <--
|
|
OGMIO L1_GETX 0 <--
|
|
OGMIO L1_PUTO 0 <--
|
|
OGMIO L1_PUTX 0 <--
|
|
OGMIO L1_PUTS_only 0 <--
|
|
OGMIO L1_PUTS 0 <--
|
|
OGMIO Fwd_GETX 0 <--
|
|
OGMIO Fwd_GETS 0 <--
|
|
OGMIO Fwd_DMA 0 <--
|
|
OGMIO Own_GETX 0 <--
|
|
OGMIO ExtAck 0 <--
|
|
OGMIO All_Acks 0 <--
|
|
|
|
IGMIOF L1_GETS 0 <--
|
|
IGMIOF L1_GETX 0 <--
|
|
IGMIOF L1_PUTO 0 <--
|
|
IGMIOF L1_PUTX 0 <--
|
|
IGMIOF L1_PUTS_only 0 <--
|
|
IGMIOF L1_PUTS 0 <--
|
|
IGMIOF IntAck 0 <--
|
|
IGMIOF All_Acks 0 <--
|
|
IGMIOF Data_Exclusive 0 <--
|
|
|
|
IGMIOFS L1_GETS 0 <--
|
|
IGMIOFS L1_GETX 0 <--
|
|
IGMIOFS L1_PUTO 0 <--
|
|
IGMIOFS L1_PUTX 0 <--
|
|
IGMIOFS L1_PUTS_only 0 <--
|
|
IGMIOFS L1_PUTS 0 <--
|
|
IGMIOFS Fwd_GETX 0 <--
|
|
IGMIOFS Fwd_GETS 0 <--
|
|
IGMIOFS Fwd_DMA 0 <--
|
|
IGMIOFS Inv 0 <--
|
|
IGMIOFS Data 0 <--
|
|
IGMIOFS L2_Replacement 0 <--
|
|
|
|
OGMIOF L1_GETS 0 <--
|
|
OGMIOF L1_GETX 0 <--
|
|
OGMIOF L1_PUTO 0 <--
|
|
OGMIOF L1_PUTX 0 <--
|
|
OGMIOF L1_PUTS_only 0 <--
|
|
OGMIOF L1_PUTS 0 <--
|
|
OGMIOF IntAck 0 <--
|
|
OGMIOF All_Acks 0 <--
|
|
|
|
II L1_GETS 0 <--
|
|
II L1_GETX 0 <--
|
|
II L1_PUTO 0 <--
|
|
II L1_PUTX 0 <--
|
|
II L1_PUTS_only 0 <--
|
|
II L1_PUTS 0 <--
|
|
II IntAck 0 <--
|
|
II All_Acks 0 <--
|
|
|
|
MM L1_GETS 0 <--
|
|
MM L1_GETX 0 <--
|
|
MM L1_PUTO 0 <--
|
|
MM L1_PUTX 0 <--
|
|
MM L1_PUTS_only 0 <--
|
|
MM L1_PUTS 0 <--
|
|
MM Fwd_GETX 0 <--
|
|
MM Fwd_GETS 0 <--
|
|
MM Fwd_DMA 0 <--
|
|
MM Inv 0 <--
|
|
MM Exclusive_Unblock 0 <--
|
|
MM L2_Replacement 0 <--
|
|
|
|
SS L1_GETS 0 <--
|
|
SS L1_GETX 0 <--
|
|
SS L1_PUTO 0 <--
|
|
SS L1_PUTX 0 <--
|
|
SS L1_PUTS_only 0 <--
|
|
SS L1_PUTS 0 <--
|
|
SS Fwd_GETX 0 <--
|
|
SS Fwd_GETS 0 <--
|
|
SS Fwd_DMA 0 <--
|
|
SS Inv 0 <--
|
|
SS Unblock 0 <--
|
|
SS L2_Replacement 0 <--
|
|
|
|
OO L1_GETS 0 <--
|
|
OO L1_GETX 0 <--
|
|
OO L1_PUTO 0 <--
|
|
OO L1_PUTX 0 <--
|
|
OO L1_PUTS_only 0 <--
|
|
OO L1_PUTS 0 <--
|
|
OO Fwd_GETX 0 <--
|
|
OO Fwd_GETS 0 <--
|
|
OO Fwd_DMA 0 <--
|
|
OO Inv 0 <--
|
|
OO Unblock 0 <--
|
|
OO Exclusive_Unblock 0 <--
|
|
OO L2_Replacement 0 <--
|
|
|
|
OLSS L1_GETS 0 <--
|
|
OLSS L1_GETX 0 <--
|
|
OLSS L1_PUTO 0 <--
|
|
OLSS L1_PUTX 0 <--
|
|
OLSS L1_PUTS_only 0 <--
|
|
OLSS L1_PUTS 0 <--
|
|
OLSS Fwd_GETX 0 <--
|
|
OLSS Fwd_GETS 0 <--
|
|
OLSS Fwd_DMA 0 <--
|
|
OLSS Inv 0 <--
|
|
OLSS Unblock 0 <--
|
|
OLSS L2_Replacement 0 <--
|
|
|
|
OLSXS L1_GETS 0 <--
|
|
OLSXS L1_GETX 0 <--
|
|
OLSXS L1_PUTO 0 <--
|
|
OLSXS L1_PUTX 0 <--
|
|
OLSXS L1_PUTS_only 0 <--
|
|
OLSXS L1_PUTS 0 <--
|
|
OLSXS Fwd_GETX 0 <--
|
|
OLSXS Fwd_GETS 0 <--
|
|
OLSXS Fwd_DMA 0 <--
|
|
OLSXS Inv 0 <--
|
|
OLSXS Unblock 0 <--
|
|
OLSXS L2_Replacement 0 <--
|
|
|
|
SLSS L1_GETS 0 <--
|
|
SLSS L1_GETX 0 <--
|
|
SLSS L1_PUTO 0 <--
|
|
SLSS L1_PUTX 0 <--
|
|
SLSS L1_PUTS_only 0 <--
|
|
SLSS L1_PUTS 0 <--
|
|
SLSS Fwd_GETX 0 <--
|
|
SLSS Fwd_GETS 0 <--
|
|
SLSS Fwd_DMA 0 <--
|
|
SLSS Inv 0 <--
|
|
SLSS Unblock 0 <--
|
|
SLSS L2_Replacement 0 <--
|
|
|
|
OI L1_GETS 0 <--
|
|
OI L1_GETX 0 <--
|
|
OI L1_PUTO 0 <--
|
|
OI L1_PUTX 0 <--
|
|
OI L1_PUTS_only 0 <--
|
|
OI L1_PUTS 0 <--
|
|
OI Fwd_GETX 0 <--
|
|
OI Fwd_GETS 0 <--
|
|
OI Fwd_DMA 0 <--
|
|
OI Writeback_Ack 0 <--
|
|
OI Writeback_Nack 0 <--
|
|
OI L2_Replacement 0 <--
|
|
|
|
MI L1_GETS 0 <--
|
|
MI L1_GETX 0 <--
|
|
MI L1_PUTO 0 <--
|
|
MI L1_PUTX 0 <--
|
|
MI L1_PUTS_only 0 <--
|
|
MI L1_PUTS 0 <--
|
|
MI Fwd_GETX 0 <--
|
|
MI Fwd_GETS 0 <--
|
|
MI Fwd_DMA 0 <--
|
|
MI Writeback_Ack 0 <--
|
|
MI L2_Replacement 0 <--
|
|
|
|
MII L1_GETS 0 <--
|
|
MII L1_GETX 0 <--
|
|
MII L1_PUTO 0 <--
|
|
MII L1_PUTX 0 <--
|
|
MII L1_PUTS_only 0 <--
|
|
MII L1_PUTS 0 <--
|
|
MII Writeback_Ack 0 <--
|
|
MII Writeback_Nack 0 <--
|
|
MII L2_Replacement 0 <--
|
|
|
|
OLSI L1_GETS 0 <--
|
|
OLSI L1_GETX 0 <--
|
|
OLSI L1_PUTO 0 <--
|
|
OLSI L1_PUTX 0 <--
|
|
OLSI L1_PUTS_only 0 <--
|
|
OLSI L1_PUTS 0 <--
|
|
OLSI Fwd_GETX 0 <--
|
|
OLSI Fwd_GETS 0 <--
|
|
OLSI Fwd_DMA 0 <--
|
|
OLSI Writeback_Ack 0 <--
|
|
OLSI L2_Replacement 0 <--
|
|
|
|
ILSI L1_GETS 0 <--
|
|
ILSI L1_GETX 0 <--
|
|
ILSI L1_PUTO 0 <--
|
|
ILSI L1_PUTX 0 <--
|
|
ILSI L1_PUTS_only 0 <--
|
|
ILSI L1_PUTS 0 <--
|
|
ILSI IntAck 0 <--
|
|
ILSI All_Acks 0 <--
|
|
ILSI Writeback_Ack 0 <--
|
|
ILSI L2_Replacement 0 <--
|
|
|
|
Memory controller: system.ruby.network.topology.ext_links9.ext_node.memBuffer:
|
|
memory_total_requests: 2
|
|
memory_reads: 2
|
|
memory_writes: 0
|
|
memory_refreshes: 22
|
|
memory_total_request_delays: 31
|
|
memory_delays_per_request: 15.5
|
|
memory_delays_in_input_queue: 1
|
|
memory_delays_behind_head_of_bank_queue: 10
|
|
memory_delays_stalled_at_head_of_bank_queue: 20
|
|
memory_stalls_for_bank_busy: 20
|
|
memory_stalls_for_random_busy: 0
|
|
memory_stalls_for_anti_starvation: 0
|
|
memory_stalls_for_arbitration: 0
|
|
memory_stalls_for_bus: 0
|
|
memory_stalls_for_tfaw: 0
|
|
memory_stalls_for_read_write_turnaround: 0
|
|
memory_stalls_for_read_read_turnaround: 0
|
|
accesses_per_bank: 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
|
|
|
|
--- Directory 0 ---
|
|
- Event Counts -
|
|
GETX 2
|
|
GETS 0
|
|
PUTX 0
|
|
PUTO 0
|
|
PUTO_SHARERS 0
|
|
Unblock 0
|
|
Last_Unblock 0
|
|
Exclusive_Unblock 2
|
|
Clean_Writeback 0
|
|
Dirty_Writeback 0
|
|
Memory_Data 2
|
|
Memory_Ack 0
|
|
DMA_READ 0
|
|
DMA_WRITE 0
|
|
Data 0
|
|
|
|
- Transitions -
|
|
I GETX 2
|
|
I GETS 0 <--
|
|
I PUTX 0 <--
|
|
I PUTO 0 <--
|
|
I Memory_Data 0 <--
|
|
I Memory_Ack 0 <--
|
|
I DMA_READ 0 <--
|
|
I DMA_WRITE 0 <--
|
|
|
|
S GETX 0 <--
|
|
S GETS 0 <--
|
|
S PUTX 0 <--
|
|
S PUTO 0 <--
|
|
S Memory_Data 0 <--
|
|
S Memory_Ack 0 <--
|
|
S DMA_READ 0 <--
|
|
S DMA_WRITE 0 <--
|
|
|
|
O GETX 0 <--
|
|
O GETS 0 <--
|
|
O PUTX 0 <--
|
|
O PUTO 0 <--
|
|
O PUTO_SHARERS 0 <--
|
|
O Memory_Data 0 <--
|
|
O Memory_Ack 0 <--
|
|
O DMA_READ 0 <--
|
|
O DMA_WRITE 0 <--
|
|
|
|
M GETX 0 <--
|
|
M GETS 0 <--
|
|
M PUTX 0 <--
|
|
M PUTO 0 <--
|
|
M PUTO_SHARERS 0 <--
|
|
M Memory_Data 0 <--
|
|
M Memory_Ack 0 <--
|
|
M DMA_READ 0 <--
|
|
M DMA_WRITE 0 <--
|
|
|
|
IS GETX 0 <--
|
|
IS GETS 0 <--
|
|
IS PUTX 0 <--
|
|
IS PUTO 0 <--
|
|
IS PUTO_SHARERS 0 <--
|
|
IS Unblock 0 <--
|
|
IS Exclusive_Unblock 0 <--
|
|
IS Memory_Data 0 <--
|
|
IS Memory_Ack 0 <--
|
|
IS DMA_READ 0 <--
|
|
IS DMA_WRITE 0 <--
|
|
|
|
SS GETX 0 <--
|
|
SS GETS 0 <--
|
|
SS PUTX 0 <--
|
|
SS PUTO 0 <--
|
|
SS PUTO_SHARERS 0 <--
|
|
SS Unblock 0 <--
|
|
SS Last_Unblock 0 <--
|
|
SS Memory_Data 0 <--
|
|
SS Memory_Ack 0 <--
|
|
SS DMA_READ 0 <--
|
|
SS DMA_WRITE 0 <--
|
|
|
|
OO GETX 0 <--
|
|
OO GETS 0 <--
|
|
OO PUTX 0 <--
|
|
OO PUTO 0 <--
|
|
OO PUTO_SHARERS 0 <--
|
|
OO Unblock 0 <--
|
|
OO Last_Unblock 0 <--
|
|
OO Memory_Data 0 <--
|
|
OO Memory_Ack 0 <--
|
|
OO DMA_READ 0 <--
|
|
OO DMA_WRITE 0 <--
|
|
|
|
MO GETX 0 <--
|
|
MO GETS 0 <--
|
|
MO PUTX 0 <--
|
|
MO PUTO 0 <--
|
|
MO PUTO_SHARERS 0 <--
|
|
MO Unblock 0 <--
|
|
MO Exclusive_Unblock 0 <--
|
|
MO Memory_Data 0 <--
|
|
MO Memory_Ack 0 <--
|
|
MO DMA_READ 0 <--
|
|
MO DMA_WRITE 0 <--
|
|
|
|
MM GETX 0 <--
|
|
MM GETS 0 <--
|
|
MM PUTX 0 <--
|
|
MM PUTO 0 <--
|
|
MM PUTO_SHARERS 0 <--
|
|
MM Exclusive_Unblock 2
|
|
MM Memory_Data 2
|
|
MM Memory_Ack 0 <--
|
|
MM DMA_READ 0 <--
|
|
MM DMA_WRITE 0 <--
|
|
|
|
|
|
MI GETX 0 <--
|
|
MI GETS 0 <--
|
|
MI PUTX 0 <--
|
|
MI PUTO 0 <--
|
|
MI PUTO_SHARERS 0 <--
|
|
MI Unblock 0 <--
|
|
MI Clean_Writeback 0 <--
|
|
MI Dirty_Writeback 0 <--
|
|
MI Memory_Data 0 <--
|
|
MI Memory_Ack 0 <--
|
|
MI DMA_READ 0 <--
|
|
MI DMA_WRITE 0 <--
|
|
|
|
MIS GETX 0 <--
|
|
MIS GETS 0 <--
|
|
MIS PUTX 0 <--
|
|
MIS PUTO 0 <--
|
|
MIS PUTO_SHARERS 0 <--
|
|
MIS Unblock 0 <--
|
|
MIS Clean_Writeback 0 <--
|
|
MIS Dirty_Writeback 0 <--
|
|
MIS Memory_Data 0 <--
|
|
MIS Memory_Ack 0 <--
|
|
MIS DMA_READ 0 <--
|
|
MIS DMA_WRITE 0 <--
|
|
|
|
OS GETX 0 <--
|
|
OS GETS 0 <--
|
|
OS PUTX 0 <--
|
|
OS PUTO 0 <--
|
|
OS PUTO_SHARERS 0 <--
|
|
OS Unblock 0 <--
|
|
OS Clean_Writeback 0 <--
|
|
OS Dirty_Writeback 0 <--
|
|
OS Memory_Data 0 <--
|
|
OS Memory_Ack 0 <--
|
|
OS DMA_READ 0 <--
|
|
OS DMA_WRITE 0 <--
|
|
|
|
OSS GETX 0 <--
|
|
OSS GETS 0 <--
|
|
OSS PUTX 0 <--
|
|
OSS PUTO 0 <--
|
|
OSS PUTO_SHARERS 0 <--
|
|
OSS Unblock 0 <--
|
|
OSS Clean_Writeback 0 <--
|
|
OSS Dirty_Writeback 0 <--
|
|
OSS Memory_Data 0 <--
|
|
OSS Memory_Ack 0 <--
|
|
OSS DMA_READ 0 <--
|
|
OSS DMA_WRITE 0 <--
|
|
|
|
XI_M GETX 0 <--
|
|
XI_M GETS 0 <--
|
|
XI_M PUTX 0 <--
|
|
XI_M PUTO 0 <--
|
|
XI_M PUTO_SHARERS 0 <--
|
|
XI_M Memory_Data 0 <--
|
|
XI_M Memory_Ack 0 <--
|
|
XI_M DMA_READ 0 <--
|
|
XI_M DMA_WRITE 0 <--
|
|
|
|
XI_U GETX 0 <--
|
|
XI_U GETS 0 <--
|
|
XI_U PUTX 0 <--
|
|
XI_U PUTO 0 <--
|
|
XI_U PUTO_SHARERS 0 <--
|
|
XI_U Exclusive_Unblock 0 <--
|
|
XI_U Memory_Ack 0 <--
|
|
XI_U DMA_READ 0 <--
|
|
XI_U DMA_WRITE 0 <--
|
|
|
|
OI_D GETX 0 <--
|
|
OI_D GETS 0 <--
|
|
OI_D PUTX 0 <--
|
|
OI_D PUTO 0 <--
|
|
OI_D PUTO_SHARERS 0 <--
|
|
OI_D DMA_READ 0 <--
|
|
OI_D DMA_WRITE 0 <--
|
|
OI_D Data 0 <--
|
|
|