gem5/src
Ali Saidi 7dde557fdc O3: Tighten memory order violation checking to 16 bytes.
The comment in the code suggests that the checking granularity should be 16
bytes, however in reality the shift by 8 is 256 bytes which seems much
larger than required.
2011-04-04 11:42:23 -05:00
..
arch ARM: Remove debugging warn that was accidently left in. 2011-04-04 11:42:23 -05:00
base base: disable FastAlloc in debug builds by default 2011-03-18 11:47:11 -07:00
cpu O3: Tighten memory order violation checking to 16 bytes. 2011-04-04 11:42:23 -05:00
dev IDE: Support x86, Alpha, and ARM use of the IDE controller. 2011-04-04 11:42:23 -05:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern ARM: Fix multiplication error in udelay 2011-04-04 11:42:23 -05:00
mem hammer: fixed dma uniproc error 2011-04-01 15:50:23 -07:00
python swig: get rid of m5.internal.random module (swig/random.i) 2011-03-18 11:47:15 -07:00
sim sim: typecast Tick to UTick for eventQ assert 2011-03-29 19:36:36 -04:00
unittest Unit tests: Convert the refcnttest unit test to use the new EXPECT macros. 2011-01-18 01:27:04 -08:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript SCons: Stop embedding the mercurial revision into the binary. 2011-03-11 11:27:36 -08:00