3ed62ad025
arch/SConscript:
Sorted the switch headers, and added registerfile.hh, constants.hh, types.hh, and utility.hh.
arch/alpha/isa_traits.hh:
Moved the register file types to registerfile.hh, small functions to utility.hh, and cleaned out alot of stuff that isn't necessary anymore.
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
mem/port.hh:
sim/faults.cc:
sim/system.hh:
base/misc.hh isn't included through isa_traits.hh anymore.
cpu/simple/cpu.cc:
Added include for arch/utility.hh
--HG--
extra : convert_revision : 24f65f330f87e3c909c939596cfcf48336022eaf
112 lines
3.6 KiB
C++
112 lines
3.6 KiB
C++
/*
|
|
* Copyright (c) 2003-2005 The Regents of The University of Michigan
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions are
|
|
* met: redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer;
|
|
* redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution;
|
|
* neither the name of the copyright holders nor the names of its
|
|
* contributors may be used to endorse or promote products derived from
|
|
* this software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*/
|
|
|
|
#ifndef __ARCH_ALPHA_ISA_TRAITS_HH__
|
|
#define __ARCH_ALPHA_ISA_TRAITS_HH__
|
|
|
|
namespace LittleEndianGuest {}
|
|
using namespace LittleEndianGuest;
|
|
|
|
#include "arch/alpha/types.hh"
|
|
#include "arch/alpha/constants.hh"
|
|
#include "arch/alpha/registerfile.hh"
|
|
#include "config/full_system.hh"
|
|
#include "sim/host.hh"
|
|
|
|
class StaticInstPtr;
|
|
|
|
#if !FULL_SYSTEM
|
|
class SyscallReturn {
|
|
public:
|
|
template <class T>
|
|
SyscallReturn(T v, bool s)
|
|
{
|
|
retval = (uint64_t)v;
|
|
success = s;
|
|
}
|
|
|
|
template <class T>
|
|
SyscallReturn(T v)
|
|
{
|
|
success = (v >= 0);
|
|
retval = (uint64_t)v;
|
|
}
|
|
|
|
~SyscallReturn() {}
|
|
|
|
SyscallReturn& operator=(const SyscallReturn& s) {
|
|
retval = s.retval;
|
|
success = s.success;
|
|
return *this;
|
|
}
|
|
|
|
bool successful() { return success; }
|
|
uint64_t value() { return retval; }
|
|
|
|
|
|
private:
|
|
uint64_t retval;
|
|
bool success;
|
|
};
|
|
|
|
#endif
|
|
|
|
namespace AlphaISA
|
|
{
|
|
|
|
// redirected register map, really only used for the full system case.
|
|
extern const int reg_redir[NumIntRegs];
|
|
|
|
#if FULL_SYSTEM
|
|
|
|
#include "arch/alpha/isa_fullsys_traits.hh"
|
|
|
|
#endif
|
|
|
|
StaticInstPtr decodeInst(ExtMachInst);
|
|
|
|
#if !FULL_SYSTEM
|
|
static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
|
|
{
|
|
// check for error condition. Alpha syscall convention is to
|
|
// indicate success/failure in reg a3 (r19) and put the
|
|
// return value itself in the standard return value reg (v0).
|
|
if (return_value.successful()) {
|
|
// no error
|
|
regs->intRegFile[SyscallSuccessReg] = 0;
|
|
regs->intRegFile[ReturnValueReg] = return_value.value();
|
|
} else {
|
|
// got an error, return details
|
|
regs->intRegFile[SyscallSuccessReg] = (IntReg) -1;
|
|
regs->intRegFile[ReturnValueReg] = -return_value.value();
|
|
}
|
|
}
|
|
#endif
|
|
};
|
|
|
|
#endif // __ARCH_ALPHA_ISA_TRAITS_HH__
|