66 lines
6.8 KiB
Text
66 lines
6.8 KiB
Text
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.000003 # Number of seconds simulated
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sim_ticks 2900000 # Number of ticks simulated
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final_tick 2900000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 413372 # Simulator instruction rate (inst/s)
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host_op_rate 412979 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 206267825 # Simulator tick rate (ticks/s)
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host_mem_usage 201744 # Number of bytes of host memory used
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host_seconds 0.01 # Real time elapsed on the host
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sim_insts 5801 # Number of instructions simulated
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sim_ops 5801 # Number of ops (including micro ops) simulated
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system.physmem.bytes_read 26925 # Number of bytes read from this memory
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system.physmem.bytes_inst_read 23204 # Number of instructions bytes read from this memory
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system.physmem.bytes_written 4209 # Number of bytes written to this memory
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system.physmem.num_reads 6763 # Number of read requests responded to by this memory
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system.physmem.num_writes 1046 # Number of write requests responded to by this memory
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system.physmem.num_other 0 # Number of other requests responded to by this memory
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system.physmem.bw_read 9284482759 # Total read bandwidth from this memory (bytes/s)
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system.physmem.bw_inst_read 8001379310 # Instruction read bandwidth from this memory (bytes/s)
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system.physmem.bw_write 1451379310 # Write bandwidth from this memory (bytes/s)
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system.physmem.bw_total 10735862069 # Total bandwidth to/from this memory (bytes/s)
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system.cpu.dtb.read_hits 0 # DTB read hits
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system.cpu.dtb.read_misses 0 # DTB read misses
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system.cpu.dtb.read_accesses 0 # DTB read accesses
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system.cpu.dtb.write_hits 0 # DTB write hits
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system.cpu.dtb.write_misses 0 # DTB write misses
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system.cpu.dtb.write_accesses 0 # DTB write accesses
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system.cpu.dtb.hits 0 # DTB hits
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system.cpu.dtb.misses 0 # DTB misses
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system.cpu.dtb.accesses 0 # DTB accesses
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system.cpu.itb.read_hits 0 # DTB read hits
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system.cpu.itb.read_misses 0 # DTB read misses
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system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.itb.write_accesses 0 # DTB write accesses
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system.cpu.itb.hits 0 # DTB hits
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system.cpu.itb.misses 0 # DTB misses
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system.cpu.itb.accesses 0 # DTB accesses
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system.cpu.workload.num_syscalls 9 # Number of system calls
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system.cpu.numCycles 5801 # number of cpu cycles simulated
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system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
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system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
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system.cpu.committedInsts 5801 # Number of instructions committed
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system.cpu.committedOps 5801 # Number of ops (including micro ops) committed
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system.cpu.num_int_alu_accesses 5706 # Number of integer alu accesses
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system.cpu.num_fp_alu_accesses 22 # Number of float alu accesses
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system.cpu.num_func_calls 200 # number of times a function call or return occured
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system.cpu.num_conditional_control_insts 896 # number of instructions that are conditional controls
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system.cpu.num_int_insts 5706 # number of integer instructions
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system.cpu.num_fp_insts 22 # number of float instructions
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system.cpu.num_int_register_reads 9541 # number of times the integer registers were read
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system.cpu.num_int_register_writes 5005 # number of times the integer registers were written
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system.cpu.num_fp_register_reads 20 # number of times the floating registers were read
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system.cpu.num_fp_register_writes 2 # number of times the floating registers were written
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system.cpu.num_mem_refs 2008 # number of memory refs
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system.cpu.num_load_insts 962 # Number of load instructions
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system.cpu.num_store_insts 1046 # Number of store instructions
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system.cpu.num_idle_cycles 0 # Number of idle cycles
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system.cpu.num_busy_cycles 5801 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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---------- End Simulation Statistics ----------
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