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gem5/src/mem
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Nilay Vaish 04a558bb41 Garnet: Correct computation of link utilization 
The computation for link utilization was incorrect for the flexible network.
The utilization was being divided twice by the total time.
2012-04-28 16:57:31 -05:00
..
cache MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
config Fixes to get prefetching working again. 2009-02-16 08:56:40 -08:00
protocol MOESI_hammer: tbe allocation and dependent wakeup fixes 2012-04-06 13:47:07 -07:00
ruby Garnet: Correct computation of link utilization 2012-04-28 16:57:31 -05:00
slicc clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
abstract_mem.cc MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
abstract_mem.hh MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
AbstractMemory.py MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
bridge.cc MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
bridge.hh MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
Bridge.py MEM: Introduce the master/slave port roles in the Python classes 2012-02-13 06:43:09 -05:00
bus.cc MEM: Use base class Master/SlavePort pointers in the bus 2012-04-25 10:45:23 -04:00
bus.hh MEM: Use base class Master/SlavePort pointers in the bus 2012-04-25 10:45:23 -04:00
Bus.py MEM: Introduce the master/slave port roles in the Python classes 2012-02-13 06:43:09 -05:00
fs_translating_port_proxy.cc MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
fs_translating_port_proxy.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
mem_object.cc MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
mem_object.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
MemObject.py Major changes to how SimObjects are created and initialized. Almost all 2007-07-23 21:51:38 -07:00
mport.cc MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
mport.hh MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
packet.cc MemCmd: Add a command for invalidation requests to LSQ 2012-01-23 11:07:11 -06:00
packet.hh MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
packet_access.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
packet_queue.cc MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
packet_queue.hh MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
page_table.cc Another merge with the main repository. 2012-01-07 02:16:37 -08:00
page_table.hh SE/FS: Get rid of includes of config/full_system.hh. 2011-11-18 02:20:22 -08:00
physical.cc MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
physical.hh MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
port.cc MEM: Add the PortId type and a corresponding id field to Port 2012-04-25 10:41:23 -04:00
port.hh MEM: Add the PortId type and a corresponding id field to Port 2012-04-25 10:41:23 -04:00
port_proxy.cc MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
port_proxy.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
qport.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
request.hh mem: fix cache stats to use request ids correctly 2012-02-12 16:07:39 -06:00
SConscript MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
se_translating_port_proxy.cc MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
se_translating_port_proxy.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
simple_mem.cc MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
simple_mem.hh MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
SimpleMemory.py MEM: Enable multiple distributed generalized memories 2012-04-06 13:46:31 -04:00
tport.cc MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00
tport.hh MEM: Introduce the master/slave port sub-classes in C++ 2012-03-30 09:40:11 -04:00