04745696b6
SConscript:
Added new CPU files to build.
arch/alpha/isa_desc:
Changed rduniq and wruniq to be nonspeculative because the uniq register is not renamed.
arch/isa_parser.py:
Added new CPU exec method.
base/statistics.hh:
Minor change for namespace conflict. Probably can change back one the new CPU files are cleaned up.
base/traceflags.py:
Added new CPU trace flags.
cpu/static_inst.hh:
Changed static inst to use a file that defines the execute functions.
--HG--
extra : convert_revision : bd4ce34361308280168324817fc1258dd253e519
34 lines
1.3 KiB
C++
34 lines
1.3 KiB
C++
#include "cpu/beta_cpu/free_list.hh"
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SimpleFreeList::SimpleFreeList(unsigned _numLogicalIntRegs,
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unsigned _numPhysicalIntRegs,
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unsigned _numLogicalFloatRegs,
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unsigned _numPhysicalFloatRegs)
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: numLogicalIntRegs(_numLogicalIntRegs),
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numPhysicalIntRegs(_numPhysicalIntRegs),
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numLogicalFloatRegs(_numLogicalFloatRegs),
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numPhysicalFloatRegs(_numPhysicalFloatRegs),
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numPhysicalRegs(numPhysicalIntRegs + numPhysicalFloatRegs)
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{
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// Put all of the extra physical registers onto the free list. This
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// means excluding all of the base logical registers.
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for (PhysRegIndex i = numLogicalIntRegs;
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i < numPhysicalIntRegs; ++i)
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{
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freeIntRegs.push(i);
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}
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// Put all of the extra physical registers onto the free list. This
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// means excluding all of the base logical registers. Because the
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// float registers' indices start where the physical registers end,
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// some math must be done to determine where the free registers start.
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for (PhysRegIndex i = numPhysicalIntRegs + numLogicalFloatRegs;
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i < numPhysicalRegs; ++i)
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{
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cprintf("Free List: Adding register %i to float list.\n", i);
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freeFloatRegs.push(i);
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}
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}
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