04745696b6
SConscript:
Added new CPU files to build.
arch/alpha/isa_desc:
Changed rduniq and wruniq to be nonspeculative because the uniq register is not renamed.
arch/isa_parser.py:
Added new CPU exec method.
base/statistics.hh:
Minor change for namespace conflict. Probably can change back one the new CPU files are cleaned up.
base/traceflags.py:
Added new CPU trace flags.
cpu/static_inst.hh:
Changed static inst to use a file that defines the execute functions.
--HG--
extra : convert_revision : bd4ce34361308280168324817fc1258dd253e519
74 lines
2.2 KiB
C++
74 lines
2.2 KiB
C++
#ifndef __ALPHA_IMPL_HH__
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#define __ALPHA_IMPL_HH__
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#include "arch/alpha/isa_traits.hh"
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#include "cpu/beta_cpu/comm.hh"
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#include "cpu/beta_cpu/cpu_policy.hh"
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#include "cpu/beta_cpu/alpha_params.hh"
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#include "cpu/beta_cpu/commit.hh"
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#include "cpu/beta_cpu/decode.hh"
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#include "cpu/beta_cpu/fetch.hh"
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#include "cpu/beta_cpu/free_list.hh"
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#include "cpu/beta_cpu/iew.hh"
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#include "cpu/beta_cpu/inst_queue.hh"
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#include "cpu/beta_cpu/regfile.hh"
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#include "cpu/beta_cpu/rename.hh"
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#include "cpu/beta_cpu/rename_map.hh"
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#include "cpu/beta_cpu/rob.hh"
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class AlphaDynInst;
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class AlphaFullCPU;
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/** Implementation specific struct that defines several key things to the
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* CPU, the stages within the CPU, the time buffers, and the DynInst.
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* The struct defines the ISA, the CPU policy, the specific DynInst, the
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* specific FullCPU, and all of the structs from the time buffers to do
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* communication.
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* This is one of the key things that must be defined for each hardware
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* specific CPU implementation.
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*/
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struct AlphaSimpleImpl
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{
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/** The ISA to be used. */
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typedef AlphaISA ISA;
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/** The type of MachInst. */
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typedef ISA::MachInst MachInst;
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/** The CPU policy to be used (ie fetch, decode, etc.). */
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typedef SimpleCPUPolicy<AlphaSimpleImpl> CPUPol;
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/** The DynInst to be used. */
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typedef AlphaDynInst DynInst;
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/** The FullCPU to be used. */
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typedef AlphaFullCPU FullCPU;
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/** The Params to be passed to each stage. */
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typedef AlphaSimpleParams Params;
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/** The struct for communication between fetch and decode. */
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typedef SimpleFetchSimpleDecode<AlphaSimpleImpl> FetchStruct;
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/** The struct for communication between decode and rename. */
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typedef SimpleDecodeSimpleRename<AlphaSimpleImpl> DecodeStruct;
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/** The struct for communication between rename and IEW. */
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typedef SimpleRenameSimpleIEW<AlphaSimpleImpl> RenameStruct;
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/** The struct for communication between IEW and commit. */
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typedef SimpleIEWSimpleCommit<AlphaSimpleImpl> IEWStruct;
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/** The struct for communication within the IEW stage. */
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typedef IssueStruct<AlphaSimpleImpl> IssueStruct;
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/** The struct for all backwards communication. */
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typedef TimeBufStruct TimeStruct;
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};
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#endif // __ALPHA_IMPL_HH__
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