Commit graph

8 commits

Author SHA1 Message Date
Andrew Schultz
4a5dcc37bf Whole mess'o'changes.. see individual files
arch/alpha/vtophys.cc:
    Removed buggy code that tries to fix PAL addresses (may cause problems
    while trying to debug in PAL code, but that should do this fix outside
    of vtophys)
base/loader/symtab.cc:
base/loader/symtab.hh:
cpu/exetrace.cc:
    Changed InstExec traces to always print a symbol name
dev/ide_ctrl.cc:
dev/ide_disk.cc:
    Tabs
dev/ide_disk.hh:
    Change buffer size
dev/tsunami_pchip.cc:
    Fix translatePciToDma to support scatter gather mapping
kern/linux/linux_system.cc:
    Force simulator to wait until remote debugger attaches (should be removed
    or turned on/off with a flag)

--HG--
extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d
2004-05-06 15:21:07 -04:00
Ali Saidi
b6fba57065 our first interrupt
cpu/exetrace.cc:
    added looking for symbols at PC+4 and PC+8 thanks to gcc skiping
    setting the gp where it can and jumping <func>+8
dev/console.cc:
    commented out weird interrupt per nate's suggestion
dev/tsunami_cchip.cc:
    moved rtc flag to correct bit
dev/tsunami_io.cc:
    time interrupt will be 1024Hz and at some point be configurable by
    linux
dev/tsunami_io.hh:
    Timer interrupt will be 1024hz for now and in the future be
    configurable by linux

--HG--
extra : convert_revision : 2fcc924c8848eb3c6166d9d517617ed193a2b89a
2004-01-28 18:12:52 -05:00
Ali Saidi
a44248aab0 Added code to print out the symbol if one exists for an address
cpu/exetrace.cc:
    added code to print out symbol if one is found for address
kern/linux/linux_system.cc:
    added code to set the debugSymbolTable to the kernel symbol table

--HG--
extra : convert_revision : 191d7608d04fa42baef5e618c0bbbf5ad4001031
2004-01-12 19:59:02 -05:00
Steve Reinhardt
4f8acd2709 Minor cleanup of trace/output stuff (leftover from EINTR bug fix).
base/cprintf.cc:
    Get rid of unnecessary stream state check.
    Bug is fixed now, and I'm not sure this did much anyway.
cpu/exetrace.cc:
    Get rid of unnecessary flush() call.

--HG--
extra : convert_revision : 107dcdc578b2b0ad1652ee52ea0a33b0f3cd4e39
2003-12-19 08:04:40 -08:00
Steve Reinhardt
40b9a3878a Minor changes to instruction trace output.
arch/alpha/isa_desc:
    A few disassembly changes to make it easier to compare with old machine.def traces:
    - Make lds prefetches print f31 instead of r31 as dest.
    - Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
    Left-justify instruction in field, and increase width by 1.

--HG--
extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
2003-11-03 20:26:51 -08:00
Steve Reinhardt
de29fec658 Don't need to include sim/param.hh in sim_object.hh anymore.
Add explicit include of sim/param.hh to .cc files as needed.

cpu/base_cpu.cc:
cpu/exetrace.cc:
dev/etherint.cc:
sim/system.cc:
    Add include of sim/param.hh.
sim/sim_object.hh:
    Don't need to include sim/param.hh.

--HG--
extra : convert_revision : 8ed13f25c2087680230056ab7abb623e6a7699cf
2003-10-21 21:32:15 -07:00
Steve Reinhardt
25693e9e69 Make include paths explicit and update makefile accordingly.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/fake_syscall.cc:
arch/alpha/faults.cc:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/circlebuf.cc:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/fast_alloc.cc:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/pollevent.cc:
base/pollevent.hh:
base/random.cc:
base/random.hh:
base/range.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/prog.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/sim_time.cc:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/tap/tap.cc:
    Make include paths explicit.

--HG--
extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
2003-10-10 11:09:00 -07:00
Steve Reinhardt
52b31ea0a6 File moves for the reorg. Tree is in broken state until I commit the makefile and
#include changes.

--HG--
rename : sim/cache/lzss_compression.cc => base/compression/lzss_compression.cc
rename : sim/cache/lzss_compression.hh => base/compression/lzss_compression.hh
rename : sim/cache/null_compression.hh => base/compression/null_compression.hh
rename : sim/hybrid_pred.cc => base/hybrid_pred.cc
rename : sim/hybrid_pred.hh => base/hybrid_pred.hh
rename : base/aout_object.cc => base/loader/aout_object.cc
rename : base/aout_object.hh => base/loader/aout_object.hh
rename : base/coff_sym.h => base/loader/coff_sym.h
rename : base/coff_symconst.h => base/loader/coff_symconst.h
rename : base/ecoff_object.cc => base/loader/ecoff_object.cc
rename : base/ecoff_object.hh => base/loader/ecoff_object.hh
rename : base/elf_object.cc => base/loader/elf_object.cc
rename : base/elf_object.hh => base/loader/elf_object.hh
rename : base/exec_aout.h => base/loader/exec_aout.h
rename : base/exec_ecoff.h => base/loader/exec_ecoff.h
rename : base/object_file.cc => base/loader/object_file.cc
rename : base/object_file.hh => base/loader/object_file.hh
rename : base/symtab.cc => base/loader/symtab.cc
rename : base/symtab.hh => base/loader/symtab.hh
rename : sim/predictor.hh => base/predictor.hh
rename : sim/sat_counter.cc => base/sat_counter.cc
rename : sim/sat_counter.hh => base/sat_counter.hh
rename : sim/base_cpu.cc => cpu/base_cpu.cc
rename : sim/base_cpu.hh => cpu/base_cpu.hh
rename : sim/exec_context.cc => cpu/exec_context.cc
rename : sim/exec_context.hh => cpu/exec_context.hh
rename : sim/exetrace.cc => cpu/exetrace.cc
rename : sim/exetrace.hh => cpu/exetrace.hh
rename : sim/op_class.hh => cpu/full_cpu/op_class.hh
rename : sim/smt.hh => cpu/full_cpu/smt.hh
rename : sim/inst_seq.hh => cpu/inst_seq.hh
rename : sim/intr_control.cc => cpu/intr_control.cc
rename : sim/intr_control.hh => cpu/intr_control.hh
rename : sim/memtest.cc => cpu/memtest/memtest.cc
rename : sim/memtest.hh => cpu/memtest/memtest.hh
rename : sim/pc_event.cc => cpu/pc_event.cc
rename : sim/pc_event.hh => cpu/pc_event.hh
rename : sim/simple_cpu.cc => cpu/simple_cpu/simple_cpu.cc
rename : sim/simple_cpu.hh => cpu/simple_cpu/simple_cpu.hh
rename : sim/static_inst.cc => cpu/static_inst.cc
rename : sim/static_inst.hh => cpu/static_inst.hh
extra : convert_revision : 05bd41acb2a424f1a38609fd4ac6df681bb479d6
2003-10-10 09:57:26 -07:00
Renamed from sim/exetrace.cc (Browse further)