4a5dcc37bf
arch/alpha/vtophys.cc:
Removed buggy code that tries to fix PAL addresses (may cause problems
while trying to debug in PAL code, but that should do this fix outside
of vtophys)
base/loader/symtab.cc:
base/loader/symtab.hh:
cpu/exetrace.cc:
Changed InstExec traces to always print a symbol name
dev/ide_ctrl.cc:
dev/ide_disk.cc:
Tabs
dev/ide_disk.hh:
Change buffer size
dev/tsunami_pchip.cc:
Fix translatePciToDma to support scatter gather mapping
kern/linux/linux_system.cc:
Force simulator to wait until remote debugger attaches (should be removed
or turned on/off with a flag)
--HG--
extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d
197 lines
6.4 KiB
C++
197 lines
6.4 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <fstream>
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#include <iomanip>
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#include "sim/param.hh"
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#include "cpu/full_cpu/dyn_inst.hh"
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#include "cpu/full_cpu/spec_state.hh"
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#include "cpu/full_cpu/issue.hh"
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#include "cpu/exetrace.hh"
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#include "cpu/exec_context.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/base_cpu.hh"
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#include "cpu/static_inst.hh"
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using namespace std;
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////////////////////////////////////////////////////////////////////////
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//
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// Methods for the InstRecord object
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//
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SymbolTable *debugSymbolTable = NULL;
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void
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Trace::InstRecord::dump(ostream &outs)
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{
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if (flags[PRINT_CYCLE])
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ccprintf(outs, "%7d: ", cycle);
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outs << cpu->name() << " ";
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if (flags[TRACE_MISSPEC])
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outs << (misspeculating ? "-" : "+") << " ";
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if (flags[PRINT_THREAD_NUM])
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outs << "T" << thread << " : ";
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std::string str;
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if (debugSymbolTable->findNearestSymbol(PC, str))
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outs << "@" << setw(17) << str << " : ";
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else
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outs << "0x" << hex << PC << " : ";
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//
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// Print decoded instruction
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//
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#if defined(__GNUC__) && (__GNUC__ < 3)
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// There's a bug in gcc 2.x library that prevents setw()
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// from working properly on strings
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string mc(staticInst->disassemble(PC, debugSymbolTable));
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while (mc.length() < 26)
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mc += " ";
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outs << mc;
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#else
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outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
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#endif
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outs << " : ";
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if (flags[PRINT_OP_CLASS]) {
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outs << opClassStrings[staticInst->opClass()] << " : ";
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}
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if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
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outs << " D=";
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#if 0
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if (data_status == DataDouble)
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ccprintf(outs, "%f", data.as_double);
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else
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ccprintf(outs, "%#018x", data.as_int);
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#else
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ccprintf(outs, "%#018x", data.as_int);
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#endif
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}
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if (flags[PRINT_EFF_ADDR] && addr_valid)
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outs << " A=0x" << hex << addr;
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if (flags[PRINT_INT_REGS] && regs_valid) {
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for (int i = 0; i < 32;)
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for (int j = i + 1; i <= j; i++)
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ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
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((i == j) ? "\n" : " "));
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outs << "\n";
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}
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if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
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outs << " FetchSeq=" << dec << fetch_seq;
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if (flags[PRINT_CP_SEQ] && cp_seq_valid)
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outs << " CPSeq=" << dec << cp_seq;
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//
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// End of line...
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//
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outs << endl;
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}
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vector<bool> Trace::InstRecord::flags(NUM_BITS);
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////////////////////////////////////////////////////////////////////////
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//
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// Parameter space for per-cycle execution address tracing options.
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// Derive from ParamContext so we can override checkParams() function.
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//
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class ExecutionTraceParamContext : public ParamContext
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{
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public:
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ExecutionTraceParamContext(const string &_iniSection)
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: ParamContext(_iniSection)
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{
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}
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void checkParams(); // defined at bottom of file
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};
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ExecutionTraceParamContext exeTraceParams("exetrace");
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Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
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"capture speculative instructions", false);
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Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
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"print cycle number", true);
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Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
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"print op class", true);
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Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
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"print thread number", true);
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Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
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"print effective address", true);
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Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
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"print result data", true);
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Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
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"print all integer regs", false);
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Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
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"print fetch sequence number", false);
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Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
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"print correct-path sequence number", false);
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//
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// Helper function for ExecutionTraceParamContext::checkParams() just
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// to get us into the InstRecord namespace
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//
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void
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Trace::InstRecord::setParams()
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{
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flags[TRACE_MISSPEC] = exe_trace_spec;
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flags[PRINT_CYCLE] = exe_trace_print_cycle;
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flags[PRINT_OP_CLASS] = exe_trace_print_opclass;
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flags[PRINT_THREAD_NUM] = exe_trace_print_thread;
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flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
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flags[PRINT_EFF_ADDR] = exe_trace_print_data;
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flags[PRINT_INT_REGS] = exe_trace_print_iregs;
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flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
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flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
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}
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void
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ExecutionTraceParamContext::checkParams()
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{
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Trace::InstRecord::setParams();
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}
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