Steve Reinhardt
cd423aa9dd
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into vm1.(none):/home/stever/bk/newmem-head
--HG--
extra : convert_revision : f93aaeabed0da9eeec8eb6f055fb1e31d5d97203
2007-05-28 15:41:05 -07:00
Steve Reinhardt
8dfd7f9804
Fix M4 command line... wasn't working on zizzer.
...
A little more concise now.
--HG--
extra : convert_revision : 5cb46832ac7ce7a0be72765e83c8ceb5d8d4b64a
2007-05-28 18:39:35 -04:00
Steve Reinhardt
41f6cbce9a
Restructure SimpleTimingPort a bit:
...
- factor out checkFunctional() code so it can be
called from derived classes
- use EventWrapper for sendEvent, move event handling
code from event to port where it belongs
- make sendEvent a pointer so derived classes can
override it
- replace std::pair with new class for readability
--HG--
extra : convert_revision : 5709de2daacfb751a440144ecaab5f9fc02e6b7a
2007-05-28 08:11:43 -07:00
Steve Reinhardt
04ac944920
Reformat comments to meet line length restriction.
...
--HG--
extra : convert_revision : 24c00ec4904d9fb4d6e39521e0ff8b8f60d60f6a
2007-05-28 08:04:33 -07:00
Steve Reinhardt
07bda077f2
Remove unnecessary include of physical.hh.
...
--HG--
extra : convert_revision : bccafe884e58a55b02ff408448e6644196e439a4
2007-05-28 08:03:13 -07:00
Nathan Binkert
35147170f9
Move SimObject python files alongside the C++ and fix
...
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.
--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Nathan Binkert
4f0f217c1b
Get rid of GNU libelf and its autoconf nastiness and replace
...
it with FreeBSD's implementation
--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
2007-05-26 18:15:22 -07:00
Gabe Black
a3ae9486d5
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 276d00a73b1834d5262129c3f7e0f7fae18e23bc
2007-05-25 19:29:32 -07:00
Gabe Black
ad02a59f89
Make the lexer and parser use objects and not the last lexer and parser generated.
...
--HG--
extra : convert_revision : e751969973599cde711f9d4de0dc4772dda651ed
2007-05-25 19:26:26 -07:00
Nathan Binkert
44ebb8d3e2
Update to ply 2.3
...
ext/ply/ply/lex.py:
ext/ply/ply/yacc.py:
ext/ply/CHANGES:
ext/ply/README:
ext/ply/TODO:
ext/ply/doc/ply.html:
ext/ply/example/ansic/clex.py:
ext/ply/example/ansic/cparse.py:
ext/ply/example/calc/calc.py:
ext/ply/example/hedit/hedit.py:
ext/ply/example/optcalc/calc.py:
ext/ply/test/README:
ext/ply/test/calclex.py:
ext/ply/test/lex_doc1.exp:
ext/ply/test/lex_doc1.py:
ext/ply/test/lex_dup1.exp:
ext/ply/test/lex_dup1.py:
ext/ply/test/lex_dup2.exp:
ext/ply/test/lex_dup2.py:
ext/ply/test/lex_dup3.exp:
ext/ply/test/lex_dup3.py:
ext/ply/test/lex_empty.py:
ext/ply/test/lex_error1.py:
ext/ply/test/lex_error2.py:
ext/ply/test/lex_error3.exp:
ext/ply/test/lex_error3.py:
ext/ply/test/lex_error4.exp:
ext/ply/test/lex_error4.py:
ext/ply/test/lex_hedit.exp:
ext/ply/test/lex_hedit.py:
ext/ply/test/lex_ignore.exp:
ext/ply/test/lex_ignore.py:
ext/ply/test/lex_re1.exp:
ext/ply/test/lex_re1.py:
ext/ply/test/lex_rule1.py:
ext/ply/test/lex_token1.py:
ext/ply/test/lex_token2.py:
ext/ply/test/lex_token3.py:
ext/ply/test/lex_token4.py:
ext/ply/test/lex_token5.exp:
ext/ply/test/lex_token5.py:
ext/ply/test/yacc_badargs.exp:
ext/ply/test/yacc_badargs.py:
ext/ply/test/yacc_badprec.exp:
ext/ply/test/yacc_badprec.py:
ext/ply/test/yacc_badprec2.exp:
ext/ply/test/yacc_badprec2.py:
ext/ply/test/yacc_badrule.exp:
ext/ply/test/yacc_badrule.py:
ext/ply/test/yacc_badtok.exp:
ext/ply/test/yacc_badtok.py:
ext/ply/test/yacc_dup.exp:
ext/ply/test/yacc_dup.py:
ext/ply/test/yacc_error1.exp:
ext/ply/test/yacc_error1.py:
ext/ply/test/yacc_error2.exp:
ext/ply/test/yacc_error2.py:
ext/ply/test/yacc_error3.exp:
ext/ply/test/yacc_error3.py:
ext/ply/test/yacc_inf.exp:
ext/ply/test/yacc_inf.py:
ext/ply/test/yacc_missing1.exp:
ext/ply/test/yacc_missing1.py:
ext/ply/test/yacc_nodoc.exp:
ext/ply/test/yacc_nodoc.py:
ext/ply/test/yacc_noerror.exp:
ext/ply/test/yacc_noerror.py:
ext/ply/test/yacc_nop.exp:
ext/ply/test/yacc_nop.py:
ext/ply/test/yacc_notfunc.exp:
ext/ply/test/yacc_notfunc.py:
ext/ply/test/yacc_notok.exp:
ext/ply/test/yacc_notok.py:
ext/ply/test/yacc_rr.exp:
ext/ply/test/yacc_rr.py:
ext/ply/test/yacc_simple.exp:
ext/ply/test/yacc_simple.py:
ext/ply/test/yacc_sr.exp:
ext/ply/test/yacc_sr.py:
ext/ply/test/yacc_term1.exp:
ext/ply/test/yacc_term1.py:
ext/ply/test/yacc_unused.exp:
ext/ply/test/yacc_unused.py:
ext/ply/test/yacc_uprec.exp:
ext/ply/test/yacc_uprec.py:
Import patch ply.diff
src/arch/isa_parser.py:
everything is now within the ply package
--HG--
rename : ext/ply/lex.py => ext/ply/ply/lex.py
rename : ext/ply/yacc.py => ext/ply/ply/yacc.py
extra : convert_revision : fca8deabd5c095bdeabd52a1f236ae1404ef106e
2007-05-24 21:54:51 -07:00
Steve Reinhardt
9f1c104ccd
memtest.py:
...
Make clocks more reasonable.
Fix bug in sense of options.timing flag.
configs/example/memtest.py:
Fix bug in sense of options.timing flag.
configs/example/memtest.py:
Make clocks more reasonable.
--HG--
extra : convert_revision : 3715697988c56e92a4da129b42026d0623f5e85e
2007-05-22 06:22:27 -07:00
Steve Reinhardt
41241799ae
Change getDeviceAddressRanges to use bool for snoop arg.
...
--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
2007-05-21 23:36:09 -07:00
Steve Reinhardt
05d14cf3e2
Add new EventWrapper constructor that takes a Tick value
...
and schedules the event immediately.
--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
2007-05-20 21:43:01 -07:00
Steve Reinhardt
87adc37e91
Insist that PhysicalMemory object have at least one connection.
...
--HG--
extra : convert_revision : 36c33d25a3b23ac2094577aa504c24fac0f3ffcc
2007-05-20 18:23:05 -07:00
Steve Reinhardt
aa5b595f39
Oops... some places in C++ explicitly ask for a "functional"
...
port. It would be better to move this to python IMO but for
now I'll stick in a compatibility hack.
--HG--
extra : convert_revision : a81a29cbd43becd0e485559eb7b2a31f7a0b082d
2007-05-19 01:20:58 -04:00
Steve Reinhardt
0305159abf
PhysicalMemory has vector of uniform ports instead of one special one.
...
configs/example/memtest.py:
PhysicalMemory has vector of uniform ports instead of one special one.
Other updates to fix obsolete brokenness.
src/mem/physical.cc:
src/mem/physical.hh:
src/python/m5/objects/PhysicalMemory.py:
Have vector of uniform ports instead of one special one.
src/python/swig/pyobject.cc:
Add comment.
--HG--
extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1
2007-05-19 00:24:34 -04:00
Gabe Black
a13d5af274
Merge zizzer.eecs.umich.edu:/bk/newmem
...
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
2007-05-18 13:36:47 -07:00
Gabe Black
6a6e62014e
Changes to make simple cpu handle pcs appropriately for x86
...
--HG--
extra : convert_revision : cf68886d53301e0a63705247bd7d66b2ff08ea84
2007-05-18 10:42:50 -07:00
Nathan Binkert
a8278c3bde
Update the release notes for the 2.0 beta 3 release
...
--HG--
extra : convert_revision : 708ba7a5878ad60317e527830b54c4fe62f70454
2007-05-16 19:09:18 -07:00
Ali Saidi
b85690e239
update all the regresstion tests for release
...
--HG--
extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2
2007-05-15 19:25:35 -04:00
Ali Saidi
c30e615689
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : e4047d458f0ea4ca6c321a7236b01f80ea4efe33
2007-05-15 19:04:34 -04:00
Ali Saidi
f487edf146
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : 32dc1bec7fdb1ecb8879ed2dd745c4b23929aeab
2007-05-15 18:06:52 -04:00
Ali Saidi
0934f259d6
add an l2 cache option to se example config
...
configs/common/Options.py:
configs/example/fs.py:
move l2 cache option to Options.py
--HG--
extra : convert_revision : 5c0071c2827f7db6d56229d5276326364b50f0c8
2007-05-15 18:06:35 -04:00
Ali Saidi
f317227b4e
hopefully the final hacky change to make the bus bridge work ok
...
cache blocks that get dmaed ARE NOT marked invalid in the caches so it's a performance issue here
src/mem/bridge.cc:
src/mem/bridge.hh:
hopefully the final hacky change to make the bus bridge work ok
--HG--
extra : convert_revision : 62cbc65c74d1a84199f0a376546ec19994c5899c
2007-05-15 17:39:50 -04:00
Steve Reinhardt
224ae7813d
Merge vm1.(none):/home/stever/bk/newmem-head
...
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : 8a501917daf81021212d136b4ebbfa059b452a13
2007-05-14 13:54:22 -07:00
Ali Saidi
bda25c1d5e
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : 7daf46913daf826f2e29645d8d29eea88469bb5a
2007-05-14 16:37:23 -04:00
Ali Saidi
fcf85725b5
Merge zizzer:/bk/newmem
...
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : e445097240af7b4e73efaca855cd1f217cf00313
2007-05-14 16:37:22 -04:00
Ali Saidi
57104ea5f9
couple more bug fixes for intel nic
...
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
couple more bug fixes
--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
2007-05-14 16:37:00 -04:00
Ali Saidi
ea4e6f2e3d
add uglyiness to fix dmas
...
src/dev/io_device.cc:
extra printing and assertions
src/mem/bridge.hh:
deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
make the cache try to satisfy a functional request from the cache above it before checking itself
--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
2007-05-14 16:14:59 -04:00
Steve Reinhardt
fecae03a0b
Eliminate unused PacketPtr from BaseCache's
...
RequestEvent and ResponseEvent.
Compiles but not tested.
--HG--
extra : convert_revision : cc791e7adea5b0406e986a0076edba51856b9105
2007-05-13 23:09:10 -07:00
Steve Reinhardt
df3fc36fa9
Split BaseCache::CacheEvent into RequestEvent and ResponseEvent.
...
Compiles but not tested.
--HG--
extra : convert_revision : 4e1e28c4b87721ccfcf35a5ea62c1fa324acbaf9
2007-05-13 22:58:06 -07:00
Ali Saidi
404a91265e
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
...
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : 162876cb1ad96ca7ca6a2e0f549c98b29e5a8d2d
2007-05-13 04:48:42 -04:00
Ali Saidi
af26532bbd
fix handling of atomic packets
...
fix up code for counting requests and responses
--HG--
extra : convert_revision : 0d70981ee41c5d9c36cad01bd505281a096f6119
2007-05-13 01:44:42 -04:00
Nathan Binkert
011db5c851
Move full CPU sim object stuff into the encumbered directory
...
--HG--
extra : convert_revision : 788068dd4f4994d0016dba7e8705359d45a3a45c
2007-05-11 15:01:44 -07:00
Nathan Binkert
113319a7da
Float should have a c++ param type
...
--HG--
extra : convert_revision : 150bbe7f31aafb43a75195fc2a365fb3c0ec5673
2007-05-11 11:48:58 -07:00
Nathan Binkert
d667ce01b4
total should be the sum of the vector result of an operation,
...
not sum the operands and then apply the operation.
--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09
2007-05-11 11:47:18 -07:00
Ali Saidi
634d2e9d83
remove hit_latency and make latency do the right thing
...
set the latency parameter in terms of a latency
add caches to tsunami-simple configs
configs/common/Caches.py:
tests/configs/memtest.py:
tests/configs/o3-timing-mp.py:
tests/configs/o3-timing.py:
tests/configs/simple-atomic-mp.py:
tests/configs/simple-timing-mp.py:
tests/configs/simple-timing.py:
set the latency parameter in terms of a latency
configs/common/FSConfig.py:
give the bridge a default latency too
src/mem/cache/cache_builder.cc:
src/python/m5/objects/BaseCache.py:
remove hit_latency and make latency do the right thing
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-atomic.py:
tests/configs/tsunami-simple-timing-dual.py:
tests/configs/tsunami-simple-timing.py:
add caches to tsunami-simple configs
--HG--
extra : convert_revision : 37bef7c652e97c8cdb91f471fba62978f89019f1
2007-05-10 18:24:48 -04:00
Ali Saidi
e08a5c6052
Merge zizzer:/bk/newmem
...
into pb15.local:/Users/ali/work/m5.newmem.zeep
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt:
the new version of this is what we want
--HG--
extra : convert_revision : 204df6f8181df81e423def4695cd81544c485c47
2007-05-10 00:36:47 -04:00
Ali Saidi
77fd734b99
update for bus bridge updates
...
--HG--
extra : convert_revision : 829b1f33c88f1708ce5ee84afb4cd8bda8a6576f
2007-05-10 00:30:53 -04:00
Ali Saidi
4a37c48e8e
add/update parameters for bus bridge
...
--HG--
extra : convert_revision : 063f757fbfa2c613328ffa70e556f8926623fa91
2007-05-10 00:08:22 -04:00
Ali Saidi
69ea50c163
couple of updates in the intel nic
...
--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
2007-05-09 22:39:43 -04:00
Ali Saidi
9dfbea68a2
update for new reschedule semantics
...
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09 22:34:54 -04:00
Ali Saidi
ff55888575
undo my previous bus change, it can make the bus deadlock.. so it still constantly reschedules itself
...
--HG--
extra : convert_revision : b5ef1aa0a6a2e32bd775d2dbcad9cd9505ad9b78
2007-05-09 22:23:01 -04:00
Ali Saidi
376cff64bd
Merge zeep:/z/saidi/work/m5.newmem
...
into zizzer.eecs.umich.edu:/tmp/newmem
--HG--
extra : convert_revision : fcace7573830e2a3992c0b052598b97475e951c6
2007-05-09 18:20:25 -04:00
Ali Saidi
3c608bf765
add a backoff algorithm when nacks are received by devices
...
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge
src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
add seperate response buffers and request queue sizes
add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
assert on the
src/mem/tport.cc:
add a friendly assert to make sure the packet was inserted into the list
--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2007-05-09 18:20:24 -04:00
Ali Saidi
37b45e3c8c
fix the translating ports so it can add a page on a fault
...
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
2007-05-09 15:37:46 -04:00
Ali Saidi
939cbd8201
Merge zizzer:/bk/newmem
...
into udhcp-macvpn-703.public.engin.umich.edu:/Users/ali/work/m5.newmem
--HG--
extra : convert_revision : e977c5b194954774b6503484797f1c1e0eb4e425
2007-05-09 12:02:36 -04:00
Ali Saidi
ee70d8cfc4
bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer.
...
src/base/bitfield.hh:
bit_val was being used directly in the statement in
return. If type B had fewer bits than last, bit_val << last would get
the wrong answer.
--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64
2007-05-09 12:01:31 -04:00
Ali Saidi
aa095b63cd
update for partial write fix changes
...
--HG--
extra : convert_revision : 066224dc7034206ea6c3578d41a9a5d75181f82c
2007-05-07 19:19:00 -04:00
Ali Saidi
a38c79ec22
the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space
...
fix the timing cpu to handle receiving a nacked packet
src/cpu/simple/timing.cc:
make the timing cpu handle receiving a nacked packet
src/mem/bridge.cc:
src/mem/bridge.hh:
the bridge never returns false when recvTiming() is called on its ports now, it always returns true and nacks the packet if there isn't sufficient buffer space
--HG--
extra : convert_revision : 5e12d0cf6ce985a5f72bcb7ce26c83a76c34c50a
2007-05-07 18:58:38 -04:00