Commit graph

268 commits

Author SHA1 Message Date
Steve Reinhardt
5f0f42f166 Fix minor doxygen issues.
Doxyfile:
    Turn on EXTRACT_ALL so we get full class hierarchy info.
base/range.hh:
cpu/o3/fetch.hh:
cpu/o3/rename_map.hh:
cpu/o3/rob.hh:
dev/ide_disk.cc:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.hh:
    Fix doxygen issues.

--HG--
extra : convert_revision : 9e0e8d3510b35db201459b8a3211c5e6ad5f0bb4
2005-06-05 08:08:29 -04:00
Steve Reinhardt
ad8b9636f8 Many files:
Update copyright dates and author list

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
    Update copyright dates and author list

--HG--
extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-05 05:16:00 -04:00
Ali Saidi
5070f27c69 added copyright
kern/linux/sched.hh:
kern/linux/thread_info.hh:
    got rid of everything but exactly what we needed
util/categories.py:
    newest version from one of my repositories

--HG--
extra : convert_revision : c4328e5938d421d60493c0da07022bfa9e92c404
2005-06-05 04:08:05 -04:00
Nathan Binkert
3e5e3e2d28 make all of the turbolaser stuff only compile if ALPHA_TLASER
is defined.

build/SConstruct:
    Default ALPHA_TLASER to false
dev/uart8250.cc:
    fix paths

--HG--
extra : convert_revision : 3616b5b4b9060860a73568a4ed4f1e8eb991938f
2005-06-05 01:24:17 -04:00
Ali Saidi
3011a7ed0b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-clean
--HG--
extra : convert_revision : 0c339eb7574f59665690f7e8457eff0b21e3c4c9
2005-06-05 01:22:33 -04:00
Ali Saidi
adce616cfe split uart into urt8250 and uart8530
fix some doxygen comments

SConscript:
    Added split uart files
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/tsunami.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/tsunamireg.h:
    fix doxgyen file comment
dev/uart.cc:
dev/uart.hh:
python/m5/objects/Uart.py:
    split uart into urt8250 and uart8530

--HG--
extra : convert_revision : 2e70aad892a37620d7909017648bca6d7d69d678
2005-06-05 01:22:21 -04:00
Nathan Binkert
fb1282de1a Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head

--HG--
extra : convert_revision : b0c9b044b44a1bfc4cded2ebfa240b799dd4a5a0
2005-06-05 00:45:10 -04:00
Ali Saidi
8bbaaa7478 Fix doxgyen comments
Use openbsd ide/atapi header files

dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
    Fix Doxygen comments
dev/ide_disk.cc:
    Use BSD atapi/ide header files
dev/ide_disk.hh:
    use ide/atapi header files

--HG--
extra : convert_revision : a15e40c7d7cc52af6867821e9574ba5c47021721
2005-06-04 23:56:53 -04:00
Nathan Binkert
13c005a8af shuffle files around for new directory structure
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
2005-06-04 20:50:10 -04:00
Steve Reinhardt
62fa781fee Rename sim/universe.{cc,hh} to root.{cc,hh} (since the
object defined there was renamed Root long ago).

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
base/misc.cc:
base/pollevent.cc:
base/pollevent.hh:
base/stats/events.cc:
base/trace.hh:
cpu/beta_cpu/fetch_impl.hh:
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/inst_queue_impl.hh:
cpu/pc_event.cc:
cpu/static_inst.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
sim/builder.cc:
sim/eventq.cc:
sim/main.cc:
sim/root.cc:
sim/stat_control.cc:
    Rename sim/universe.{cc,hh} to root.{cc,hh}.

--HG--
rename : sim/universe.cc => sim/root.cc
extra : convert_revision : b8699e81e285253d66da75412e7bb2c251c0389a
2005-06-01 21:59:27 -04:00
Steve Reinhardt
8031cd93b5 Standardize clock parameter names to 'clock'.
Fix description for Bus clock_ratio (no longer a ratio).
Add Clock param type (generic Frequency or Latency).

cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/beta_cpu/alpha_full_cpu_builder.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/sinic.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
sim/universe.cc:
    Standardize clock parameter names to 'clock'.
    Fix description for Bus clock_ratio (no longer a ratio).
python/m5/config.py:
    Minor tweaks on Frequency/Latency:
    - added new Clock param type to avoid ambiguities
    - factored out init code into getLatency()
    - made RootFrequency *not* a subclass of Frequency so it
    can't be directly assigned to a Frequency paremeter

--HG--
extra : convert_revision : fc4bb8562df171b454bbf696314cda57e1ec8506
2005-06-01 21:44:00 -04:00
Lisa Hsu
0b88d529dc ns_gige_reg.h, ns_gige.cc:
clean up code to eliminate license issues.

dev/ns_gige.cc:
dev/ns_gige_reg.h:
    clean up code to eliminate license issues.

--HG--
extra : convert_revision : 64adbd87faa5ce5ac6b9da4fd95b12796487c8f9
2005-05-28 21:54:32 -04:00
Nathan Binkert
364f6e3235 Make sinic work with mpy
dev/sinic.cc:
dev/sinic.hh:
    Fix sinic parameters. (header_bus -> io_bus)
python/m5/objects/Ethernet.mpy:
    Add simobj definitions for sinic.

--HG--
extra : convert_revision : 77d5b80bd1f1708329b263fb48965d7f555cc9d1
2005-05-02 19:00:11 -04:00
Nathan Binkert
1760925f73 Improve checkpointing of ethernet packets a bit.
dev/etherpkt.cc:
    Don't try to suck in the packet if the length is zero.

--HG--
extra : convert_revision : 7212f3b677777fbce301f0613b9f513bb9fe057e
2005-05-02 18:55:39 -04:00
Ron Dreslinski
602a489573 Add suport for no allocation of cache block on a dma read passing through a cache from the cpu-side interface
--HG--
extra : convert_revision : 0a3b3741924ed39c1c8710d0963e4c8f3e73f81a
2005-04-29 21:01:43 -04:00
Nathan Binkert
3154e2a0c7 Add the m5 parameter to the ns83820 device model so that we
can pass simulator specific options to the device driver.

dev/ns_gige.cc:
    Add the m5 register and parameter to the ns83820 device model
    so that we can pass simulator specific options to the device
    driver.
dev/ns_gige.hh:
dev/ns_gige_reg.h:
    Add the m5 register to the ns83820 device model

--HG--
extra : convert_revision : 84674887560fa3b607e725b8e5bc8272761fcf09
2005-04-24 21:32:32 -04:00
Nathan Binkert
5eab6c4b41 Make the notion of a global event tick independent of the actual
CPU cycle ticks.  This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency.  For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.

arch/alpha/ev5.cc:
    The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
    frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
    frequency isn't the cpu parameter anymore, cycleTime is.
    create several public functions for getting the cpu frequency
    and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
    Now that ticks aren't cpu cycles, fixup code to advance
    by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
    Provide a function to get the number of ticks for a given
    number of cycles.
dev/alpha_console.cc:
    Update for changes in the way that frequencies and latencies are
    accessed.  Move some stuff to init()
dev/alpha_console.hh:
    Need a pointer to the system and the cpu to get the frequency
    so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
    outline the constructor and destructor
dev/platform.hh:
    outline the constructor and destructor.
    don't keep track of the interrupt frequency.  Only provide the
    accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
    outline the constructor and destructor
    Don't set the interrupt frequency here.  Get it from the actual device
    that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
    Make the interrupt interval a configuration parameter.  (And convert
    the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
kern/tru64/tru64_system.cc:
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
python/m5/config.py:
    Fix support for cycle_time relative latencies and frequencies.
    Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
    All CPUs now have a cycle_time.  The default is the global frequency,
    but it is now possible to set the global frequency to some large value
    (like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
    Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
    We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
    Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
    this frequency isn't needed.  We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
    The clock generator should hold the frequency
sim/eventq.hh:
    Need to remove this assertion because the writeback event
    queue is different from the CPU's event queue which can cause
    this assertion to fail.
sim/process.cc:
    Fix comment.
sim/system.hh:
    Struct member to hold the boot CPU's frequency.
sim/universe.cc:
    remove unneeded variable.

--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 15:32:06 -04:00
Nathan Binkert
060bb32f27 Cleanup diagnostic and error messages for the IDE disk
dev/ide_disk.cc:
    Cleanup diagnostic and error messages

--HG--
extra : convert_revision : fb1bc6d9f28a10961c9d3ee1dc81b540b92653b8
2005-04-06 17:47:32 -04:00
Nathan Binkert
235186859c Better debugging output for the ide controller
dev/ide_ctrl.cc:
    Better debugging

--HG--
extra : convert_revision : 854e17f9f36fe4a0b6b69fd48027d2b1b231e858
2005-04-06 17:39:25 -04:00
Nathan Binkert
43a9caa221 expose variables for number of global events per simulated second,
millisecond, microsecond, etc. so that the user can explicitly
convert between system ticks and time and know what sorts of
expensive operations are being used for that conversion.

arch/alpha/alpha_tru64_process.cc:
arch/alpha/pseudo_inst.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ns_gige.cc:
dev/sinic.cc:
dev/tsunami_io.cc:
dev/uart.cc:
sim/stat_control.cc:
sim/syscall_emul.hh:
    Use the new variables for getting the event clock
dev/etherdump.hh:
    delete variables that are no longer needed.

--HG--
extra : convert_revision : d95fc7d44909443e1b7952a24ef822ef051c7cf2
2005-03-29 07:55:44 -05:00
Nathan Binkert
257be74341 Formatting fixes
--HG--
extra : convert_revision : 9a726945b7a1decbecf460df6714257b88742dc8
2005-03-23 22:58:47 -05:00
Lisa Hsu
d40a1c6573 Some changes to NSGigE's DPRINTF's that helped when I was doing NAT stuff.
--HG--
extra : convert_revision : d36c84a835667d4c67f46432a90b9557b0710eac
2005-03-16 13:55:58 -05:00
Ali Saidi
76e6dd01ae Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : 9eed6f31249ff099464044b32b882b3cc041b57a
2005-03-14 15:38:26 -05:00
Lisa Hsu
81169916aa print the daddr to pciconfigall DPRINTF.
--HG--
extra : convert_revision : d13ce459d5dac026e596f0bb3ba801b1dbed9ed0
2005-03-14 11:16:27 -05:00
Ali Saidi
c977d2a02b remove addr from PciConfigDevice since it's not used
Random some small config file stuff

dev/pcidev.cc:
objects/Pci.mpy:
    remove addr since it's not used

--HG--
extra : convert_revision : aeb5993552d65a5e3b57f393bcb7d8aaadf6b5a2
2005-03-11 19:34:35 -05:00
Lisa Hsu
21946f0710 fix typo in the fixed etherlink serialization.
dev/etherlink.cc:
    fix type in serialization.

--HG--
extra : convert_revision : 87f47db14b90f414fef9a0db869da4d7ef72216a
2005-03-09 11:04:19 -05:00
Nathan Binkert
b9c847563d Fix serialization of the EtherLink object
dev/etherlink.cc:
    - The EtherLink::Link object is no lonver serializable, so it is now
    necessary to prepend the object's name (as determined by the parent)
    to all parameters.
    - Fix the serialization of the LinkDelayEvent so it actually works
    - Rename some variables to make serialization simpler
dev/etherlink.hh:
    - Make the EtherLink::Link object *not* derive from serializeable.
    Instead, the serialize function will take a base name from
    the parent EtherLink object and prepend that base name to each of
    its variable names when serializing.  This is similar to the
    PacketData and PacketFifo classes.
    - Make the EtherLink::Link object keep a pointer to its parent and its
    link number so the LinkDelayEvent can be properly serialized.
    - Rename some variables to make serialization simpler.

--HG--
extra : convert_revision : e5aa54cd9e07b5e033989809100e1640abfb8bed
2005-03-08 12:47:55 -05:00
Nathan Binkert
92ed0dffc0 formatting fixes
--HG--
extra : convert_revision : 8b9bfed29b66e8bce11448f175273f5ebb6876b2
2005-02-21 17:32:57 -05:00
Ali Saidi
538d7d19c8 Merge
--HG--
extra : convert_revision : 10c28ac66c7e71615a239783e21ab36a47de992c
2005-02-13 23:05:47 -05:00
Ali Saidi
57482491c5 build mysql version if libraries exist
add dprintf on alignment faults
fix RR benchmark rcS script name
Add Dual test without rcS script
Update Monet to be closer to the real thing
Fix p4/monet configs
Add a way to read the DRIR register with at 32bit access for validation

SConscript:
build/SConstruct:
    always use mysql if the libraries are installed
arch/alpha/alpha_memory.cc:
    Add a DPRINTF to print alignment faults when they happen
dev/tsunami_cchip.cc:
    Add a way to read the DRIR for validation.

--HG--
extra : convert_revision : 8c112c958f36b785390c46e70a889a79c6bea015
2005-02-13 23:03:04 -05:00
Nathan Binkert
06a4686af9 Rework the command line paramters for python output and how
output files and the output directory are are handled.  Make
the output directory configuration via a command line parameter,
or an environment variable.

SConscript:
    Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
    use new output file code
cpu/base_cpu.cc:
    use new output file code to generate output streams
dev/etherdump.cc:
    use the output file code to find the output directory
    use a real stream instead of a pointer
dev/etherdump.hh:
    use a real stream instead of a pointer
objects/Root.mpy:
    output_dir and config_output_file are not longer configured here.
sim/main.cc:
    - Completely rework the command line argument passing to deal with
    changes in python and output files.
    - Update help output to reflect changes.
    - Remove all direct support for .ini files.  They are strictly
    for intermediate representation.
    - Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
    syntax for python.  This will generate: foo.bar = 'blah' in the python
    script.
    - Add '-d' to set the output directory.
    - Use new output file code to access the output stream.
sim/serialize.cc:
    use the new code to find the output directory
sim/universe.cc:
    Get rid of makeOutputStream.  Use the new output file code.
    Remove output_dir and config_output_file as parameters.

--HG--
extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
2005-02-11 09:47:41 -05:00
Ali Saidi
7e559f6c50 Add Monet configuration, update p4 parameters, couple of typo fixes
dev/tsunami_cchip.cc:
    add a fake register to tsunami that we can do 32bit reads to.
    Warn on access.

--HG--
extra : convert_revision : d87860f3b527528151c23431556039bca6e12945
2005-02-03 23:50:57 -05:00
Nathan Binkert
936ad58402 small python config related fixes.
dev/simconsole.cc:
sim/universe.cc:
    isValid isn't compatible with new python stuff, so whack it.

--HG--
extra : convert_revision : 0c50038769a558650479c51122a8be5d92e7d9c4
2005-02-03 14:33:02 -05:00
Ali Saidi
da269014da removed all tsunami dependence on tlaserreg.h (RTC defines) and
all but tlaser_node.cc dependence on tlaserreg.h

dev/tsunami_io.cc:
dev/tsunamireg.h:
    removed tlaserreg.h

--HG--
extra : convert_revision : 148a5d79530e5ed721a49279f684a48041deed2b
2005-01-30 16:58:39 -05:00
Kevin Lim
e6b99b0768 Merge zizzer.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5-patched/m5-new

--HG--
extra : convert_revision : e802c800a478c297d3aa780a9ea3c6701453d91d
2005-01-21 18:31:30 -05:00
Ron Dreslinski
7f10e948a5 Merge zizzer:/z/m5/Bitkeeper/m5
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/new_config

--HG--
extra : convert_revision : 8c87cd948d501b1fc58d57f1f505d1f72725ecde
2005-01-21 04:55:55 -05:00
Ron Dreslinski
867d80d55d Fix annoying bug that lead to dropped packets in the P4 system
dev/pktfifo.cc:
    Make it so that we don't unserialize the size of the fifo, clobering the fact that we were trying to make it bigger, and leading to a misleading config.out that states the un-overwritten max_size.
    Perhaps this should instead be a panic if the size (amount that was serialized) is bigger than the maxsize that was assigned by the configuration file.

--HG--
extra : convert_revision : d4b0527bfd7a584554ddc87c9b2103f7a3a72332
2005-01-21 04:55:43 -05:00
Ali Saidi
29789443ba Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : d5e6f6e696d7607f89894856d940afc89ae8e37b
2005-01-19 18:40:09 -05:00
Ali Saidi
886f905785 added total bytes/bandwidth/packets formulas to nics
cleaned up stability code and wrote some better help for stats.py
fixed sample bug in info.py

dev/ns_gige.cc:
dev/ns_gige.hh:
dev/sinic.cc:
dev/sinic.hh:
    add total bandwidth/packets/bytes stats
util/stats/info.py:
    fixed samples bug
util/stats/stats.py:
    cleaned up stability code and wrote a bit better help

--HG--
extra : convert_revision : cae06f4fac744d7a51ee0909f21f03509151ea8f
2005-01-19 18:40:02 -05:00
Kevin Lim
6ac7954242 Merge zizzer.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5-patched/m5-new

--HG--
extra : convert_revision : 3b9413a6861eaddb8de753d76e217106d41cc347
2005-01-19 16:34:35 -05:00
Ron Dreslinski
10371be698 Fix serialization of txPacket (need to properly calculate the length before serialization)
--HG--
extra : convert_revision : e93321495d19afb86949daf2c14102ffb6bcef41
2005-01-19 16:26:19 -05:00
Nathan Binkert
b65f365474 fix unserialization of PacketFifo
dev/pktfifo.cc:
    fix unserialization.  calling resize on a list just sticks
    uninitialized garbage into the list.

--HG--
extra : convert_revision : 1cbff596dd0b88560e23b9368ec75a7369beb9d9
2005-01-19 12:43:06 -05:00
Kevin Lim
aed3e6780a Merge changes to make m5 g++ 3.4 compatible.
sim/param.cc:
    Merge changes.

--HG--
extra : convert_revision : b5044e1f7c48ae2d74d5233dd4fabfb7a801d7c8
2005-01-18 13:02:47 -05:00
Nathan Binkert
3ece6ab029 New and improved configuration mechanism. No more writing of
wierd ini files.  The ini files are still used as an intermediate step,
but a sophisticated python library exists to help build them more
easily.

SConscript:
    add the new embedded file stuff
    remove all of the old object description junk
base/inifile.cc:
base/inifile.hh:
    get rid of findDefault and findAppend since they were the source
    of much evil.
base/trace.cc:
    For now, if we don't have the dprintf_stream set up, dump
    to standard out.  We probably want a command line option
    for this.
dev/alpha_console.cc:
    PioDevice now takes a platform parameter.
    All PioDevices must have a pio_latency parameter.  We stick
    a dummy parameter in here for now until we get rid of the
    builder stuff.
dev/alpha_console.hh:
    don't need Platform anymore
dev/baddev.cc:
    PioDevice now takes a platform parameter.
    All PioDevices must have a pio_latency parameter.  We stick
    a dummy parameter in here for now until we get rid of the
    builder stuff. Same for the platform parameter, though we just
    pass the PioDevice a null parameter since it isn't used by
    this device and it's quicker.
dev/baddev.hh:
    fix #include guards
dev/etherlink.cc:
    rename parameters.
dev/ethertap.cc:
    rename parameters
dev/ide_ctrl.cc:
    All devices need an address even if it will get overwritten later.
dev/ide_disk.cc:
    use an enum for the drive ID stuff.
    rename disk_delay -> delay
    Actually, I think that we should implement "cable select" and
    have the controller tell the drive what it is.
dev/io_device.cc:
dev/io_device.hh:
    All IO devices take a Platform *
dev/ns_gige.cc:
    all devices need an io_bus.  rename header_bus to io_bus
    We don't need stuff for the interrupt controller since
    it's all in the platform now.
dev/ns_gige.hh:
    We don't need stuff for the interrupt controller now since
    it's all in the platform.
dev/pciconfigall.cc:
    Pass a dummy NULL to the PioDevice for the platform since
    we don't need one.
dev/pcidev.cc:
    Move a bunch of common functionality into the PciDev
dev/platform.hh:
    remove unneeded code
dev/tsunami.cc:
    remove unused param
dev/tsunami_cchip.cc:
    pass platform pointer
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
    pass platform variable
dev/uart.hh:
    don't need to keep a platform pointer.  it's in the base class
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
    rename some parameters
sim/builder.cc:
    clean up builder code. use more parameters from the
    config node.  all sections with a type= are now created,
    the old mechanisms no longer work
sim/builder.hh:
    remove some extra variables since they are found in the ConfigNode
sim/main.cc:
    add a quick hack command line argument -X to dump out the
    embedded files.  (probably should be fixed up a little.)
    accept .mpy files
    printing to the streams has to happen after the hierarchy
    is built since we're moving away from param contexts
sim/param.cc:
    add parsing support for ranges
sim/process.cc:
    isValid isn't very useful anymore.  interpret the names
    stdout, stderr, cout, cerr for the file descriptors
sim/pyconfig/SConscript:
    Add Action handlers for creating an embedded python file
    and for creating an embedded C file.

    use these action handlers to embed all objects found in the objects
    tree into the binary along with the importer and the m5config stuff
sim/pyconfig/m5config.py:
    Major changes to the original configuration file generator.  These
    changes largely involve implementing copy-on-write like semantics
    for all of the SimObjects.  Real documentation must be written.
sim/universe.cc:
    Universe becomes a SimObject since we don't really have the notion of
    param contexts in the python code.

--HG--
rename : sim/pyconfig/m5configbase.py => sim/pyconfig/m5config.py
extra : convert_revision : c353453e5beb91c37f15755998fc0d8858c6829a
2005-01-15 04:12:25 -05:00
Kevin Lim
f58d85128d Fixes so m5 compiles on gcc 3.4, which has much stricter syntax. Most changes come from templated code,
which is evaluated slightly differently than in previous versions of gcc.

arch/alpha/alpha_linux_process.cc:
    Alphabetize includes.
arch/alpha/vptr.hh:
    Change the constants that are being used for alpha pagebytes to come from the ISA.
base/random.hh:
cpu/static_inst.cc:
sim/param.cc:
    Fix up template syntax.
base/range.hh:
    Include iostream for << operator.
base/res_list.hh:
base/statistics.hh:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.hh:
sim/eventq.hh:
sim/param.hh:
    Fixup for templated code to resolve different scope lookup in gcc 3.4.  This defers the lookup of the
    function/variable until actual instantiation time by making it dependent on the templated class/function.
base/trace.cc:
    Fix call to new.
base/trace.hh:
    Fix up #define to have full path.
cpu/base_cpu.cc:
    Fix up call to new.
dev/etherlink.hh:
dev/ns_gige.hh:
dev/sinic.hh:
    Fixup for friend class/function declaration.  g++ 3.4 no longer allows typedefs to be declared as
    a friend class.
dev/pcidev.hh:
    Fix up re-definition of access level to params.
kern/linux/linux_syscalls.hh:
kern/tru64/tru64_syscalls.hh:
    Fix up header.  Fix up template syntax.
sim/serialize.cc:
    Include errno.h.
sim/startup.cc:
    Change startupq.  queue was getting destructed before all things had called ~StartupCallback(), which lead
    to a segfault.  This puts startupq in global space, and we allocate it ourselves.  Other code may be similar
    to this and may need changing in the future.
sim/syscall_emul.hh:
    Include cpu/exec_context.hh and sim/process.hh, as forward declarations are no longer sufficient.
sim/universe.cc:
    Include errno.h

--HG--
extra : convert_revision : e49d08ee89eb06a28351f02bafc028ca6652d5af
2005-01-14 18:34:56 -05:00
Steve Reinhardt
f3e89d3991 Change Bus template parameter to BusType (to avoid confusion with Bus class).
Change Mem template parameter to MemType while we're at it.

dev/io_device.hh:
    Change Bus template parameter to BusType (to avoid confusion with Bus class).

--HG--
extra : convert_revision : dca8effb177535b3624ef08a3d3b8afab720390b
2004-12-09 01:07:08 -05:00
Ali Saidi
34260bbf0d Add support for Tsunami with 64 processors
base/socket.cc:
    Make panic print a more worthwhile message
dev/tsunami.hh:
    Change max number of tsunami cpus to be 64
dev/tsunamireg.h:
    Add new registers and register blocks for 64 cpu tsunami

--HG--
extra : convert_revision : 3ceaaa998518ded8613bc64edc04cb9120fd3d15
2004-12-06 12:06:16 -05:00
Ali Saidi
244ce7fb29 Print a warning if two devices are sharing the same interrupt
Update profile-top to print 2 or 4 graphs depending on a command line
option

dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.hh:
    Print a warning if two devices are sharing the same interrupt

--HG--
extra : convert_revision : 0ef99cac92fbf2916ab8e5b1125d520eb4b5ac7d
2004-11-22 22:32:37 -05:00
Nathan Binkert
4ef2cd862d Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : 3127ab9f076b5ecce897a1c7de2678b58b73f7fb
2004-11-18 16:23:32 -05:00
Nathan Binkert
86836124ed always initalize the size of a packet (forgotten on checkpoints
in some places).  use the constructor for setting the size.

--HG--
extra : convert_revision : fad322c1d45b1952804cf35942b5685d70128e59
2004-11-18 16:23:31 -05:00