Commit graph

10020 commits

Author SHA1 Message Date
Ron Dreslinski
501db90f2c Make changes so that coherence works on a timing bus for the top-level of caches.
This added a snoopResponse callback to the caches, and a NACK to requests.

cpu/memtest/memtest.cc:
    Modified to work with do_events:
    No multiple requests to the same block outstanding at the same time from the same tester
    Using false sharing, each tester does only 1 byte access using it's id as the blk offset
    Allow for cycles before signaling deadlock, with do events it can take time to complete (NACK/blocked bus)
cpu/memtest/memtest.hh:
    Updated to keep an id with each tester (used for address generation)
    Updated to keep a list of outstanding address to prevent multiple outstanding per tester
    //Should really look into doing store forwarding within the tester, then we can test more functionality

--HG--
extra : convert_revision : 05fbcf547e4ffab9d220aeb73126ed787ca82239
2004-11-12 14:40:07 -05:00
Ali Saidi
856fdbe5aa Added nfs-client.rcS and nfs-server.rcS
--HG--
extra : convert_revision : 48cf156ce397b68075c07ed072c95644affa3ef1
2004-11-12 14:21:52 -05:00
Steve Reinhardt
2db94b9186 Bus interface range fixes for caches (to fix bus brudge range bug).
Add "fast write" behavior on writeInvalidates.

--HG--
extra : convert_revision : 0c5c1e06d6cbb608610b99fb4e4fb04db4997c7b
2004-11-10 22:18:20 -05:00
Steve Reinhardt
1e4acc382a add DPRINTFs
--HG--
extra : convert_revision : 7d2fad2e4f9125d41c8d1972d8f19f38bb95c06e
2004-11-10 19:57:55 -05:00
Nathan Binkert
b64619d575 Make it so we can cast an EthAddr to a 64-bit integer
--HG--
extra : convert_revision : 2f470d122997fbc375f04e9c2682b6528adef50c
2004-11-10 18:49:55 -05:00
Nathan Binkert
338513c681 Use the inPalMode function instead of the PC_PAL macro
--HG--
extra : convert_revision : 58e0a19ba98777e5d2e2572ed02dee1914378ff7
2004-11-10 18:44:37 -05:00
Nathan Binkert
ab8409738e Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : 64eca6a11aeae236e802f9ca8eb97ca05d394ec7
2004-11-10 18:37:33 -05:00
Nathan Binkert
4328480b56 Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.

arch/alpha/ev5.cc:
    XC -> CPU (and xc -> CPU) since we're really talking about a CPU here
    Don't use the global check_interrupts variable.  Add a per-cpu
    checkInterrupts variable and use that to determine whether an interrupt
    can occur on a given cycle.

--HG--
extra : convert_revision : be4c0247e5834005c60a45796a222cffd327b64e
2004-11-10 18:37:19 -05:00
Nathan Binkert
82638c2e98 don't print dprintk twice on the same line
--HG--
extra : convert_revision : f41fc47221b6fb83eb92c080de073a11cf04c353
2004-11-10 18:15:04 -05:00
Jennifer Treichler
4524eb0b28 software prefetch fix
--HG--
extra : convert_revision : b70257a60c5f71a86a45c32d5a4ccaa249300dca
2004-11-09 14:58:12 -05:00
Nathan Binkert
e2de2ea192 Fix to deal with the new base class parameter for registration
deferral

--HG--
extra : convert_revision : f968e3ba44604522cb10db8a60d7e18f1733e06a
2004-11-03 23:21:10 -05:00
Nathan Binkert
8056b9a48a Forgot about the tracing cpus for the changes to the base class
cpu/trace/opt_cpu.cc:
cpu/trace/trace_cpu.cc:
    we don't want to register this cpu since it's not a real cpu

--HG--
extra : convert_revision : 3b87b6ac3dd061018909bf4fdb4e2d611128d07b
2004-11-03 22:30:13 -05:00
Nathan Binkert
d82e0d11d1 make activation of exec contexts happen in startup
the registration stuff all moves into BaseCPU

cpu/base_cpu.cc:
    Move the registration stuff into the BaseCPU since all
    other CPUs use it.
cpu/base_cpu.hh:
    Move the defer registration stuff into the BaseCPU since all
    other CPUs use it.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    registration stuff moved to base class
sim/system.cc:
    the activation of exec contexts should happen at startup, not
    when they are registered.
sim/system.hh:
    the system now has a startup function

--HG--
extra : convert_revision : bb6a7c2da5a1ecf5fe7ede1078200bfe5245f8ef
2004-11-03 20:46:33 -05:00
Taeho Kgil
129b885abd Add Inorder CPU model
SConscript:
arch/isa_parser.py:
cpu/static_inst.hh:
    Add inorderCPU

--HG--
extra : convert_revision : 141372808fac5f6d125f9051ee0be982d21683aa
2004-11-03 17:56:26 -05:00
Nathan Binkert
78ae8764a9 add a new phase to the simulator. Basically the simulator now goes
through the following phases.

1) Construct all param contexts
2) Call the checkParams() on each context
3) Build the configuration hierarchy
4) Construct all SimObjects
5) Initialize all SimObjects by calling init() on each one
6) Unserialize the checkpoint
7) Register all statisitcs
8) Check validity of all statistics (after that, no new stats)
9) Reset all stats.
10) Call SimStartup() which calls startup() on all SimObjects,
ParamContexts, and any other object deriving from StartupCallback

SConscript:
    no more SimInit() we have SimStartup() now
sim/param.hh:
    Make all params have a startup callback.
sim/sim_events.cc:
    the init callbacks no longer exist.  We can simplify code by
    using startup().
sim/sim_object.hh:
    Make all SimObjects derive from StartupCallback

--HG--
extra : convert_revision : ab81e259eb5510cc597f7bacb2bfb619fb4cc15f
2004-11-03 11:47:55 -05:00
Nathan Binkert
64a47b8ec1 remove mention of a couple of files that don't exist anymore
SConscript:
    these files don't exist

--HG--
extra : convert_revision : 660f3861b5f2824a44fc8a281a782faeef4467f2
2004-11-01 14:39:48 -05:00
Steve Reinhardt
0172720bb3 More user-friendly updates for 570.
--HG--
extra : convert_revision : 0fe38f6ab652b575cc24d18d65c237291e1793d6
2004-10-28 16:54:49 -04:00
Steve Reinhardt
da44773793 Add '%' in some places to suppress spurious doxygen auto-links.
--HG--
extra : convert_revision : 6527dc766730745516f52f7e7f5acf43d64e8733
2004-10-28 00:25:57 -04:00
Steve Reinhardt
40c665dd7b Major documentation update for 570 F04.
sim/main.cc:
    Get rid of default.ini processing... it's kind of a pain and nobody uses it.
util/tracediff:
    Add comments on usage.

--HG--
extra : convert_revision : b811288b2945585d60685684ea88c99d1913fbf3
2004-10-27 22:37:52 -04:00
Ali Saidi
be0184b463 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5-smp
--HG--
extra : convert_revision : 59173b5d4599cfe1cbaa96705e9731ee5a8d8647
2004-10-25 18:15:28 -04:00
Ali Saidi
3402411661 changes to make interrupts part of the platform rather than tsunami
specific

--HG--
extra : convert_revision : f51788dd41c23f13b253268bb2b286a5225ef087
2004-10-25 18:14:13 -04:00
Nathan Binkert
d55eb90fc7 Don't use magic numbers.
arch/alpha/isa_traits.hh:
    Move defines to non full system code section so they can
    be used elsewhere
cpu/simple_cpu/simple_cpu.cc:
    Don't use magic numbers
cpu/simple_cpu/simple_cpu.hh:
    simple format nit

--HG--
extra : convert_revision : b8d492218340d41ab9420c6ad1e81a197db1c132
2004-10-25 16:23:22 -04:00
Nathan Binkert
e377f63c86 add a hack to make sure we exit when sampling is complete.
--HG--
extra : convert_revision : a0d66b1915f14485d1798a3142dd8c828925d151
2004-10-25 15:47:46 -04:00
Steve Reinhardt
e852f9e31a Add explicit phases to order ParamContext initializations.
--HG--
extra : convert_revision : c24fba2bded2493a892fa93de0c61f9674cfedbb
2004-10-25 00:56:47 -04:00
Steve Reinhardt
400daa7e41 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : aac76a4b82b3455620618bba6238507248cc68cc
2004-10-24 23:06:35 -04:00
Nathan Binkert
6ac0d27b7d Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : aaf81b1c1283229de21e0ef7e9916a4464f72fa3
2004-10-23 16:18:53 -04:00
Nathan Binkert
a7fd7729ab flesh out the TCP/IP/Ethernet support
base/refcnt.hh:
    reorganize the RefCountingPtr a little bit to make it easier
    to derive from
dev/etherpkt.hh:
    this doesn't belong here. use the inet.hh stuff
dev/ns_gige.cc:
dev/ns_gige.hh:
    use newer features in the tcp/ip/ethernet stuff

--HG--
extra : convert_revision : 32c1953c95655c1f4c70e0d8adedfd94beead624
2004-10-23 16:18:44 -04:00
Nathan Binkert
ef145b2827 bump up the number of cshrs so we don't panic
--HG--
extra : convert_revision : 25dfd48b2c579401d265ba9ed85379831f207b8e
2004-10-23 13:52:46 -04:00
Nathan Binkert
833c5b5ef4 get rid of some unused variables
--HG--
extra : convert_revision : 187cee0e0bad09bbaff059eb60f20d7d32c1b52c
2004-10-23 13:11:42 -04:00
Nathan Binkert
656031b073 make stuff compile on openbsd again
clean up a few other things while we're here.

base/bitfield.hh:
base/compression/null_compression.hh:
    dont #include <inttypes.hh> use "sim/host.hh"
    fix #include guard
base/stats/types.hh:
    dont #include <inttypes.hh> use "sim/host.hh"
kern/linux/aligned.hh:
    dont #include <stdint.hh> use "sim/host.hh"
    fix #include guard
kern/linux/hwrpb.hh:
    fix #include guard

--HG--
extra : convert_revision : 288c687a59a1e770bbb834879173e1a2ea371bce
2004-10-23 12:31:24 -04:00
Nathan Binkert
224acc2abc get rid of pmap.h and make things variables and inline
functions instead of preprocessor macros.

arch/alpha/vtophys.cc:
    use new constants, functions and structs to clean up the
    vtophys code.
arch/alpha/vtophys.hh:
    Clean up a little bit and make the protypes match new changes.
base/remote_gdb.cc:
dev/ide_disk.cc:
kern/tru64/tru64_events.cc:
    use new constants from isa_traits.hh instead of ones from
    old pmap.h

--HG--
extra : convert_revision : 5dce34e3b0c84ba72cefca34e5999b99898edcef
2004-10-23 10:41:35 -04:00
Nathan Binkert
3ab83348d2 in the arch/alpha directory we should use arch/alpha, not
targetarch.

arch/alpha/alpha_memory.cc:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/faults.cc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
    in the arch/alpha directory we should use arch/alpha, not
    targetarch.  sort includes while we're here.

--HG--
extra : convert_revision : 99a71540e2997173db5c1072cef910a26acc75b2
2004-10-23 00:39:15 -04:00
Nathan Binkert
f834289a51 Do the targetarch dependency stuff better.
SConscript:
    targetarch is only for headers, not cc files.  move all cc files
    back to arch/alpha, and make the target arch directory do this
    echo '#include "arch/alpha/foo.hh"' > targetarch/foo.hh for every
    header file.  This works a lot better and doesn't kill emacs'
    ability to parse compile outputs

--HG--
extra : convert_revision : c1d51643bdc457ae2d96c5f50d3ef1c6a58a600d
2004-10-22 23:54:41 -04:00
Steve Reinhardt
7c58c38e66 Very minor formatting glitches.
sim/main.cc:
    Add 'u' option back in to help message.

--HG--
extra : convert_revision : 9f535c9d898a9e8e54c54cf83044a24a8843f62e
2004-10-22 22:51:28 -04:00
Steve Reinhardt
0da150b294 Make targetarch directory in build tree and copy arch/alpha files to it
instead of using symlink.  The symlink broke scons's built-in include
dependency tacking.

Interestingly once it was fixed scons discovered two circular dependency
problems which are also fixed now.

SConscript:
    Make targetarch directory in build tree and copy arch/alpha files to it
    instead of using symlink.  The symlink broke scons's built-in include
    dependency tacking.
arch/alpha/ev5.hh:
    Get rid of circular #include dependence.
kern/kernel_stats.cc:
    Add needed header file.
kern/linux/linux_syscalls.hh:
kern/tru64/tru64_syscalls.hh:
    Replace targetarch/syscalls.hh with single template class declaration.

--HG--
extra : convert_revision : b8551623c1d441c6eb8d0651387e97e373128814
2004-10-22 22:49:12 -04:00
Nathan Binkert
e9acc88e36 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/current

--HG--
extra : convert_revision : 92785367bd1ae71505c5ac0491ed8e18b21ad577
2004-10-22 02:11:59 -04:00
Nathan Binkert
021b1a0ef9 make all signatures go into a single file that's at the top
of the build directory.  This makes it so that scons won't
leave the .sconsign turds all over the source tree.

--HG--
extra : convert_revision : d530ed3eaed73c7ce2d21c7391f815051a37b500
2004-10-22 02:11:51 -04:00
Nathan Binkert
b881408ed7 Clean up the Range class and associated usages. The code was
never clear about whether the end of the range was inclusive
or exclusive.  Make it inclusive, but also provide a RangeSize()
function that will generate a Range based on a start and a size.
This, in combination with using the comparison operators, makes
almost all usages of the range not care how it is stored.

base/range.cc:
    Make the end of the range inclusive.

    start/end -> first/last
    (end seems too much like end() in stl)
base/range.hh:
    Make the end of the range inclusive.

    Fix all comparison operators so that they work correctly with
    an inclusive range.  Also, when comparing one range to another
    with <, <=, >, >=, we only look at the beginning of the range
    beacuse x <= y should be the same as x < y || x == y.  (This wasn't
    the case before.)

    Add a few functions for making a range:
    RangeSize is start and size
    RangeEx is start and end where end is exclusive
    RangeIn is start and end where end is inclusive

    start/end -> first/last
    (end seems too much like end() in stl)
dev/alpha_console.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
    Use the RangeSize function to create a range.

--HG--
extra : convert_revision : 29a7eb7fce745680f1c77fefff456c2144bc3994
2004-10-22 01:34:40 -04:00
Kevin Lim
2fb632dbda Check in of various updates to the CPU. Mainly adds in stats, improves
branch prediction, and makes memory dependence work properly.

SConscript:
    Added return address stack, tournament predictor.
cpu/base_cpu.cc:
    Added debug break and print statements.
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
    Comment out possibly unneeded variables.
cpu/beta_cpu/2bit_local_pred.cc:
    2bit predictor no longer speculatively updates itself.
cpu/beta_cpu/alpha_dyn_inst.hh:
    Comment formatting.
cpu/beta_cpu/alpha_full_cpu.hh:
    Formatting
cpu/beta_cpu/alpha_full_cpu_builder.cc:
    Added new parameters for branch predictors, and IQ parameters.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
    Register stats.
cpu/beta_cpu/alpha_params.hh:
    Added parameters for IQ, branch predictors, and store sets.
cpu/beta_cpu/bpred_unit.cc:
    Removed one class.
cpu/beta_cpu/bpred_unit.hh:
    Add in RAS, stats.  Changed branch predictor unit functionality
    so that it holds a history of past branches so it can update, and also
    hold a proper history of the RAS so it can be restored on branch
    mispredicts.
cpu/beta_cpu/bpred_unit_impl.hh:
    Added in stats, history of branches, RAS.  Now bpred unit actually
    modifies the instruction's predicted next PC.
cpu/beta_cpu/btb.cc:
    Add in sanity checks.
cpu/beta_cpu/comm.hh:
    Add in communication where needed, remove it where it's not.
cpu/beta_cpu/commit.hh:
cpu/beta_cpu/rename.hh:
cpu/beta_cpu/rename_impl.hh:
    Add in stats.
cpu/beta_cpu/commit_impl.hh:
    Stats, update what is sent back on branch mispredict.
cpu/beta_cpu/cpu_policy.hh:
    Change the bpred unit being used.
cpu/beta_cpu/decode.hh:
cpu/beta_cpu/decode_impl.hh:
    Stats.
cpu/beta_cpu/fetch.hh:
    Stats, change squash so it can handle squashes from decode differently
    than squashes from commit.
cpu/beta_cpu/fetch_impl.hh:
    Add in stats.  Change how a cache line is fetched.  Update to work with
    caches.  Also have separate functions for different behavior if squash
    is coming from decode vs commit.
cpu/beta_cpu/free_list.hh:
    Remove some old comments.
cpu/beta_cpu/full_cpu.cc:
cpu/beta_cpu/full_cpu.hh:
    Added function to remove instructions from back of instruction list
    until a certain sequence number.
cpu/beta_cpu/iew.hh:
    Stats, separate squashing behavior due to branches vs memory.
cpu/beta_cpu/iew_impl.hh:
    Stats, separate squashing behavior for branches vs memory.
cpu/beta_cpu/inst_queue.cc:
    Debug stuff
cpu/beta_cpu/inst_queue.hh:
    Stats, change how mem dep unit works, debug stuff
cpu/beta_cpu/inst_queue_impl.hh:
    Stats, change how mem dep unit works, debug stuff.  Also add in
    parameters that used to be hardcoded.
cpu/beta_cpu/mem_dep_unit.hh:
cpu/beta_cpu/mem_dep_unit_impl.hh:
    Add in stats, change how memory dependence unit works.  It now holds
    the memory instructions that are waiting for their memory dependences
    to resolve.  It provides which instructions are ready directly to the
    IQ.
cpu/beta_cpu/regfile.hh:
    Fix up sanity checks.
cpu/beta_cpu/rename_map.cc:
    Fix loop variable type.
cpu/beta_cpu/rob_impl.hh:
    Remove intermediate DynInstPtr
cpu/beta_cpu/store_set.cc:
    Add in debugging statements.
cpu/beta_cpu/store_set.hh:
    Reorder function arguments to match the rest of the calls.

--HG--
extra : convert_revision : aabf9b1fecd1d743265dfc3b174d6159937c6f44
2004-10-21 18:02:36 -04:00
Steve Reinhardt
f267dc4a87 Clean up/standardize handling of various output files.
No more non-intuitive behavior shifts depending on whether
outputDirectory is set (at the expense of backwards compatibility).
outputDirectory is now always valid, defaults to ".".

dev/etherdump.cc:
    Use makeOutputStream() to create output file.
    New behavior: actually complain if dump file can't
    be opened, instead of quietly ignoring the problem.
dev/etherdump.hh:
dev/simconsole.cc:
dev/simconsole.hh:
    Use makeOutputStream() to create output file.
sim/builder.cc:
sim/builder.hh:
sim/main.cc:
    builderStream() is now *configStream.
sim/serialize.cc:
    outputDirectory is now always valid, no need to check.
sim/universe.cc:
    Clean up/standardize handling of various output files.
    No more non-intuitive behavior shifts depending on whether
    outputDirectory is set (at the expense of backwards compatibility).
    outputDirectory is now always valid, defaults to ".".
    New function makeOutputStream() does "the right thing" to
    associate a stream with a filename.

--HG--
extra : convert_revision : a03c58c547221b3906e0d6f55e4a569843f2d646
2004-10-19 20:00:20 -04:00
Steve Reinhardt
f0aed43b93 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : 8d95458cf5460a8847e211eea1216eca57834b1a
2004-10-18 07:05:13 -04:00
Steve Reinhardt
1fcb56486e Get rid of spurious additions to ignore list.
--HG--
extra : convert_revision : 962dd521863a7b374e36238c81ec7935ea1811da
2004-10-18 07:05:09 -04:00
Ali Saidi
b5a71e5e52 Merge saidi@zizzer.eecs.umich.edu:/bk/m5
into ali-saidis-computer.local:/research/m5

--HG--
extra : convert_revision : 0b97ac6ae704e47023bb9db9694004022c548b4f
2004-10-17 22:32:17 -05:00
Steve Reinhardt
d257169358 Clean up obsolete g++ 2.95 workaround.
--HG--
extra : convert_revision : d8fe9415d855af57e48978904e8f6a52bb7a83cc
2004-10-17 22:04:23 -04:00
Erik Hallnor
fcbfd5a99d Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/ehallnor/work/m5

--HG--
extra : convert_revision : fa4e85d5f5c783985357eb5205fcf8957f214d1e
2004-10-17 00:07:28 -04:00
Erik Hallnor
867a9b84d9 Bunch of little changes for tracking copies and getting OPT right.
cpu/simple_cpu/simple_cpu.cc:
    Send Copy
cpu/trace/opt_cpu.cc:
    Calculate the block size correctly. Set lookupTable value directly, since the old way only worked for FA caches.
cpu/trace/trace_cpu.cc:
    Don't start events if the hierarchy is in non-event mode.

--HG--
extra : convert_revision : daf2db5ed7428c2fb08652cf76f6fe99d8357db5
2004-10-17 00:07:21 -04:00
Ali Saidi
3ef950abba Fixes for bigendian platforms
arch/alpha/vtophys.cc:
    PGOFSET -> ALPHA_PGOFSET to avoid include file problems
base/callback.hh:
    Added  a class to create a callback from a function
base/intmath.hh:
    make FloorLog2 inlined
dev/pcidev.cc:
    more work in getting pciconfig space happy with different endiannesses
dev/uart.cc:
    used an incorrect size for write uint64_t instead of uint8_t
sim/system.cc:
    when writing things into system data structures we need to pay
    attention to endianness

--HG--
extra : convert_revision : 52f441b5789c45db30ef2f6fd4975cbc7323a381
2004-10-16 19:10:51 -05:00
Ron Dreslinski
e6f46d7df7 Added support for exclusive state, defined the MESI and MOESI protocols
--HG--
extra : convert_revision : c991ba1acf1a8f628c0c0c34f307dd9d221c2743
2004-10-15 14:32:39 -04:00
Ali Saidi
8b1db1cf98 Fix from Adam: Strip the kseg off the physical address in the RPB structure. 2004-10-06 11:27:46 -04:00
Erik Hallnor
800d970c26 few more stat items to serialize
kern/kernel_stats.cc:
    Few more items to serialize

--HG--
extra : convert_revision : b816512735928cbde0b24bf8cb48deec9fb26413
2004-10-02 12:43:59 -04:00