SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
cpu/simple_cpu/simple_cpu.cc:
Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
Make 'fault' local to SimpleCPU::tick.
cpu/simple_cpu/simple_cpu.hh:
Make 'fault' local to SimpleCPU::tick (not an object member).
--HG--
extra : convert_revision : e878dedfff06aac0548aca8b14d66c18b8916895
This fixes detailed-mpboot, which was broken as of my last change.
Also clean up some of the ExecContext status initialization.
cpu/base_cpu.hh:
CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
which execContext had the status change.
BaseCPU::registerExecContexts() no longer needs to be virtual.
cpu/exec_context.cc:
Initialize _status directly... don't use setStatus() as this will notify the CPU
of the change before it is ready.
CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
which execContext had the status change.
cpu/exec_context.hh:
Don't need initStatus() any more.
cpu/simple_cpu/simple_cpu.cc:
Move execCtxStatusChg() from header to .cc file.
No longer need specialized version of registerExecContexts to schedule TickEvent.
cpu/simple_cpu/simple_cpu.hh:
Move execCtxStatusChg() from header to .cc file.
CPU::execCtxStatusChg() now takes thread_num as arg (must be 0 for SimpleCPU).
No longer need specialized version of registerExecContexts to schedule TickEvent.
kern/tru64/tru64_system.cc:
Don't need initRegs; the PC etc. get initialized in the CPU constructor.
ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
kern/tru64/tru64_system.hh:
Don't need initRegs; the PC etc. get initialized in the CPU constructor.
sim/prog.cc:
ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
--HG--
extra : convert_revision : e960ebbeb845960344633798e251b6c8bf1c0378
of two CPUs and one switch-over event. Still some stats glitches though.
cpu/simple_cpu/simple_cpu.cc:
Schedule switched-to CPU right on curTick so we don't lose a cycle.
Remember to switch out old CPU.
--HG--
extra : convert_revision : f1bf21cac054c74f59770d8b20b30118f46be6f1
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet). Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time. Also worked at making behavior and naming
in System and Process objects more consistent.
arch/alpha/ev5.cc:
Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
Support for ExecContext switching.
CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
Support for ExecContext switching.
Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
Support for ExecContext switching.
Renamed xcvec array to execContexts to be consistent with Process.
--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
base/statistics.cc:
Small fix: don't exit early out of dist when nozero is set and a zero val is found.
--HG--
extra : convert_revision : 95ba3328c8a79f05f4c821d99071dba10f013ad6
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/pc_event.hh:
Move to non architecture specific MemReq
--HG--
extra : convert_revision : 2445943b6f1c8af86b90cfa9c2f9b1eb4a6a1aa2
change printf to be printed only when something is binned so regression doesn't freak out.
base/statistics.cc:
change printf to be printed only when something is binned so regression doesn't freak out.
--HG--
extra : convert_revision : cb60128fc3ab605aa7e915c7c7512cf93b156c96
Add simple-events.ini for busses w/do_events=true, as this is all that seems to work at this point.
--HG--
extra : convert_revision : 0c5e64488b8f5860e39fa14b443b6c9bcd16c8bf
with a bunch of variants that include this and then just do deltas.
Note how much shorter the files are! It's much easier to see what's going on,
too. For example, is it intentional that uni-hier-compressed does not set
do_data on the L2 (though it does on the L1 & L3)?
Also got rid of a couple of old broken ones (uni-default and uni-perfect-L2).
--HG--
extra : convert_revision : 70a12c06a8deb9b1c59def313b48f69ab62efce2
Add explicit include of sim/param.hh to .cc files as needed.
cpu/base_cpu.cc:
cpu/exetrace.cc:
dev/etherint.cc:
sim/system.cc:
Add include of sim/param.hh.
sim/sim_object.hh:
Don't need to include sim/param.hh.
--HG--
extra : convert_revision : 8ed13f25c2087680230056ab7abb623e6a7699cf
Added doxygen comments to inifile.hh.
Updated initest. Some other minor cleanup.
base/inifile.cc:
Add support for '+=' append operation.
Factor common code from IniFile::load() and IniFile::add() into new Section::add().
Rename ConfigTable to SectionTable (more descriptive).
Fix bug in Section::dump().
base/inifile.hh:
Add doxygen comments.
Add support for '+=' append operation.
Factor common code from IniFile::load() and IniFile::add() into new Section::add().
Rename ConfigTable to SectionTable (more descriptive).
test/Makefile:
initest needs cprintf.o now.
test/foo.ini:
Add test of '+=' operator.
test/initest.cc:
Bring this up-to-date. Steal main loop from main.cc so we can test
multiple .ini files and command-line assignments too.
--HG--
extra : convert_revision : 982521677fbf464e93aa93798ff7d9611826f17c
Also, probe doesn't currently support compressed data, but will as soon as I encapsulate the calls more.
cpu/memtest/memtest.cc:
Change memtest to not do probes on uncacheables.
--HG--
extra : convert_revision : 28ca4f793562e55da75e8b7fc3852bb5b1328ea9
same - bin printing
statistics.cc:
printing of bins! now all the nice binning functionality is actually useful cuz you can see the data it so nicely took. this prints out only the individual bin values. totals to come.
statistics.hh:
add a binned() function to each stat so that at print time, we can know if it's binned in order to print it right.
base/statistics.hh:
add a binned() function to each stat so that at print time, we can know if it's binned in order to print it right.
base/statistics.cc:
printing of bins! now all the nice binning functionality is actually useful cuz you can see the data it so nicely took. this prints out only the individual bin values. totals to come.
base/statistics.hh:
same - bin printing
--HG--
extra : convert_revision : 09df9aae62b0e522230ee6bedcb51079346735a4
fix up some very ambiguous doxygen comments about Formulas
base/statistics.hh:
fix up some very ambiguous comments about Formulas
--HG--
extra : convert_revision : ad8d9579fd1933397590c78111bec7c0d19b0e14
Add debug callout for cache probes.
miss_queue.hh, miss_queue.cc, blocking_buffer.hh:
Add support for snooping the write buffer.
cache.cc:
Snoop the Write buffer for writebacks on probes.
--HG--
extra : convert_revision : b183152acae6e802a49ff8b7c2ff02c455b2e02a
arch/alpha/isa_desc:
Added new M5FUNC instruction to put allow reading of init_param inside simulator
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/system.cc:
sim/system.hh:
Added support for init_param
--HG--
extra : convert_revision : 8253f0b4239b194d4f04665c9deec1fcdf665c8a
change VectorDistProxy name to DistProxy - to be more consistent with other proxy namings.
base/statistics.hh:
change VectorDistProxy name to DistProxy - to be more consistent with other proxy namings.
--HG--
extra : convert_revision : c470c93cf598506be56312db52f6c528c213a149
Add probe calls to test update probe path.
cpu/memtest/memtest.cc:
Add probe calls to test update probe path.
--HG--
extra : convert_revision : b0fb97b54b6ffce9c575fda680b778da63767b7c
base/statistics.cc:
base/statistics.hh:
Implement a reset for for the statistics package.
This will cause all stats to be set to their default value.
Only the currently enabled bin will be reset.
test/Makefile:
Make tests work again now that we're naming include dirs
explicitly
test/stattest.cc:
test reset
--HG--
extra : convert_revision : 8d21cedf6ee91ed0a2412042ea5cb12f79b90eb3
base/callback.hh:
Don't remove a callback when it is processed.
Document the callback class
--HG--
extra : convert_revision : 9d15500434fe0e5d623c624aac86976708adf0eb
This makes testing a bit easier.
arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
Need to include builder.hh
sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
Separate the SimObjectBuilder stuff into its own file
--HG--
extra : convert_revision : e8395e0cc6ae1f180f9cd6f100795a1ac44aeed5
