Commit graph

343 commits

Author SHA1 Message Date
Steve Reinhardt
aeb8e8ccb7 Minor cleanup from building & diffing behavior
on various platforms.

base/hashmap.hh:
    gcc on Alpha doesn't always define __LP64__,
    even though it arguably should.
cpu/exec_context.cc:
    Clear register file on non-full-system too (even though
    it typically gets overwritten by the initial regs from
    the Process object).
sim/process.cc:
    Clear initial register copy in Process object.
    Not all regs get initialized when the executable is loaded.

--HG--
extra : convert_revision : f1fe4734a5ea81331d70994cb5284b1e9db0dceb
2004-03-24 23:29:10 -08:00
Lisa Hsu
3bc8cffc75 merge with m5 head
--HG--
extra : convert_revision : c90339248d1ee74df1c6b90a77ec9ea41f646311
2004-03-11 18:52:29 -05:00
Lisa Hsu
6eebb270be fix ALPHA
cpu/exec_context.cc:
    put this code between #ifdef FULL_SYSTEM

--HG--
extra : convert_revision : b934c7085d2a4337149ab8180a7d50851fbbf170
2004-03-05 15:15:23 -05:00
Lisa Hsu
34576de15a changes that affect post checkpoint runs.
cpu/exec_context.cc:
    you can't delete an element of an array that you newed.  oops.
kern/tru64/tru64_events.cc:
    changes to reflect .ini changes, and also b/c es_intr and ipintr can happen at ANY point, even within a current calling path being tracked.
sim/system.cc:
    can't delete an element of a newed array.  must new them separately.

--HG--
extra : convert_revision : 21573327b7b7f20bf9a3fcfb5854526433e17e17
2004-03-05 08:16:33 -05:00
Lisa Hsu
12662c0b6d nother fix
cpu/exec_context.cc:
    nother little bug...forgot to pop off stack as i read off it
sim/system.cc:
    forgot to pop off stack as i read off it

--HG--
extra : convert_revision : d1f691c0a9f0fa22281c717ee465d8a5f1e45c13
2004-03-05 06:14:33 -05:00
Lisa Hsu
4fa703f2ec serialization for binning. it is WAAAAAAAY past my bedtime.
cpu/exec_context.cc:
sim/system.cc:
sim/system.hh:
    serialization for binning

--HG--
extra : convert_revision : f8417794a3a5ec7f2addc9c2da0f48e851899112
2004-03-05 05:09:05 -05:00
Erik Hallnor
8ad803058f Automerged
--HG--
extra : convert_revision : 7b56535ee32551f27db8d98172159f63e5099835
2004-03-04 15:06:34 -05:00
Erik Hallnor
7c089b2001 Copy implementations
arch/alpha/isa_desc:
    Need to return fault for copy operations.
cpu/exec_context.hh:
    Add temporary storage to pass source address from copy load to copy store
cpu/simple_cpu/simple_cpu.cc:
    Implement copy functions.
cpu/simple_cpu/simple_cpu.hh:
    Return fault

--HG--
extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
2004-03-04 14:57:57 -05:00
Nathan Binkert
31ccbde829 Fix the swichover code. It's only for FULL_SYSTEM
cpu/base_cpu.cc:
    #ifdef FULL_SYSTEM

--HG--
extra : convert_revision : 427ee93d545596da00d6c4688a7e32d584054948
2004-02-29 22:56:42 -05:00
Nathan Binkert
47421b8442 fix switchover WRT interrupts
cpu/base_cpu.cc:
    gah! copy the interrupt status on switchover

--HG--
extra : convert_revision : d3199a7409a494b7687354c43ffca697f37e8456
2004-02-29 20:32:30 -05:00
Nathan Binkert
ee96799519 Initial cleanup pass of lisa's function call tracking
code.

base/statistics.hh:
    We're getting rid of FS_MEASURE, but for now, we're going
    to still use a compile time flag to turn on and off binning
    of statistics.  (The flag is STATS_BINNING)
cpu/exec_context.cc:
cpu/exec_context.hh:
kern/tru64/tru64_system.cc:
    get rid of FS_MEASURE
cpu/simple_cpu/simple_cpu.cc:
    yank the function call tracking code out of the cpu and move
    it into the software context class itself.
kern/tru64/tru64_system.hh:
    get rid of FS_MEASURE
    move all of the tacking stuff to the same place.
sim/system.hh:
    cleanup

--HG--
extra : convert_revision : 73d3843afe1b3ba0d5445421c39c1148d3f4e7c0
2004-02-29 20:22:32 -05:00
Erik Hallnor
cfb6f8fd01 Added copy instructions to the ISA. Well it didn't break anything yet...
arch/alpha/isa_desc:
    Add copy_load and copy_store insts (ldf and stf respectively)
cpu/simple_cpu/simple_cpu.hh:
    Add copy functions to SimpleCPU as well

--HG--
extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d
2004-02-27 02:40:43 -05:00
Erik Hallnor
c3784e37ce Initial copy support in the pipeline. Add copypal counting.
arch/alpha/osfpal.cc:
    Add a string for copypal.
arch/alpha/osfpal.hh:
    Add a code for copypal.
cpu/static_inst.hh:
    Add an IsCopy flag.

--HG--
extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f
2004-02-27 00:45:21 -05:00
Steve Reinhardt
6f5e104fc5 Make SW prefetch flag a parameter again, and add code to make
it actually do something on FullCPU.  Still disabled, as it
causes detailed-boot to hang when you turn it on.

arch/alpha/isa_desc:
    Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst.
cpu/simple_cpu/simple_cpu.hh:
    Changed prefetch() return type from Fault to void.

--HG--
extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7
2004-02-26 07:05:36 -08:00
Lisa Hsu
6a306d4caf add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process).
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    same thing for simple cpu's.

--HG--
extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
2004-02-24 14:59:25 -05:00
Nathan Binkert
695d51e513 make uncacheable stuff happen again
cpu/simple_cpu/simple_cpu.cc:
    Allow requests to be uncacheable

--HG--
extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c
2004-02-20 15:22:41 -05:00
Erik Hallnor
6610699987 Add COW support to the IIC.
cpu/memtest/memtest.cc:
    Move the trace Addr to the end of the printouts

--HG--
extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4
2004-02-17 22:53:15 -05:00
Andrew Schultz
59a6e9d705 Merge
arch/alpha/alpha_memory.cc:
    SCCS merged

--HG--
extra : convert_revision : 0348e29c833684fd593a6c02913319f45f24e76e
2004-02-16 22:04:55 -05:00
Ali Saidi
b82bd8fd78 changed interrupt index to be 64 bits long and fixed a bad include
in adaptec_ctrl.hh

cpu/base_cpu.cc:
    changed index to 64bits
cpu/base_cpu.hh:
    changed index to 64 bits

--HG--
extra : convert_revision : e70d5f09f6066b90fca82cae22bb7d7eb705d65e
2004-02-16 00:21:42 -05:00
Erik Hallnor
7fd91f7c4c Add full copy support.
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
    Add 2 new parameters to control the percentage of unaligned copy sources and destinations.

--HG--
extra : convert_revision : 2646ee2f195e9f3e76bc257b8716163ef63a9f40
2004-02-14 03:25:39 -05:00
Andrew Schultz
6391bfac54 Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/alschult/linux

--HG--
extra : convert_revision : 2ea2bbd41f7e0c257b374d9cd0e37abaf6a7c170
2004-02-13 16:42:42 -05:00
Erik Hallnor
14c11155be Add support for multiple outstanding aligned copies
cpu/memtest/memtest.cc:
    Add traceBlockAddr to trace outputs.

--HG--
extra : convert_revision : e4ebaf9647fb393448367f4f4af3bae566f51c24
2004-02-10 20:37:38 -05:00
Andrew Schultz
eac2d6a668 Merge linux tree with head
arch/alpha/alpha_memory.cc:
dev/alpha_console.cc:
dev/alpha_console.hh:
    Merge

--HG--
extra : convert_revision : 3233648f204338ab3f102ff117754dce955dcc37
2004-02-09 17:50:47 -05:00
Erik Hallnor
4478bcb7c7 Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 0c018b88d6ca80b1690ec99d795014848e375e44
2004-02-09 17:38:41 -05:00
Erik Hallnor
f0abedf769 Add LRU aligned copies to the hierarchy, with only one outstanding copy. Aligned copies now fully work in LRU (just need to write the IIC doCopy call). At the moment they are slow since a stalled copy stalls the entire cache.
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
    Add aligned copy tests, percent of copies is specified by percent_copies

--HG--
extra : convert_revision : eaf1900fcb8832db98249e94e3472ebfb049eb48
2004-02-09 17:37:27 -05:00
Steve Reinhardt
730296f7f9 Results of automatic (yet incomplete) merge.
--HG--
extra : convert_revision : 3ad9a929051bfe111a1e10618c8595acbbade542
2004-02-09 00:30:16 -08:00
Nathan Binkert
4bbe8c1058 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/kernel

--HG--
extra : convert_revision : 9ee9b8550b5761fa400df83caf268bd1c8ddc7ed
2004-02-05 02:53:03 -05:00
Steve Reinhardt
b6ff600bca Add support for "serializing" instructions that flush
execution pipeline (Alpha trapb & excb).

Add support for write memory barriers (mostly impacts
store buffer).

Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.

arch/alpha/isa_desc:
    Implement trapb, excb, mb, and wmb as insts with
    no execution effect (empty execute() function) but
    with flags that indicate their side effects.

    Also make sure every instruction that needs to go to
    the execute stage has a real opClass value, since we
    are now using No_OpClass to signal insts that can get
    dropped at dispatch.

    StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
    Add flags to indicate serializing insts (trapb, excb) and
    memory and write barriers.

    Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
    Make name() return value const.

--HG--
extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c
2004-02-04 21:42:00 -08:00
Steve Reinhardt
98948b2e57 More reformatting of reference parameter declarations.
The last change only caught the ones with types that
started with capitals.  This pass catches the rest
(mostly STL and uint*_t types).

base/cprintf_formats.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/serialize.cc:
sim/serialize.hh:
    Change "foo_t& foo" to "foo_t &foo".

--HG--
extra : convert_revision : fc7f7425db2aef33e490f952b5ce74c8c36d0d41
2004-02-04 11:16:30 -08:00
Nathan Binkert
85bc028185 merge
--HG--
extra : convert_revision : 47425264e672f727cbb13aa7b9bb2a67790b25e8
2004-02-03 11:24:03 -05:00
Steve Reinhardt
3e5070a3f1 Fix bug: forgot branchTarget() method on indirect branches.
arch/alpha/isa_desc:
    Add missing branchTarget() method for indirect branches.
cpu/static_inst.hh:
    Add comment clarifying when branchTarget() can be used
    on indirect branches.

--HG--
extra : convert_revision : 0dcfb36a9792a338cefceb3d1501825abace7ac5
2004-02-03 07:19:05 -08:00
Steve Reinhardt
19cc144960 Get rid of LVQ-port function unit... only used for redundant
multithreading, which has been gone for a long time.

--HG--
extra : convert_revision : 717d13455483c3adc7b7cbbcc5f7493d51867974
2004-02-02 18:58:23 -08:00
Steve Reinhardt
b79f6b3273 insn->inst
--HG--
extra : convert_revision : fcc556fb7e65855ec3c04ef272177c8e7a38fff9
2004-02-02 18:14:11 -08:00
Steve Reinhardt
548b4a1cb0 Change "Foo& foo" declarations to "Foo &foo".
This primarily to be internally consistent (sometimes we used one,
sometimes the other, even within the same line of code!).
I picked the latter to be symmetric with "Foo *foo".

base/cprintf_formats.hh:
base/range.hh:
base/refcnt.hh:
base/res_list.hh:
base/statistics.hh:
base/str.hh:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/syscall_emul.hh:
    Change "Foo& foo" declarations to "Foo &foo".

--HG--
extra : convert_revision : ca1b0e85a578b539214bda3b8d61ac23792f2e87
2004-02-02 15:55:35 -08:00
Steve Reinhardt
956aff1291 More conversions of ref-counted parameters to references:
Statistics::NodePtr, StaticInstPtr, ethernet PacketPtr.

base/statistics.hh:
    Change NodePtr parameters to Nodeptr &.
cpu/exetrace.hh:
    Change StaticInstPtr parameters to StaticInstPtr &.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ethertap.hh:
    change PacketPtr parameters to PacketPtr &.

--HG--
extra : convert_revision : a778efdca33b0ec5beb76cf47db0e9e4728897ee
2004-02-02 15:45:22 -08:00
Steve Reinhardt
7b07b0877f Change MemReqPtr parameters to references.
This avoids incrementing and decrementing the MemReq
reference counters on every call and return.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
    Change MemReqPtr parameters to references.

--HG--
extra : convert_revision : 3ba18bdd9f996563988402576bfdd3430e1ab1e5
2004-02-02 10:47:21 -08:00
Nathan Binkert
4ae64216c3 Merge
--HG--
extra : convert_revision : 8690e31b64235874d74ea4a1123a408610fb115b
2004-01-30 16:01:26 -05:00
Ali Saidi
b6fba57065 our first interrupt
cpu/exetrace.cc:
    added looking for symbols at PC+4 and PC+8 thanks to gcc skiping
    setting the gp where it can and jumping <func>+8
dev/console.cc:
    commented out weird interrupt per nate's suggestion
dev/tsunami_cchip.cc:
    moved rtc flag to correct bit
dev/tsunami_io.cc:
    time interrupt will be 1024Hz and at some point be configurable by
    linux
dev/tsunami_io.hh:
    Timer interrupt will be 1024hz for now and in the future be
    configurable by linux

--HG--
extra : convert_revision : 2fcc924c8848eb3c6166d9d517617ed193a2b89a
2004-01-28 18:12:52 -05:00
Erik Hallnor
01059eaded Change the way the hierarchy is separated. Now all virtual functions are in the interfaces. This allows new bus models to be used without major hassle. And I thought it was time to change it all again anyways.
cpu/simple_cpu/simple_cpu.cc:
    Switch doEvents to doEvents()

--HG--
extra : convert_revision : 14b9517017e76c7b941247004393bf260f397d9a
2004-01-25 05:01:00 -05:00
Ali Saidi
a44248aab0 Added code to print out the symbol if one exists for an address
cpu/exetrace.cc:
    added code to print out symbol if one is found for address
kern/linux/linux_system.cc:
    added code to set the debugSymbolTable to the kernel symbol table

--HG--
extra : convert_revision : 191d7608d04fa42baef5e618c0bbbf5ad4001031
2004-01-12 19:59:02 -05:00
Steve Reinhardt
4f8acd2709 Minor cleanup of trace/output stuff (leftover from EINTR bug fix).
base/cprintf.cc:
    Get rid of unnecessary stream state check.
    Bug is fixed now, and I'm not sure this did much anyway.
cpu/exetrace.cc:
    Get rid of unnecessary flush() call.

--HG--
extra : convert_revision : 107dcdc578b2b0ad1652ee52ea0a33b0f3cd4e39
2003-12-19 08:04:40 -08:00
Steve Reinhardt
1cb7159966 Make memtest compile again.
cpu/memtest/memtest.hh:
    Oops... make memtest compile with new event priorities too.

--HG--
extra : convert_revision : 8143f2e078bb785991d351803fc3a6a50aa31ae5
2003-12-11 08:46:21 -08:00
Steve Reinhardt
7c708c8d1b - Switch events to use a priority enum instead of integers.
This lets us centralize priorities so we can see what's going on.
- Shift serialize & cpu-switch events to happen before CPU ticks (to be
consistent with starting new CPU on same cycle instead of next cycle).
- Get rid of unnecessary bus stats reset callback.

cpu/simple_cpu/simple_cpu.cc:
sim/debug.cc:
sim/eventq.hh:
sim/serialize.cc:
sim/sim_events.cc:
sim/sim_events.hh:
    Switch events to use a priority enum instead of integers.
    This lets us centralize priorities so we can see what's going on.

--HG--
extra : convert_revision : 510d79b43c0a1c97a10eb65916f7335b1de8b956
2003-12-11 08:29:52 -08:00
Steve Reinhardt
4ce6118fda Factor ExecContext::setStatus(), BaseCPU::execCtxStatusChange(),
and SimpleCPU::setStatus() into separate functions.  For example,
setStatus(Active) is now activate().

--HG--
extra : convert_revision : 4392e07caf6c918db0b535f613175109681686fe
2003-12-10 17:47:28 -08:00
Steve Reinhardt
a1dcdeb3d8 Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : c74b502bf44ac300e44c9aa7d6d6e3c55a511893
2003-12-09 14:21:46 -08:00
Steve Reinhardt
5e360051cf Minor tweaks to make a switchover at tick N match
restarting from a checkpoint at tick N.

cpu/simple_cpu/simple_cpu.cc:
    On a CPU switchover, schedule the new CPU's first tick event
    for curTick+1 instead of curTick.

--HG--
extra : convert_revision : f0757d6f028214d36c1cff992db688fd6e8a6fdc
2003-12-09 14:21:38 -08:00
Nathan Binkert
1d7c11af7d Instead of keeping track of the fraction of time that we're
idle, keep track of the fraction of time we're not idle.  This
works better because the default processor state is idle, and
the default stat value is 0.
Keep the stat as idleFraction which is a formula that is equal
to 1 - notIdleFraction

--HG--
extra : convert_revision : 331c2e46f45ae0abda46988567ac2c4f7c42ccad
2003-12-08 14:01:48 -05:00
Nathan Binkert
0ff2457bfa move setStatus into the .cc file
--HG--
extra : convert_revision : 9ccf885274d72ea3151a0db76b580dd51763edab
2003-12-08 13:15:18 -05:00
Steve Reinhardt
37a718e45e Various cleanup. Mostly forcing initialization of some fields...
I noticed that checkpoints dumped from m5.debug and m5.opt had
differences, which is no longer the case (other than addresses
encoded in names).

cpu/full_cpu/smt.hh:
    Get rid of unused SMT_MAX_CPUS.
sim/debug.cc:
    Use AutoDelete for DebugBreakEvent.
sim/serialize.cc:
sim/serialize.hh:
    Move constructor & destructor to header so they can be inlined.

--HG--
extra : convert_revision : bc68c2c9b053b1de0d655ed555734419fafd0b83
2003-12-06 09:57:59 -08:00
Steve Reinhardt
7976794aad Restructuring of LiveProcess etc. to support multiple emulated OS syscall
interfaces, and specific support for Alpha Linux.  Split syscall emulation
functions into several groups, based on whether they depend on the specific
OS and/or architecture (and all combinations of above), including the use of
template functions to support syscalls with slightly different constants
or interface structs.

arch/alpha/alpha_tru64_process.cc:
    Incorporate full Tru64 object definition here, including structure and constant definitions.
    This way we can wrap all of the functions inside the object, and not worry about namespace
    conflicts because no one outside this file will ever see it.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
    Add enums to ObjectFile to indicate the object's architecture and operating system.
cpu/exec_context.cc:
    prog.hh is now process.hh
cpu/exec_context.hh:
    prog.hh is now process.hh
    move architecture-specific syscall arg accessors into ExecContext
cpu/simple_cpu/simple_cpu.cc:
    No need to include prog.hh (which has been renamed)
sim/process.cc:
sim/process.hh:
    LiveProcess is now effectively an abstract base class.
    New LiveProcess::create() function takes an object file and dynamically picks the
    appropriate subclass of LiveProcess to handle the syscall interface that file expects
    (currently Tru64 or Linux).

--HG--
rename : arch/alpha/fake_syscall.cc => arch/alpha/alpha_tru64_process.cc
rename : sim/prog.cc => sim/process.cc
rename : sim/prog.hh => sim/process.hh
extra : convert_revision : 4a03ca7d94a34177cb672931f8aae83a6bad179a
2003-12-01 19:34:38 -08:00
Erik Hallnor
850a6a8eff Merge ehallnor@zizzer:/bk/m5
into zizzer.eecs.umich.edu:/y/ehallnor/work/m5

--HG--
extra : convert_revision : de8422f1e91f1defabe3a021236c813504bd3cab
2003-11-06 18:40:08 -05:00
Erik Hallnor
aead4c315b Various fixes to memory code.
cpu/memtest/memtest.cc:
    Disable probes until the work in all cases
util/rundiff:
    Comment out Algorithm::Diff since its not needed.

--HG--
extra : convert_revision : 40e76ae8926650986a170a0ba6ef331519aceb19
2003-11-06 18:39:26 -05:00
Nathan Binkert
655e9ef3de Little fixes to make more of the stats reset correctly.
base/statistics.cc:
    formatting
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    Make numInsts reset by adding a resetStats function
sim/sim_object.cc:
    Register the reset callback in a slightly cleaner way to avoid
    potential static member constructor ordering issues

--HG--
extra : convert_revision : 408073b4b0397fbf9dfd9c548a313f1c8c3fc031
2003-11-06 00:41:14 -05:00
Nathan Binkert
9471a4d20f Fix stats reset
make SIGUSR2 dump and reset stats
Make resetting time work

base/statistics.cc:
    Fix statistics reset so that it works again, and correctly
    reset bins as well.  (The old code wouldn't reset if you didn't
    have any bins, and then would actually only reset the first
    bin)
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    convert idleCycles/idleFraction into a single Average stat
    to make reset work more simply
sim/main.cc:
    handle SIGUSR2 to dump and reset stats
    (SIGUSR1 only dumps them)
sim/sim_time.cc:
sim/sim_time.hh:
    Add support for resetting the time

--HG--
extra : convert_revision : ea43e03c50c0a4bb826dc0842a8c4fa1a9289e0a
2003-11-05 17:57:41 -05:00
Lisa Hsu
553df008cf Merge zizzer:/bk/m5 into zower.eecs.umich.edu:/z/hsul/bk/clean
--HG--
extra : convert_revision : 0074df284e85bc2ebe6ccc2dbe765fabda9ab041
2003-11-04 15:15:24 -05:00
Lisa Hsu
921b1ee87b Add the ability to track stats in user defined sets of function calls. code can be generated via the base/instrum_codegen.pl script to easily change the functions being tracked. the only thing the user needs to do is add code in tru64System to change how the callerMap is populated.
command line:

m5.* <config file> <args> --server.system:bin=true to track function calls in the server
m5.* <config file> <args> --client.system:bin=true to track function calls in the client

base/statistics.cc:
    make an adjustment to the way stats are printed for FS_MEASURE
base/statistics.hh:
    add a name() virtual function to GenBin.  add a debug printf for activate().
    add amake MainBin the default bin when FS_MEASURE.
cpu/exec_context.cc:
    initialize swCtx to null upon creation of an xc
cpu/exec_context.hh:
    add a SWContext pointer to every execution context.
cpu/simple_cpu/simple_cpu.cc:
    process calls and returns for FS_MEASURE
cpu/simple_cpu/simple_cpu.hh:
    add this so idleCycles will not be accessed before all stats are constructed
kern/tru64/tru64_events.cc:
    add a FnEvent that fires whenever a function we're tracking is called.  implement the process() virtual function for it.
kern/tru64/tru64_events.hh:
    add FnEvent
kern/tru64/tru64_system.cc:
    send bin parameter to System constructor.  add bin parameter to Tru64System object.  initialize all the FnEvent and MainBin members of Tru64system.  also, populate the calling map that indicates whether a function call is on the path we're tracking.
kern/tru64/tru64_system.hh:
    modify the Tru64System class to support FS_MEASURE
sim/system.cc:
    add a bin parameter to System class.  initialize a MainBin to hold the stats for nonPath.
sim/system.hh:
    add a map of to match bins to function names.  add a swCtx map to map pcb addresses to SWContext *s.  Add some supporting functions.

--HG--
extra : convert_revision : af3eadd798cb2d2aed9b54e1059dcedf244dd526
2003-11-04 15:15:12 -05:00
Steve Reinhardt
e4b52476bc Automerge
--HG--
extra : convert_revision : 2ca18ecbf04a1de72391073d0a5309fdbbdfefda
2003-11-03 20:35:05 -08:00
Steve Reinhardt
40b9a3878a Minor changes to instruction trace output.
arch/alpha/isa_desc:
    A few disassembly changes to make it easier to compare with old machine.def traces:
    - Make lds prefetches print f31 instead of r31 as dest.
    - Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
    Left-justify instruction in field, and increase width by 1.

--HG--
extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
2003-11-03 20:26:51 -08:00
Ron Dreslinski
34620649de General fixes for Sampling CPU in full system mode, and serialization of sampling CPU
cpu/intr_control.cc:
    Fix the reference to the cpu, to look up which cpu is being used
    In sampling mode can't use an absolute pointer to the cpu, use the
    exeContexts vector
cpu/intr_control.hh:
    Add two new functions to simplify MP interrupts, fix it for sampling CPU model

--HG--
extra : convert_revision : a69cdbb81e6aefa3fd5385416713c689300bbea8
2003-11-02 19:38:22 -05:00
Andrew Schultz
2ab51fbcdb Changed the naming of Serializeable derived objects. Serializeable no longer has
objName as a member, instead it has the pure virtual function name().  SimObject
now has a objName member, and all classes derived directly from Serializeable
have to implement a name() function (which now makes them unique by pointer value)

cpu/simple_cpu/simple_cpu.cc:
    Change initialization of Event to get rid of Serializeable naming
dev/etherlink.cc:
dev/etherlink.hh:
    Seralizeable derived naming changes
sim/eventq.cc:
    Serializeable derived naming changes, also changed serialization process so it
    doesn't need to use nameChildren
sim/eventq.hh:
    Serializeable derived naming changes, remove constructor for specifying event name
sim/serialize.cc:
    Serializeable derived naming changes, remove setName function and the child naming
    pass for serialization
sim/serialize.hh:
    Serializeable derived naming changes, removed nameChildren, setName
sim/sim_object.cc:
sim/sim_object.hh:
    Serializeable derived naming changes

--HG--
extra : convert_revision : 67bcc275b6c210f7049f98a1ad0d22e8f5596a63
2003-10-31 17:32:04 -05:00
Steve Reinhardt
ec9d41c46a Add some comments explaining ExecContext::Status enum.
cpu/exec_context.hh:
    Add some comments explaining Status enum.

--HG--
extra : convert_revision : 87fdb5d9c09d2a08ab0cff9fa38da2579a550477
2003-10-30 07:08:35 -08:00
Steve Reinhardt
5a1eb9049d Support for Serializable non-SimObject things like events.
Can now serialize & unserialize DmaRequestEvents and DmaTransferEvents.
Also support serialize/unserialize of pointers to SimObjects and
other Serializable objects.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Events get serialized by the event queue only if they're marked
    as AutoSerialize... others are assumed to be serialized by something
    else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
    Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
    Define Checkpoint object to encapsulate everything you need to know
    about a checkpoint.  Use it to allow lookups of named Serializable
    objects (and SimObjects) during unserialization.
    unserialize() now takes a Checkpoint* instead of an IniFile*.

--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
2003-10-29 21:45:39 -08:00
Steve Reinhardt
af5277a678 Serialization support for Alpha TLBs, PhysicalMemory, and SimpleCPU.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
    Serialize TLB contents.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    Complete serialization of SimpleCPU (including owned events).
sim/eventq.cc:
sim/eventq.hh:
    Basic serialization for events.
    Still need to handle dynamic events (not owned by a SimObject).
sim/serialize.cc:
sim/serialize.hh:
    Export serialization filename so PhysicalMemory can
    derive its filename from that.

--HG--
extra : convert_revision : 4db851c5880f73f576ca092d5e5ad4256048eb51
2003-10-29 13:35:07 -08:00
Steve Reinhardt
8da9fcdd75 Flesh out ExecContext serialize/unserialize (including RegFile).
Add support for serializing enums.

arch/alpha/isa_traits.hh:
    Add serialize/unserialize functions for RegFile
    (defined in new isa_traits.cc).
cpu/exec_context.cc:
    Flesh out serialize/unserialize.
sim/serialize.hh:
    Add {UN}SERIALIZE_ENUM().

--HG--
extra : convert_revision : 9e30c7e7b3b290dc8ea0888ba3636fc93ee89052
2003-10-29 08:50:25 -08:00
Steve Reinhardt
1511370d09 More progress on checkpointing... we can now write out a checkpoint and read it back in,
though most objects don't actually serialize any data.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    Change unserialize param from IniFile& to const IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    Change unserialize param from IniFile& to const IniFile*.
    Make unserialize call ExecContext::unserialize.
sim/eventq.cc:
    Rename MainEventQueue (no spaces) for easier parsing in checkpoints.
    Disable event serialization for now, so we can focus on the easy stuff.
sim/serialize.cc:
    Change paramIn and arrayParamIn param from IniFile& to const IniFile*.
sim/serialize.hh:
    Change unserialize, paramIn, and arrayParamIn params from IniFile& to const IniFile*.

--HG--
extra : convert_revision : 6e8853ed375eddec0e140c95a01dd51bd225f7b9
2003-10-29 00:41:24 -08:00
Steve Reinhardt
b90f810575 Revamp serialization to make it easier.
--HG--
extra : convert_revision : c57a538d7cf606dbdf5fa244f92da46bd830e335
2003-10-28 12:55:12 -08:00
Steve Reinhardt
167928f12b Minor serialization tweaks.
cpu/simple_cpu/simple_cpu.cc:
    Serialize FP regs as integers (so we get exact bit representation).
sim/serialize.cc:
    Don't panic on object rename... events come up named "event"
    and need to get renamed.  Also fix some DPRINTFs.

--HG--
extra : convert_revision : 62ad527a7aaf78ae623b70febc1331cf91cbad05
2003-10-26 22:38:53 -08:00
Steve Reinhardt
02d80c96b7 Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().

cpu/simple_cpu/simple_cpu.cc:
    Move some common full-system CPU initialization from the
    SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
    Make 'fault' local to SimpleCPU::tick.
cpu/simple_cpu/simple_cpu.hh:
    Make 'fault' local to SimpleCPU::tick (not an object member).

--HG--
extra : convert_revision : e878dedfff06aac0548aca8b14d66c18b8916895
2003-10-24 23:20:27 -07:00
Steve Reinhardt
91cb532f9f Make FullCPU schedule its TickEvent when one of its contexts becomes active.
This fixes detailed-mpboot, which was broken as of my last change.
Also clean up some of the ExecContext status initialization.

cpu/base_cpu.hh:
    CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
    which execContext had the status change.
    BaseCPU::registerExecContexts() no longer needs to be virtual.
cpu/exec_context.cc:
    Initialize _status directly... don't use setStatus() as this will notify the CPU
    of the change before it is ready.
    CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
    which execContext had the status change.
cpu/exec_context.hh:
    Don't need initStatus() any more.
cpu/simple_cpu/simple_cpu.cc:
    Move execCtxStatusChg() from header to .cc file.
    No longer need specialized version of registerExecContexts to schedule TickEvent.
cpu/simple_cpu/simple_cpu.hh:
    Move execCtxStatusChg() from header to .cc file.
    CPU::execCtxStatusChg() now takes thread_num as arg (must be 0 for SimpleCPU).
    No longer need specialized version of registerExecContexts to schedule TickEvent.
kern/tru64/tru64_system.cc:
    Don't need initRegs; the PC etc. get initialized in the CPU constructor.
    ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
kern/tru64/tru64_system.hh:
    Don't need initRegs; the PC etc. get initialized in the CPU constructor.
sim/prog.cc:
    ExecContexts start out as Unallocated, so no need to set them to Unallocated here.

--HG--
extra : convert_revision : e960ebbeb845960344633798e251b6c8bf1c0378
2003-10-24 23:02:36 -07:00
Steve Reinhardt
cd6b6df581 A few minor fixes to sampling... seems to work now for the base case
of two CPUs and one switch-over event.  Still some stats glitches though.

cpu/simple_cpu/simple_cpu.cc:
    Schedule switched-to CPU right on curTick so we don't lose a cycle.
    Remember to switch out old CPU.

--HG--
extra : convert_revision : f1bf21cac054c74f59770d8b20b30118f46be6f1
2003-10-23 21:52:46 -07:00
Steve Reinhardt
cc9a838f4c Merge stever@zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : b0f93bd35d767fd3a520a9fed70a71d40b0056db
2003-10-23 19:09:18 -07:00
Steve Reinhardt
f5da73b688 Initial support for CPU switching. New SamplingCPU object encompasses a set
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet).  Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time.  Also worked at making behavior and naming
in System and Process objects more consistent.

arch/alpha/ev5.cc:
    Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
    Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
    Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
    Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
    Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
    Support for ExecContext switching.
    CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
    Support for ExecContext switching.
    Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
    Support for ExecContext switching.
    Renamed xcvec array to execContexts to be consistent with Process.

--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
2003-10-23 19:07:52 -07:00
Erik Hallnor
320540829d Move to non-architecture specific MemReq
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/pc_event.hh:
    Move to non architecture specific MemReq

--HG--
extra : convert_revision : 2445943b6f1c8af86b90cfa9c2f9b1eb4a6a1aa2
2003-10-23 16:40:08 -04:00
Steve Reinhardt
df3130d2ed Merge stever@zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : 070e7eadc64a104c9b176f911b0f05ab999deb47
2003-10-21 21:33:34 -07:00
Steve Reinhardt
de29fec658 Don't need to include sim/param.hh in sim_object.hh anymore.
Add explicit include of sim/param.hh to .cc files as needed.

cpu/base_cpu.cc:
cpu/exetrace.cc:
dev/etherint.cc:
sim/system.cc:
    Add include of sim/param.hh.
sim/sim_object.hh:
    Don't need to include sim/param.hh.

--HG--
extra : convert_revision : 8ed13f25c2087680230056ab7abb623e6a7699cf
2003-10-21 21:32:15 -07:00
Erik Hallnor
26ababf2f2 Probe is now in. You currently can't probe uncacheable (of course it doesn't make much sense either.
Also, probe doesn't currently support compressed data, but will as soon as I encapsulate the calls more.

cpu/memtest/memtest.cc:
    Change memtest to not do probes on uncacheables.

--HG--
extra : convert_revision : 28ca4f793562e55da75e8b7fc3852bb5b1328ea9
2003-10-22 00:22:25 -04:00
Erik Hallnor
f3d6ac18e8 Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 1fcdbd9d2efc1e0490716de46c81e94f4b28678b
2003-10-21 01:53:41 -04:00
Erik Hallnor
456b9af0c8 memtest.cc:
Add probe calls to test update probe path.

cpu/memtest/memtest.cc:
    Add probe calls to test update probe path.

--HG--
extra : convert_revision : b0fb97b54b6ffce9c575fda680b778da63767b7c
2003-10-21 01:53:27 -04:00
Nathan Binkert
e0b065ff7c Separate the stuff for SimObject from SimObject builder.
This makes testing a bit easier.

arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
    Need to include builder.hh
    sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
    Separate the SimObjectBuilder stuff into its own file

--HG--
extra : convert_revision : e8395e0cc6ae1f180f9cd6f100795a1ac44aeed5
2003-10-20 20:17:01 -04:00
Erik Hallnor
2c7a0b87f5 simple_cpu.cc:
Add data to static memReq and make everything use it.
Add init of numLoads.

cpu/simple_cpu/simple_cpu.cc:
    Add data to static memReq and make everything use it.
    Add init of numLoads.

--HG--
extra : convert_revision : 47d98aae643c64dff4e5cf1dc770a36434122579
2003-10-20 00:46:02 -04:00
Steve Reinhardt
f951b00d89 Get rid of obsolete code, most of it '#if 0'ed anyway.
Mostly vestiges of Dave's long-gone instruction prefetching stuff.

arch/alpha/isa_traits.hh:
    Delete unused extractInstructionPrefetchTarget().
base/inifile.cc:
    Delete '#if 0' code
cpu/base_cpu.hh:
    Delete unused filterThisInstructionPrefetch() function.
cpu/exetrace.hh:
    Delete '#if 0' code (obsolete flags).

--HG--
extra : convert_revision : c8317f56ba0a0e568daa785825ee938584987bed
2003-10-19 17:30:26 -07:00
Steve Reinhardt
83d32482dc Add comment to elaborate on store-conditional result code (and remove
stale reference to machine.def).

arch/alpha/isa_desc:
    Add comment describing store-conditional result code
cpu/exec_context.hh:
    update comments

--HG--
extra : convert_revision : ac59e0ad7a9440cb6656617fdf05495b59c68f55
2003-10-18 21:21:14 -07:00
Erik Hallnor
4134477369 Add a commited loads event queue similar to the one for commited instructions.
Two new parameters for the CPU models, max_loads_any_thread and max_loads_all_threads.

cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
    Swap out maxReads for the new commited loads model.

--HG--
extra : convert_revision : 35031329bbc476122b2203104537a9f8b46addfa
2003-10-16 17:04:18 -04:00
Nathan Binkert
8dd080032b Global whitespace fixes
Mainly removing whitespace at the end of lines.
This will reduce future diffs/conflicts.
Also adding a space after if, while, and for

This was all accomplished with:
#!/usr/bin/perl -pi~
s/[ 	]+$//;           # there is a space and a tab in the brackets
s/if\(/if (/g;
s/for\(/for (/g;
s/while\(/while (/g;

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/fake_syscall.cc:
arch/alpha/isa_traits.hh:
arch/alpha/vtophys.cc:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/dbl_list.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inifile.cc:
base/intmath.cc:
base/intmath.hh:
base/misc.cc:
base/mod_num.hh:
base/pollevent.cc:
base/random.cc:
base/random.hh:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/coff_sym.h:
base/loader/coff_symconst.h:
base/loader/ecoff_object.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/str.hh:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/intr_control.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
cpu/full_cpu/op_class.hh:
cpu/full_cpu/smt.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherint.cc:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/pcireg.h:
docs/stl.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_object.cc:
sim/sim_time.cc:
sim/sim_time.hh:
sim/system.cc:
test/bitvectest.cc:
test/circletest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/sized_test.cc:
test/stattest.cc:
test/symtest.cc:
util/tap/tap.cc:
util/term/term.c:
    formatting fixes

--HG--
extra : convert_revision : 01e6dbc9615c5d0e923502b8410a416c0434cdf6
2003-10-15 16:39:37 -04:00
Nathan Binkert
638a07d15a Merge
cpu/pc_event.cc:
    SCCS merged

--HG--
extra : convert_revision : f7046f2bf6053be9b00150390fabe3d4f82b0981
2003-10-14 16:53:52 -04:00
Nathan Binkert
4759c203c7 Remove all of the Tru64 specific stuff from the base System object
into its own Tru64System object.  Also remove the System builder
stuff and create a Tru64System builder.  This makes it much
simpler to support more operating systems.

arch/alpha/ev5.cc:
    Each system provides its own mechanism for doing a breakpoint.
base/remote_gdb.hh:
    #include <map>
cpu/pc_event.cc:
cpu/pc_event.hh:
    Separate out System specific PCEvents
cpu/simple_cpu/simple_cpu.cc:
    each system provides its own init script
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
    Stick this in a namespace

--HG--
extra : convert_revision : 9f74527ed2ff8010431d9aff34357aaecc1fb3f6
2003-10-14 12:19:59 -04:00
Steve Reinhardt
af5cdc1d8c Rename CPU object to FullCPU
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
cpu/static_inst.hh:
    CPU -> FullCPU

--HG--
extra : convert_revision : 2bed1ed9372ca9e33f7e391a1aa47bbc02675691
2003-10-13 22:21:19 -07:00
Steve Reinhardt
75e5460579 Rename full_cpu/cpu.cc,hh to full_cpu.cc,hh.
arch/alpha/isa_desc:
    Fix include: cpu.hh renamed to full_cpu.hh
cpu/pc_event.cc:
    Didn't need cpu.hh, just base_cpu.hh.
sim/sim_events.cc:
    Didn't need cpu.hh, just param.hh.

--HG--
extra : convert_revision : 2e3fd36476c639af950ba2113f67e8ea24c22be8
2003-10-13 21:51:34 -07:00
Nathan Binkert
481aaf03cf Small optimization
cpu/pc_event.cc:
cpu/pc_event.hh:
    Do a quick check to see if there is anything to service
    before the function is called

--HG--
extra : convert_revision : 16e9b6284ece8b7a53ccf0ca200fab9ba780c50c
2003-10-13 22:19:43 -04:00
Nathan Binkert
f94ff9ace5 Split up kernel.cc into separate files for dump_mbuf and printf
cpu/exec_context.hh:
dev/alpha_console.cc:
sim/system.cc:
sim/system.hh:
    Convert from fixed array to a vector
arch/alpha/arguments.hh:
    now that CopyData and CopyString are in vtophys.hh, this
    include is not necessary
arch/alpha/vtophys.hh:
    Include isa_traits.hh for Addr
cpu/pc_event.cc:
    Temporarily get this working while we're changing things

--HG--
extra : convert_revision : 9a7597b7bd5d050819766f8edf7a02f28447b9ca
2003-10-13 17:24:27 -04:00
Nathan Binkert
60a7bd950b CopyData and CopyString moved from kernel.cc to vtophys.cc
kernel.cc and kernel.hh moved to kern/tru64

--HG--
extra : convert_revision : 1b9123af03960b602a2d52dfa7b714280f9995aa
2003-10-13 16:09:33 -04:00
Steve Reinhardt
25693e9e69 Make include paths explicit and update makefile accordingly.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/fake_syscall.cc:
arch/alpha/faults.cc:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/circlebuf.cc:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/fast_alloc.cc:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/pollevent.cc:
base/pollevent.hh:
base/random.cc:
base/random.hh:
base/range.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/prog.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/sim_time.cc:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/tap/tap.cc:
    Make include paths explicit.

--HG--
extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
2003-10-10 11:09:00 -07:00
Steve Reinhardt
52b31ea0a6 File moves for the reorg. Tree is in broken state until I commit the makefile and
#include changes.

--HG--
rename : sim/cache/lzss_compression.cc => base/compression/lzss_compression.cc
rename : sim/cache/lzss_compression.hh => base/compression/lzss_compression.hh
rename : sim/cache/null_compression.hh => base/compression/null_compression.hh
rename : sim/hybrid_pred.cc => base/hybrid_pred.cc
rename : sim/hybrid_pred.hh => base/hybrid_pred.hh
rename : base/aout_object.cc => base/loader/aout_object.cc
rename : base/aout_object.hh => base/loader/aout_object.hh
rename : base/coff_sym.h => base/loader/coff_sym.h
rename : base/coff_symconst.h => base/loader/coff_symconst.h
rename : base/ecoff_object.cc => base/loader/ecoff_object.cc
rename : base/ecoff_object.hh => base/loader/ecoff_object.hh
rename : base/elf_object.cc => base/loader/elf_object.cc
rename : base/elf_object.hh => base/loader/elf_object.hh
rename : base/exec_aout.h => base/loader/exec_aout.h
rename : base/exec_ecoff.h => base/loader/exec_ecoff.h
rename : base/object_file.cc => base/loader/object_file.cc
rename : base/object_file.hh => base/loader/object_file.hh
rename : base/symtab.cc => base/loader/symtab.cc
rename : base/symtab.hh => base/loader/symtab.hh
rename : sim/predictor.hh => base/predictor.hh
rename : sim/sat_counter.cc => base/sat_counter.cc
rename : sim/sat_counter.hh => base/sat_counter.hh
rename : sim/base_cpu.cc => cpu/base_cpu.cc
rename : sim/base_cpu.hh => cpu/base_cpu.hh
rename : sim/exec_context.cc => cpu/exec_context.cc
rename : sim/exec_context.hh => cpu/exec_context.hh
rename : sim/exetrace.cc => cpu/exetrace.cc
rename : sim/exetrace.hh => cpu/exetrace.hh
rename : sim/op_class.hh => cpu/full_cpu/op_class.hh
rename : sim/smt.hh => cpu/full_cpu/smt.hh
rename : sim/inst_seq.hh => cpu/inst_seq.hh
rename : sim/intr_control.cc => cpu/intr_control.cc
rename : sim/intr_control.hh => cpu/intr_control.hh
rename : sim/memtest.cc => cpu/memtest/memtest.cc
rename : sim/memtest.hh => cpu/memtest/memtest.hh
rename : sim/pc_event.cc => cpu/pc_event.cc
rename : sim/pc_event.hh => cpu/pc_event.hh
rename : sim/simple_cpu.cc => cpu/simple_cpu/simple_cpu.cc
rename : sim/simple_cpu.hh => cpu/simple_cpu/simple_cpu.hh
rename : sim/static_inst.cc => cpu/static_inst.cc
rename : sim/static_inst.hh => cpu/static_inst.hh
extra : convert_revision : 05bd41acb2a424f1a38609fd4ac6df681bb479d6
2003-10-10 09:57:26 -07:00