Gabe Black
|
943b77b9bb
|
ARM: Decode the VLDR instruction.
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2010-06-02 12:58:12 -05:00 |
|
|
Gabe Black
|
dbec303864
|
ARM: Decode all the various forms of vmov.
|
2010-06-02 12:58:12 -05:00 |
|
|
Gabe Black
|
6365d29c21
|
ARM: Decode the VMRS instruction.
|
2010-06-02 12:58:11 -05:00 |
|
|
Gabe Black
|
a8b56b452c
|
ARM: Decode the VMSR instruction.
|
2010-06-02 12:58:11 -05:00 |
|
|
Gabe Black
|
0ff71c7c34
|
ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) registers.
|
2010-06-02 12:58:11 -05:00 |
|
|
Gabe Black
|
3f83094af2
|
ARM: Decode the VFP load/store multiple instructions.
|
2010-06-02 12:58:04 -05:00 |
|
|
Gabe Black
|
48525f581c
|
ARM: Split the condition codes out of the CPSR.
This allows those bits to be renamed while allowing the other fields to
control the behavior of the processor.
|
2009-11-08 02:08:40 -08:00 |
|
|
Gabe Black
|
2a39570b78
|
ARM: Remove the currently unecessary FPAOp class.
|
2009-06-21 17:14:51 -07:00 |
|
|
Gabe Black
|
c20ce20e4c
|
ARM: Make the isa parser aware that CPSR is being used.
|
2009-06-21 09:37:41 -07:00 |
|
|
Gabe Black
|
71e0d1ded2
|
ARM: Pull some static code out of the isa desc and create miscregs.hh.
|
2009-06-21 09:21:07 -07:00 |
|
Stephen Hines
|
7a7c4c5fca
|
arm: add ARM support to M5
|
2009-04-05 18:53:15 -07:00 |
|