Commit graph

21 commits

Author SHA1 Message Date
Ali Saidi
5f187e592e Devices: More fixes to Intel NIC Model.
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extra : convert_revision : 14306d3cd79bbef7decdf2fd370ed7e7f2b10a93
2007-09-12 15:24:23 -04:00
Gabe Black
7227ab5f22 Merge with head
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extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-26 21:45:40 -07:00
Ali Saidi
773cb77656 Devices: Make EtherInts connect in the same way memory ports currently do.
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extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
2007-08-16 16:49:02 -04:00
Nathan Binkert
f0fef8f850 Merge python and x86 changes with cache branch
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extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-26 23:15:49 -07:00
Nathan Binkert
abc76f20cb Major changes to how SimObjects are created and initialized. Almost all
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

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extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23 21:51:38 -07:00
Steve Reinhardt
6ab53415ef Get rid of Packet result field. Error responses are
now encoded in cmd field.

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extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-06-30 10:16:18 -07:00
Ali Saidi
57104ea5f9 couple more bug fixes for intel nic
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
    couple more bug fixes

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extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
2007-05-14 16:37:00 -04:00
Ali Saidi
69ea50c163 couple of updates in the intel nic
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extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
2007-05-09 22:39:43 -04:00
Ali Saidi
9dfbea68a2 update for new reschedule semantics
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extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09 22:34:54 -04:00
Ali Saidi
3c608bf765 add a backoff algorithm when nacks are received by devices
add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge

src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
    add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
    add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
    add seperate response buffers and request queue sizes
    add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
    assert on the
src/mem/tport.cc:
    add a friendly assert to make sure the packet was inserted into the list

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extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2007-05-09 18:20:24 -04:00
Ali Saidi
7baf29c9d0 fix igbe bug
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extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
2007-04-30 13:18:44 -04:00
Ali Saidi
528694817f make serialization at least seem to work
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extra : convert_revision : cbfdb64f9a204670b8dd0294c74a17044b9f330c
2007-03-29 22:00:01 -04:00
Ali Saidi
e95bc9d8f9 some more fixes... non-tso stuff seems to work
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extra : convert_revision : da604d20443376d04826397d0aaff0bdd744053b
2007-03-27 20:44:21 -04:00
Ali Saidi
e8dc1723ee first bit of life from the intel gigabit model
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extra : convert_revision : d8944a53f6b585df21651c4e624518d5c49a7837
2007-03-26 18:40:18 -04:00
Ali Saidi
12b7ebcbca finish up the coding of the Intel Gb NIC... Many Many bugs to squash
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
    finish coding the Intel Gb NIC device
src/dev/io_device.hh:
    we really don't want to be able to pass a null buffer to dma read, at least not the way we have things setup now... it won't work at all

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extra : convert_revision : 6739497232317ec407cfa7a96de4575a9a6cfc46
2007-03-22 18:39:41 -04:00
Ali Saidi
3a5a20769b add all the registers we'll need to support for the Intel GbE device and support enough functionality make the driver think
the device is there, and in good working order.

src/dev/SConscript:
    add intel gbe to the dev SCons file
src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
src/dev/i8254xGBe_defs.hh:
    use new manner of registers and implement all device registers that are touched through boot and ifup

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extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
2007-03-15 15:16:23 -04:00
Ali Saidi
baaadb0d43 add packet_access.hh
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extra : convert_revision : 7fe4958549101fca9613baa4a317d96f4970d432
2006-10-27 09:10:50 -04:00
Ali Saidi
7be58fd5f4 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem.head

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extra : convert_revision : c0f9bde20585b3811ff906728b003072b69696b5
2006-10-20 13:00:15 -04:00
Ali Saidi
32384b2f6b still working on getting past initialization
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extra : convert_revision : 7a5fccb9a19d363e479ef24012a7b8598272eaa9
2006-10-20 13:00:05 -04:00
Nathan Binkert
a4c6f0d69e Use PacketPtr everywhere
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extra : convert_revision : d9eb83ab77ffd2d725961f295b1733137e187711
2006-10-20 00:10:12 -07:00
Ali Saidi
17b0e9714d add boiler plate intel nic code
src/SConscript:
    add intel nic to sconscript
src/dev/pcidev.cc:
    fix bug with subsystemid value
src/python/m5/objects/Ethernet.py:
    add intel nic to ethernet.py
src/python/m5/objects/Ide.py:
src/python/m5/objects/Pci.py:
    Move config_latency into pci where it belogs

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extra : convert_revision : 7163aaf7b4098496518b0910cef62f2ce3dd574d
2006-09-18 20:12:45 -04:00