Nathan Binkert
7a58b5a38a
Add missing dependencies on .i files
2008-06-14 12:10:50 -07:00
Nathan Binkert
2d037682ff
scons: proper fix for hg version stuff
2008-06-14 10:30:18 -07:00
Nathan Binkert
fe4fd9f414
scons: fix program_info.cc generation
2008-06-13 17:34:22 -07:00
Steve Reinhardt
dace77dc4a
Automated merge with ssh://m5sim.org//repo/m5
2008-06-13 01:59:10 -04:00
Steve Reinhardt
caccbd1edc
Get rid of bogus bus assertion.
...
It runs out that if a MemObject turns around and does a send in its
receive callback, and there are other sends already scheduled, then
it could observe a state where it's not at the head of the list but
the bus's sendEvent is not scheduled (because we're still in the
middle of processing the prior sendEvent).
2008-06-13 01:33:49 -04:00
Steve Reinhardt
024ec4c5c3
Get rid of bogus cache assertion.
...
I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.
2008-06-13 01:29:20 -04:00
Ali Saidi
907b28cc62
HG: Add compiled hg revision and date to the standard M5 output.
2008-06-13 01:09:04 -04:00
Gabe Black
2b4874449c
Alpha: Get rid of an old include of a non-existant file.
2008-06-12 01:54:21 -04:00
Gabe Black
7be8e671f1
Params: Allow nested namespaces in cxx_namespace
2008-06-12 01:00:29 -04:00
Gabe Black
5b5875341c
X86: Make the cpuid processor identifier return a real string.
2008-06-12 01:00:19 -04:00
Gabe Black
c625cf0ae1
X86: Make the code compile as 32 bit.
2008-06-12 01:00:05 -04:00
Gabe Black
23c04b8c66
Params: Remove an unnecessary include.
2008-06-12 00:59:58 -04:00
Gabe Black
bceaa257a3
X86: Make the e820 table manually or automatically configurable from python.
2008-06-12 00:58:36 -04:00
Gabe Black
4f4ff17578
X86: Make the disassembly for halt conform with the other microops.
2008-06-12 00:58:27 -04:00
Gabe Black
31d40ad7c2
X86: Implement and hook up STI and CLI instructions.
2008-06-12 00:58:19 -04:00
Gabe Black
da20c0ec54
X86: Make sure there's something to catch when the kernel messes with ports "behind" the pci config magic ports.
2008-06-12 00:58:13 -04:00
Gabe Black
1f5b992b58
X86: Make the platform object initialize channel 0 of the PIT.
2008-06-12 00:56:54 -04:00
Gabe Black
16e26fbf03
X86: Hook the speaker device to the pit device.
2008-06-12 00:56:17 -04:00
Gabe Black
da7f512067
Timer: Fill out the periodic modes a little.
2008-06-12 00:56:07 -04:00
Gabe Black
4f9a0402f6
Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.
2008-06-12 00:54:48 -04:00
Gabe Black
0368ccdeda
BitUnion: Take out namespace declaration so bitunions can be declared inside classes.
2008-06-12 00:54:32 -04:00
Gabe Black
81936ae2ed
X86: Add an event for the apic timer timeout. It doesn't get used yet.
2008-06-12 00:54:19 -04:00
Gabe Black
6b8d0363ee
X86: Rename the divide count register to divide configuration.
2008-06-12 00:54:12 -04:00
Gabe Black
b10742ee2b
X86: Make the apic isr and irr work.
2008-06-12 00:54:05 -04:00
Gabe Black
69000baef3
X86: Make the apic task priority register work.
2008-06-12 00:54:01 -04:00
Gabe Black
e9c481ea4a
X86: Make the logical destination and destination format work.
2008-06-12 00:53:50 -04:00
Gabe Black
ed23a4970b
X86: Make the apic ID register work.
2008-06-12 00:53:43 -04:00
Gabe Black
8a6723e038
X86: Make the apic version register work.
2008-06-12 00:53:37 -04:00
Gabe Black
8d2416c6e9
X86: Implement a partial, sort of correct version of the protected mode variant of iret.
2008-06-12 00:53:01 -04:00
Gabe Black
66f54a6037
X86: Change how segment loading is performed.
2008-06-12 00:52:12 -04:00
Gabe Black
129831c116
X86: Make pushes and pops use the stack size instead of the data size.
2008-06-12 00:51:57 -04:00
Gabe Black
b05299253f
X86: In non 64bit mode, throw a fault when a NULL segment is accessed.
2008-06-12 00:51:50 -04:00
Gabe Black
a8384311d5
X86: Take advantage of the new meta register.
2008-06-12 00:51:14 -04:00
Gabe Black
d4e7c7edd3
X86: Keep handy values like the operating mode in one register.
2008-06-12 00:50:25 -04:00
Gabe Black
fa7c81c6df
X86: Change what the microop chks does.
...
Instead of computing the segment descriptor address, this now checks if a
selector value/descriptor are legal for a particular purpose.
2008-06-12 00:50:10 -04:00
Gabe Black
6bd9cf3594
X86: Add a microop to read a segments attribute register.
2008-06-12 00:50:05 -04:00
Gabe Black
e0c20386ac
X86: Add microops and supporting code to manipulate the whole rflags register.
2008-06-12 00:49:50 -04:00
Gabe Black
2bb8933f78
X86: Add microops which panic, fatal, warn, and warn_once.
2008-06-12 00:49:25 -04:00
Gabe Black
bbc1f394ff
X86: Truncate descriptors to 16 bits.
2008-06-12 00:49:16 -04:00
Gabe Black
6106b05b6e
X86: Redo BSF.
2008-06-12 00:48:58 -04:00
Gabe Black
dfc2d44ea3
X86: Flesh out 3dnow instruction decoding a bit and grab the byte immediate.
2008-06-12 00:48:46 -04:00
Gabe Black
de6eeaaa27
X86: Make string instructions work when rcx=0.
2008-06-12 00:48:15 -04:00
Gabe Black
8688ef3fe5
X86: Have all 8 machine check registers since the kernel assumes they're there.
2008-06-12 00:48:02 -04:00
Gabe Black
a8e3001df8
X86: Bypass unaligned access support for register addressed MSRs.
2008-06-12 00:47:25 -04:00
Gabe Black
b3e55339f9
X86: Remove enforcement of APIC register access alignment. Panic if more than one register is accessed at a time.
2008-06-12 00:46:22 -04:00
Gabe Black
8e2991b529
X86: Fix the implementation of BSF.
2008-06-12 00:46:04 -04:00
Gabe Black
16e189fad2
X86: Bit scan forward/reverse were accidentally transposed.
2008-06-12 00:45:52 -04:00
Gabe Black
254cc07650
X86: Fix a byte register indexing issue in the sign extending move from memory microcode.
2008-06-12 00:45:22 -04:00
Gabe Black
8501a90f59
X86: Add in some support for the tsc register.
2008-06-12 00:39:10 -04:00
Gabe Black
d093fcb079
CPU: Make the simple cpu trace data for loads/stores.
2008-06-12 00:35:50 -04:00
