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X86: Rename the divide count register to divide configuration.

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This commit is contained in:
Gabe Black 2008-06-12 00:54:12 -04:00
parent b10742ee2b
commit 6b8d0363ee
3 changed files with 5 additions and 8 deletions
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7
src/arch/x86/miscregfile.cc
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@ -158,9 +158,6 @@ MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
case MISCREG_APIC_CURRENT_COUNT:
panic("Local APIC Current Count register unimplemented.\n");
break;
case MISCREG_APIC_DIVIDE_COUNT:
panic("Local APIC Divide Count register unimplemented.\n");
break;
}
}
switch (miscReg) {
@ -270,8 +267,8 @@ void MiscRegFile::setReg(int miscReg,
case MISCREG_APIC_CURRENT_COUNT:
panic("Local APIC Current Count register unimplemented.\n");
break;
case MISCREG_APIC_DIVIDE_COUNT:
panic("Local APIC Divide Count register unimplemented.\n");
case MISCREG_APIC_DIVIDE_CONFIGURATION:
newVal = val & 0xB;
break;
}
setRegNoEffect(miscReg, newVal);

4
src/arch/x86/miscregs.hh
View file

@ -397,8 +397,8 @@ namespace X86ISA
MISCREG_APIC_LVT_ERROR,
MISCREG_APIC_INITIAL_COUNT,
MISCREG_APIC_CURRENT_COUNT,
MISCREG_APIC_DIVIDE_COUNT,
MISCREG_APIC_END = MISCREG_APIC_DIVIDE_COUNT,
MISCREG_APIC_DIVIDE_CONFIGURATION,
MISCREG_APIC_END = MISCREG_APIC_DIVIDE_CONFIGURATION,
MISCREG_APIC_INTERNAL_STATE,

2
src/arch/x86/tlb.cc
View file

@ -780,7 +780,7 @@ TLB::translate(RequestPtr &req, ThreadContext *tc, bool write, bool execute)
regNum = MISCREG_APIC_CURRENT_COUNT;
break;
case 0x3E0:
regNum = MISCREG_APIC_DIVIDE_COUNT;
regNum = MISCREG_APIC_DIVIDE_CONFIGURATION;
break;
default:
// A reserved register field.