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Author SHA1 Message Date
Gabe Black
c382bdf93d Use a computed mask to mask out the fetch address and not a hard coded one. 
--HG--
extra : convert_revision : c22907bed4b83f0dff51d2283dafe4f76fa9e94a
 2007-04-11 14:16:54 +00:00
Gabe Black
54abc8b337 Make the itlb set the PHYSICAL flag on a request when it translates it. This gets it out of the cpu. 
--HG--
extra : convert_revision : 20611263b799b5e835116adbf39d2ecc78701eef
 2007-04-11 14:02:03 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message. 
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
 2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
 2007-04-11 12:25:00 +00:00
Gabe Black
fcc35a67e0 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
 2007-04-10 17:27:33 +00:00
Gabe Black
74122c04cf Even if you don't want to fetch more bytes, make sure you handle a fault. 
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
 2007-04-10 17:27:12 +00:00
Gabe Black
798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black
d6f81e02b4 Updated for the new instruction stubs. 
--HG--
extra : convert_revision : c85799c9093d8e9efba0744c8768196879974b74
 2007-04-10 17:23:47 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions. 
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
 2007-04-10 17:22:45 +00:00
Gabe Black
321ca32152 Added stub implementations of the x86 instructions categorized like they are in the AMD64 manuals' instruction summary in volume 1. 
--HG--
extra : convert_revision : 47b1d9aa0c88f6832f14ab68df174263d0d1eda9
 2007-04-10 17:18:59 +00:00
Gabe Black
7d53e54019 A new microop which generates a specified fault. 
--HG--
extra : convert_revision : c5c59f82553ffae273c95ea777e21e85648a4f98
 2007-04-10 17:16:22 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit. 
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
 2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. 
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
 2007-04-10 17:13:26 +00:00
Gabe Black
f71a6c8fed Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 247fc298ba8ea1ea38ee2e906aa84bb5bc3f4592
 2007-04-10 01:53:04 +00:00
Gabe Black
5476247623 Fixed a compile error. 
--HG--
extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
 2007-04-10 01:52:38 +00:00
Ali Saidi
438b951a5b add code to whack the intel gbe model from the relase.... it's not tested and it's configuration is a hack 
--HG--
extra : convert_revision : b65cd6d9b45a67ba64ea398cf0c0ce28f91c7e27
 2007-04-09 18:49:02 -04:00
Gabe Black
d54b8b73ed Comment out the remote gdb object for SE mode. 
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
 2007-04-09 18:30:50 +00:00
Kevin Lim
64b4572c3e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
 2007-04-09 14:30:49 -04:00
Kevin Lim
0cc343d41d Fix bug when blocking due to no free registers. 
--HG--
extra : convert_revision : a1a218d3294515184689041487057495223360b7
 2007-04-09 14:29:59 -04:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
 2007-04-09 07:59:57 +00:00
Gabe Black
97e8111b46 Added SPARC o3 insttest regression. 
--HG--
extra : convert_revision : b008b4bda60ced329df9b700ff9b0a978e2d3b19
 2007-04-09 03:59:56 -04:00
Gabe Black
7e1807acfb Added SPARC simple timing regression for insttest 
--HG--
extra : convert_revision : cb490fd6f1be73b57dceb93edf83d7edc4a67beb
 2007-04-09 03:52:15 -04:00
Gabe Black
d9da10199e Make SPARC build o3 by default. 
--HG--
extra : convert_revision : 7be49f9d395094d849d8da59b0fd4efe962fb201
 2007-04-09 03:40:21 -04:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here. 
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
 2007-04-09 01:08:05 +00:00
Gabe Black
c7bb106886 Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts. 
--HG--
extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
 2007-04-08 23:31:11 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
 2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
 2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa 
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
 2007-04-06 16:55:56 +00:00
Gabe Black
a3ed19f82a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
 2007-04-06 16:39:47 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. 
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
 2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function 
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
 2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code. 
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
 2007-04-06 15:15:36 +00:00
Gabe Black
3c9768e644 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
 2007-04-06 14:37:46 +00:00
Gabe Black
077183f7ec Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : efdbf9787383dc1df544b7276f8120285e69bf69
 2007-04-05 11:35:31 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution. 
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
 2007-04-04 23:19:32 +00:00
Gabe Black
a664017c2a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 81269f094834f43b4e908321bfce2e031b39d2a4
 2007-04-04 20:50:49 +00:00
Kevin Lim
3d2a434e42 Updates for other ISA cpu_builders. 
--HG--
extra : convert_revision : b02736c627bb9dcf87463a9133e04369b9f8fae2
 2007-04-04 16:50:48 -04:00
Kevin Lim
b247e02f6e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 7181d8c2ee673322372484cf288a94ebd91b5265
 2007-04-04 15:39:13 -04:00
Kevin Lim
6ff6621f20 Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 
src/cpu/o3/alpha/cpu_impl.hh:
    Pass ISA-specific O3 CPU to FullO3CPU as a constructor parameter instead of using setCPU functions.

--HG--
extra : convert_revision : 74f4b1f5fb6f95a56081f367cce7ff44acb5688a
 2007-04-04 15:38:59 -04:00
Ali Saidi
d9ab45d066 Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : be37463ea3ca38ef02ae0b82da0752f240a530d0
 2007-04-04 13:57:23 -04:00
Ali Saidi
d0ea8ff088 The MemoryObject tha owns a port should delete it if it so chooses when deletePortRefs() is called on it with that port as a parameter. 
In this way a MemoryObject can keep a functional port around and give it to anyone who wants to do functional accesses rather
than creating a new one each time.

src/mem/bus.cc:
src/mem/bus.hh:
src/mem/cache/cache_impl.hh:
    only keep around one func port we give to anyone who wants it. Otherwise we can run out of port ids reasonably quickly if
    a lot of functional accesses are happening (e.g. remote debugging, dprintk, etc)

--HG--
extra : convert_revision : 6a9e3e96f51cedaab6de1b36cf317203899a3716
 2007-04-04 13:56:38 -04:00
Gabe Black
4285990a96 Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: 
MicroOp: A single operation actually implemented in hardware.
MacroOp: A collection of microops which are executed as a unit.
Instruction: An architected instruction which can be implemented with a macroop or a microop.

--HG--
extra : convert_revision : 1cfc8409cc686c75220767839f55a30551aa6f13
 2007-04-04 14:31:59 +00:00
Gabe Black
7f5409f2ba Make "Name" really be the same as "name" with only the first letter capitalized. Before, it had the first letter capitalized but all the others lower case 
--HG--
extra : convert_revision : bcbb28f2bf268765c1d37075a4417a4a6c1b9588
 2007-04-04 14:28:43 +00:00
Gabe Black
65fedeb5a7 Made x86 ExtMachInsts distinguishable from each other by defining a real == and a real hash function. 
--HG--
extra : convert_revision : 30f29a36f6ab44e67e62aaf81b685fbe1267c746
 2007-04-04 14:27:00 +00:00
Gabe Black
6010c6ded4 Added all the different variations of the register names. 
--HG--
extra : convert_revision : ff06bdca556a5e1a0dfe7978575c2277c30c002a
 2007-04-04 14:25:36 +00:00
Kevin Lim
9e1f3bc11a Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : 4a8cbb65b19636c31b5c6fd5f24c90f8f2148ed1
 2007-04-04 00:14:44 -04:00