cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
Add 2 new parameters to control the percentage of unaligned copy sources and destinations.
--HG--
extra : convert_revision : 2646ee2f195e9f3e76bc257b8716163ef63a9f40
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
Add aligned copy tests, percent of copies is specified by percent_copies
--HG--
extra : convert_revision : eaf1900fcb8832db98249e94e3472ebfb049eb48
execution pipeline (Alpha trapb & excb).
Add support for write memory barriers (mostly impacts
store buffer).
Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.
arch/alpha/isa_desc:
Implement trapb, excb, mb, and wmb as insts with
no execution effect (empty execute() function) but
with flags that indicate their side effects.
Also make sure every instruction that needs to go to
the execute stage has a real opClass value, since we
are now using No_OpClass to signal insts that can get
dropped at dispatch.
StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
Add flags to indicate serializing insts (trapb, excb) and
memory and write barriers.
Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
Make name() return value const.
--HG--
extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c
The last change only caught the ones with types that
started with capitals. This pass catches the rest
(mostly STL and uint*_t types).
base/cprintf_formats.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/serialize.cc:
sim/serialize.hh:
Change "foo_t& foo" to "foo_t &foo".
--HG--
extra : convert_revision : fc7f7425db2aef33e490f952b5ce74c8c36d0d41
arch/alpha/isa_desc:
Add missing branchTarget() method for indirect branches.
cpu/static_inst.hh:
Add comment clarifying when branchTarget() can be used
on indirect branches.
--HG--
extra : convert_revision : 0dcfb36a9792a338cefceb3d1501825abace7ac5
This primarily to be internally consistent (sometimes we used one,
sometimes the other, even within the same line of code!).
I picked the latter to be symmetric with "Foo *foo".
base/cprintf_formats.hh:
base/range.hh:
base/refcnt.hh:
base/res_list.hh:
base/statistics.hh:
base/str.hh:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/syscall_emul.hh:
Change "Foo& foo" declarations to "Foo &foo".
--HG--
extra : convert_revision : ca1b0e85a578b539214bda3b8d61ac23792f2e87
This avoids incrementing and decrementing the MemReq
reference counters on every call and return.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
Change MemReqPtr parameters to references.
--HG--
extra : convert_revision : 3ba18bdd9f996563988402576bfdd3430e1ab1e5
base/cprintf.cc:
Get rid of unnecessary stream state check.
Bug is fixed now, and I'm not sure this did much anyway.
cpu/exetrace.cc:
Get rid of unnecessary flush() call.
--HG--
extra : convert_revision : 107dcdc578b2b0ad1652ee52ea0a33b0f3cd4e39
cpu/memtest/memtest.hh:
Oops... make memtest compile with new event priorities too.
--HG--
extra : convert_revision : 8143f2e078bb785991d351803fc3a6a50aa31ae5
This lets us centralize priorities so we can see what's going on.
- Shift serialize & cpu-switch events to happen before CPU ticks (to be
consistent with starting new CPU on same cycle instead of next cycle).
- Get rid of unnecessary bus stats reset callback.
cpu/simple_cpu/simple_cpu.cc:
sim/debug.cc:
sim/eventq.hh:
sim/serialize.cc:
sim/sim_events.cc:
sim/sim_events.hh:
Switch events to use a priority enum instead of integers.
This lets us centralize priorities so we can see what's going on.
--HG--
extra : convert_revision : 510d79b43c0a1c97a10eb65916f7335b1de8b956
and SimpleCPU::setStatus() into separate functions. For example,
setStatus(Active) is now activate().
--HG--
extra : convert_revision : 4392e07caf6c918db0b535f613175109681686fe
restarting from a checkpoint at tick N.
cpu/simple_cpu/simple_cpu.cc:
On a CPU switchover, schedule the new CPU's first tick event
for curTick+1 instead of curTick.
--HG--
extra : convert_revision : f0757d6f028214d36c1cff992db688fd6e8a6fdc
idle, keep track of the fraction of time we're not idle. This
works better because the default processor state is idle, and
the default stat value is 0.
Keep the stat as idleFraction which is a formula that is equal
to 1 - notIdleFraction
--HG--
extra : convert_revision : 331c2e46f45ae0abda46988567ac2c4f7c42ccad
I noticed that checkpoints dumped from m5.debug and m5.opt had
differences, which is no longer the case (other than addresses
encoded in names).
cpu/full_cpu/smt.hh:
Get rid of unused SMT_MAX_CPUS.
sim/debug.cc:
Use AutoDelete for DebugBreakEvent.
sim/serialize.cc:
sim/serialize.hh:
Move constructor & destructor to header so they can be inlined.
--HG--
extra : convert_revision : bc68c2c9b053b1de0d655ed555734419fafd0b83
interfaces, and specific support for Alpha Linux. Split syscall emulation
functions into several groups, based on whether they depend on the specific
OS and/or architecture (and all combinations of above), including the use of
template functions to support syscalls with slightly different constants
or interface structs.
arch/alpha/alpha_tru64_process.cc:
Incorporate full Tru64 object definition here, including structure and constant definitions.
This way we can wrap all of the functions inside the object, and not worry about namespace
conflicts because no one outside this file will ever see it.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
Add enums to ObjectFile to indicate the object's architecture and operating system.
cpu/exec_context.cc:
prog.hh is now process.hh
cpu/exec_context.hh:
prog.hh is now process.hh
move architecture-specific syscall arg accessors into ExecContext
cpu/simple_cpu/simple_cpu.cc:
No need to include prog.hh (which has been renamed)
sim/process.cc:
sim/process.hh:
LiveProcess is now effectively an abstract base class.
New LiveProcess::create() function takes an object file and dynamically picks the
appropriate subclass of LiveProcess to handle the syscall interface that file expects
(currently Tru64 or Linux).
--HG--
rename : arch/alpha/fake_syscall.cc => arch/alpha/alpha_tru64_process.cc
rename : sim/prog.cc => sim/process.cc
rename : sim/prog.hh => sim/process.hh
extra : convert_revision : 4a03ca7d94a34177cb672931f8aae83a6bad179a
cpu/memtest/memtest.cc:
Disable probes until the work in all cases
util/rundiff:
Comment out Algorithm::Diff since its not needed.
--HG--
extra : convert_revision : 40e76ae8926650986a170a0ba6ef331519aceb19
base/statistics.cc:
formatting
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Make numInsts reset by adding a resetStats function
sim/sim_object.cc:
Register the reset callback in a slightly cleaner way to avoid
potential static member constructor ordering issues
--HG--
extra : convert_revision : 408073b4b0397fbf9dfd9c548a313f1c8c3fc031
make SIGUSR2 dump and reset stats
Make resetting time work
base/statistics.cc:
Fix statistics reset so that it works again, and correctly
reset bins as well. (The old code wouldn't reset if you didn't
have any bins, and then would actually only reset the first
bin)
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
convert idleCycles/idleFraction into a single Average stat
to make reset work more simply
sim/main.cc:
handle SIGUSR2 to dump and reset stats
(SIGUSR1 only dumps them)
sim/sim_time.cc:
sim/sim_time.hh:
Add support for resetting the time
--HG--
extra : convert_revision : ea43e03c50c0a4bb826dc0842a8c4fa1a9289e0a
command line:
m5.* <config file> <args> --server.system:bin=true to track function calls in the server
m5.* <config file> <args> --client.system:bin=true to track function calls in the client
base/statistics.cc:
make an adjustment to the way stats are printed for FS_MEASURE
base/statistics.hh:
add a name() virtual function to GenBin. add a debug printf for activate().
add amake MainBin the default bin when FS_MEASURE.
cpu/exec_context.cc:
initialize swCtx to null upon creation of an xc
cpu/exec_context.hh:
add a SWContext pointer to every execution context.
cpu/simple_cpu/simple_cpu.cc:
process calls and returns for FS_MEASURE
cpu/simple_cpu/simple_cpu.hh:
add this so idleCycles will not be accessed before all stats are constructed
kern/tru64/tru64_events.cc:
add a FnEvent that fires whenever a function we're tracking is called. implement the process() virtual function for it.
kern/tru64/tru64_events.hh:
add FnEvent
kern/tru64/tru64_system.cc:
send bin parameter to System constructor. add bin parameter to Tru64System object. initialize all the FnEvent and MainBin members of Tru64system. also, populate the calling map that indicates whether a function call is on the path we're tracking.
kern/tru64/tru64_system.hh:
modify the Tru64System class to support FS_MEASURE
sim/system.cc:
add a bin parameter to System class. initialize a MainBin to hold the stats for nonPath.
sim/system.hh:
add a map of to match bins to function names. add a swCtx map to map pcb addresses to SWContext *s. Add some supporting functions.
--HG--
extra : convert_revision : af3eadd798cb2d2aed9b54e1059dcedf244dd526
arch/alpha/isa_desc:
A few disassembly changes to make it easier to compare with old machine.def traces:
- Make lds prefetches print f31 instead of r31 as dest.
- Don't print mode suffixes on FP if SS_COMPATIBLE_DISASSEMBLY
cpu/exetrace.cc:
Left-justify instruction in field, and increase width by 1.
--HG--
extra : convert_revision : 9ffd56728f1bb772aa3ccda5f027b93d4c3a4135
cpu/intr_control.cc:
Fix the reference to the cpu, to look up which cpu is being used
In sampling mode can't use an absolute pointer to the cpu, use the
exeContexts vector
cpu/intr_control.hh:
Add two new functions to simplify MP interrupts, fix it for sampling CPU model
--HG--
extra : convert_revision : a69cdbb81e6aefa3fd5385416713c689300bbea8
objName as a member, instead it has the pure virtual function name(). SimObject
now has a objName member, and all classes derived directly from Serializeable
have to implement a name() function (which now makes them unique by pointer value)
cpu/simple_cpu/simple_cpu.cc:
Change initialization of Event to get rid of Serializeable naming
dev/etherlink.cc:
dev/etherlink.hh:
Seralizeable derived naming changes
sim/eventq.cc:
Serializeable derived naming changes, also changed serialization process so it
doesn't need to use nameChildren
sim/eventq.hh:
Serializeable derived naming changes, remove constructor for specifying event name
sim/serialize.cc:
Serializeable derived naming changes, remove setName function and the child naming
pass for serialization
sim/serialize.hh:
Serializeable derived naming changes, removed nameChildren, setName
sim/sim_object.cc:
sim/sim_object.hh:
Serializeable derived naming changes
--HG--
extra : convert_revision : 67bcc275b6c210f7049f98a1ad0d22e8f5596a63
Can now serialize & unserialize DmaRequestEvents and DmaTransferEvents.
Also support serialize/unserialize of pointers to SimObjects and
other Serializable objects.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
unserialize() now takes a Checkpoint* instead of an IniFile*.
Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
unserialize() now takes a Checkpoint* instead of an IniFile*.
Events get serialized by the event queue only if they're marked
as AutoSerialize... others are assumed to be serialized by something
else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
Define Checkpoint object to encapsulate everything you need to know
about a checkpoint. Use it to allow lookups of named Serializable
objects (and SimObjects) during unserialization.
unserialize() now takes a Checkpoint* instead of an IniFile*.
--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
Serialize TLB contents.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
Complete serialization of SimpleCPU (including owned events).
sim/eventq.cc:
sim/eventq.hh:
Basic serialization for events.
Still need to handle dynamic events (not owned by a SimObject).
sim/serialize.cc:
sim/serialize.hh:
Export serialization filename so PhysicalMemory can
derive its filename from that.
--HG--
extra : convert_revision : 4db851c5880f73f576ca092d5e5ad4256048eb51
Add support for serializing enums.
arch/alpha/isa_traits.hh:
Add serialize/unserialize functions for RegFile
(defined in new isa_traits.cc).
cpu/exec_context.cc:
Flesh out serialize/unserialize.
sim/serialize.hh:
Add {UN}SERIALIZE_ENUM().
--HG--
extra : convert_revision : 9e30c7e7b3b290dc8ea0888ba3636fc93ee89052
though most objects don't actually serialize any data.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
Change unserialize param from IniFile& to const IniFile*.
cpu/simple_cpu/simple_cpu.cc:
Change unserialize param from IniFile& to const IniFile*.
Make unserialize call ExecContext::unserialize.
sim/eventq.cc:
Rename MainEventQueue (no spaces) for easier parsing in checkpoints.
Disable event serialization for now, so we can focus on the easy stuff.
sim/serialize.cc:
Change paramIn and arrayParamIn param from IniFile& to const IniFile*.
sim/serialize.hh:
Change unserialize, paramIn, and arrayParamIn params from IniFile& to const IniFile*.
--HG--
extra : convert_revision : 6e8853ed375eddec0e140c95a01dd51bd225f7b9
cpu/simple_cpu/simple_cpu.cc:
Serialize FP regs as integers (so we get exact bit representation).
sim/serialize.cc:
Don't panic on object rename... events come up named "event"
and need to get renamed. Also fix some DPRINTFs.
--HG--
extra : convert_revision : 62ad527a7aaf78ae623b70febc1331cf91cbad05
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
cpu/simple_cpu/simple_cpu.cc:
Move some common full-system CPU initialization from the
SimpleCPU & FullCPU constructors to AlphaISA::initCPU().
Make 'fault' local to SimpleCPU::tick.
cpu/simple_cpu/simple_cpu.hh:
Make 'fault' local to SimpleCPU::tick (not an object member).
--HG--
extra : convert_revision : e878dedfff06aac0548aca8b14d66c18b8916895
This fixes detailed-mpboot, which was broken as of my last change.
Also clean up some of the ExecContext status initialization.
cpu/base_cpu.hh:
CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
which execContext had the status change.
BaseCPU::registerExecContexts() no longer needs to be virtual.
cpu/exec_context.cc:
Initialize _status directly... don't use setStatus() as this will notify the CPU
of the change before it is ready.
CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
which execContext had the status change.
cpu/exec_context.hh:
Don't need initStatus() any more.
cpu/simple_cpu/simple_cpu.cc:
Move execCtxStatusChg() from header to .cc file.
No longer need specialized version of registerExecContexts to schedule TickEvent.
cpu/simple_cpu/simple_cpu.hh:
Move execCtxStatusChg() from header to .cc file.
CPU::execCtxStatusChg() now takes thread_num as arg (must be 0 for SimpleCPU).
No longer need specialized version of registerExecContexts to schedule TickEvent.
kern/tru64/tru64_system.cc:
Don't need initRegs; the PC etc. get initialized in the CPU constructor.
ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
kern/tru64/tru64_system.hh:
Don't need initRegs; the PC etc. get initialized in the CPU constructor.
sim/prog.cc:
ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
--HG--
extra : convert_revision : e960ebbeb845960344633798e251b6c8bf1c0378
of two CPUs and one switch-over event. Still some stats glitches though.
cpu/simple_cpu/simple_cpu.cc:
Schedule switched-to CPU right on curTick so we don't lose a cycle.
Remember to switch out old CPU.
--HG--
extra : convert_revision : f1bf21cac054c74f59770d8b20b30118f46be6f1
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet). Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time. Also worked at making behavior and naming
in System and Process objects more consistent.
arch/alpha/ev5.cc:
Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
Support for ExecContext switching.
CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
Support for ExecContext switching.
Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
Support for ExecContext switching.
Renamed xcvec array to execContexts to be consistent with Process.
--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/pc_event.hh:
Move to non architecture specific MemReq
--HG--
extra : convert_revision : 2445943b6f1c8af86b90cfa9c2f9b1eb4a6a1aa2
Add explicit include of sim/param.hh to .cc files as needed.
cpu/base_cpu.cc:
cpu/exetrace.cc:
dev/etherint.cc:
sim/system.cc:
Add include of sim/param.hh.
sim/sim_object.hh:
Don't need to include sim/param.hh.
--HG--
extra : convert_revision : 8ed13f25c2087680230056ab7abb623e6a7699cf
