Commit graph

6 commits

Author SHA1 Message Date
Kevin Lim
cbfbb7bc56 Updates to bring CPU portion of m5 up-to-date with newmem.
--HG--
extra : convert_revision : 00e6eefb24e6ffd9c7c5d8165db26fbf6199fdc4
2006-08-02 12:05:34 -04:00
Kevin Lim
248bd2bb62 Various branch predictor fixes/cleanup. It works more correctly now and supports both local and tournament predictors.
cpu/o3/2bit_local_pred.cc:
    Branch predictor cleanup/fixup.  Rename this to LocalBP.
cpu/o3/2bit_local_pred.hh:
    Rename to LocalBP, update to support changes to BPredUnit, include comments.
cpu/o3/alpha_cpu_builder.cc:
    Support extra parameters to the branch predictor.  Now it takes in a parameter to tell it which branch predictor it is using, the local or the tournament predictor.
cpu/o3/alpha_params.hh:
    Add in extra parameter for the branch predictor type.
cpu/o3/bpred_unit.cc:
    Branch predictor fixup/cleanup.  Rename it to BPredUnit.
cpu/o3/bpred_unit.hh:
    Branch predictor fixup/cleanup.  Now supports both the local and tournament predictors, and stores the branch predictor update state.
cpu/o3/bpred_unit_impl.hh:
    Branch predictor overhaul.  Now supports both the local and tournament predictors.
cpu/o3/cpu_policy.hh:
cpu/ozone/ozone_impl.hh:
cpu/ozone/simple_impl.hh:
    Reflect the class name change.
cpu/o3/decode_impl.hh:
    Be sure to set the predicted target as well so we don't squash twice.
cpu/o3/tournament_pred.cc:
cpu/o3/tournament_pred.hh:
    Fixes to the tournament predictor.
cpu/ozone/simple_params.hh:
    Include parameter for the branch predictor type.
python/m5/objects/AlphaFullCPU.py:
python/m5/objects/OzoneCPU.py:
    Include the parameter for the branch predictor type.

--HG--
extra : convert_revision : 34afebb3b40b47accb12558e439ee4cb03df5e64
2006-05-25 17:01:48 -04:00
Kevin Lim
c4a87f874a Move activity tracking code into its own class. Now the CPU no longer has to keep track of the activity tracking internals; it just calls advance() on the class and uses it to tell if it should deschedule itself.
SConscript:
    Split off activity/idling code into its own class to do the processing separately.
cpu/o3/alpha_cpu_builder.cc:
cpu/o3/alpha_params.hh:
    Activity stuff.  This is mostly for debugging and may be removed later on (or changed to enable/disable activity idling).
cpu/o3/cpu.cc:
    Move activity idling stuff mostly into its own class, so it no longer clutters this file.
cpu/o3/cpu.hh:
    Move activity idling stuff into its own class.
python/m5/objects/AlphaFullCPU.py:
    Add parameter for initial activity value.

--HG--
extra : convert_revision : f32f7cc03895dc07ab57ddba78c5402a1a8b0f1a
2006-05-19 15:37:52 -04:00
Kevin Lim
abe14c253b Include checker and trap latency parameters.
--HG--
extra : convert_revision : 148c59f430874e8425952db6960ca4f5e57e2a42
2006-05-16 14:47:09 -04:00
Kevin Lim
f0baf0ec99 Update the python file for the CPU.
--HG--
extra : convert_revision : be899403d893f5ab6c11ae5a4334c0e36bd6ff61
2006-04-22 18:47:07 -04:00
Steve Reinhardt
aad02f8088 Major cleanup of python config code.
Special mpy importer is gone; everything is just plain
Python now (funky, but straight-up).
May not completely work yet... generates identical ini
files for many configs/kernel settings, but I have yet
to run it against regressions.  This commit is for my
own convenience and won't be pushed until more testing
is done.

python/m5/__init__.py:
    Get rid of mpy_importer and param_types.
python/m5/config.py:
    Major cleanup.  We now have separate classes and
    instances for SimObjects.  Proxy handling and param
    conversion significantly reorganized.  No explicit
    instantiation step anymore; we can dump an ini file
    straight from the original tree.
    Still needs more/better/truer comments.
test/genini.py:
    Replace LoadMpyFile() with built-in execfile().
    Export __main__.m5_build_env.
python/m5/objects/AlphaConsole.py:
python/m5/objects/AlphaFullCPU.py:
python/m5/objects/AlphaTLB.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/BaseCache.py:
python/m5/objects/BaseSystem.py:
python/m5/objects/Bus.py:
python/m5/objects/CoherenceProtocol.py:
python/m5/objects/Device.py:
python/m5/objects/DiskImage.py:
python/m5/objects/Ethernet.py:
python/m5/objects/Ide.py:
python/m5/objects/IntrControl.py:
python/m5/objects/MemTest.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/Platform.py:
python/m5/objects/Process.py:
python/m5/objects/Repl.py:
python/m5/objects/Root.py:
python/m5/objects/SimConsole.py:
python/m5/objects/SimpleDisk.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
    Fixes for eliminating mpy_importer, and modified
    handling of frequency/latency params.
    Also renamed parent to Parent.

--HG--
rename : python/m5/objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.py
rename : python/m5/objects/AlphaFullCPU.mpy => python/m5/objects/AlphaFullCPU.py
rename : python/m5/objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.py
rename : python/m5/objects/BadDevice.mpy => python/m5/objects/BadDevice.py
rename : python/m5/objects/BaseCPU.mpy => python/m5/objects/BaseCPU.py
rename : python/m5/objects/BaseCache.mpy => python/m5/objects/BaseCache.py
rename : python/m5/objects/BaseSystem.mpy => python/m5/objects/BaseSystem.py
rename : python/m5/objects/Bus.mpy => python/m5/objects/Bus.py
rename : python/m5/objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.py
rename : python/m5/objects/Device.mpy => python/m5/objects/Device.py
rename : python/m5/objects/DiskImage.mpy => python/m5/objects/DiskImage.py
rename : python/m5/objects/Ethernet.mpy => python/m5/objects/Ethernet.py
rename : python/m5/objects/Ide.mpy => python/m5/objects/Ide.py
rename : python/m5/objects/IntrControl.mpy => python/m5/objects/IntrControl.py
rename : python/m5/objects/MemTest.mpy => python/m5/objects/MemTest.py
rename : python/m5/objects/Pci.mpy => python/m5/objects/Pci.py
rename : python/m5/objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.py
rename : python/m5/objects/Platform.mpy => python/m5/objects/Platform.py
rename : python/m5/objects/Process.mpy => python/m5/objects/Process.py
rename : python/m5/objects/Repl.mpy => python/m5/objects/Repl.py
rename : python/m5/objects/Root.mpy => python/m5/objects/Root.py
rename : python/m5/objects/SimConsole.mpy => python/m5/objects/SimConsole.py
rename : python/m5/objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.py
rename : python/m5/objects/Tsunami.mpy => python/m5/objects/Tsunami.py
rename : python/m5/objects/Uart.mpy => python/m5/objects/Uart.py
extra : convert_revision : 9dc55103a6f5b40eada4ed181a71a96fae6b0b76
2005-05-29 01:14:50 -04:00
Renamed from python/m5/objects/AlphaFullCPU.mpy (Browse further)