Commit graph

14 commits

Author SHA1 Message Date
Gabe Black
3f7979c99d Made Addr a global type
--HG--
extra : convert_revision : 869bd9fa5d8591115ac9b4a7401eb2490986b835
2006-02-21 03:38:21 -05:00
Gabe Black
463aa6d49d Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.
arch/alpha/alpha_linux_process.cc:
    Added using directive for AlphaISA namespace
arch/alpha/alpha_memory.hh:
arch/alpha/isa/branch.isa:
cpu/pc_event.hh:
    Added typedefs for Addr
arch/alpha/alpha_tru64_process.cc:
arch/alpha/arguments.cc:
    Added using directive for AlphaISA
arch/alpha/ev5.hh:
    Added an include of arch/alpha/isa_traits.hh, and a using directive for the AlphaISA namespace.
arch/alpha/faults.hh:
    Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/alpha/isa/main.isa:
    Untemplatized StaticInst, added a using for namespace AlphaISA to show up in decoder.cc and the exec.ccs, relocated makeNop to decoder.hh
arch/alpha/isa/mem.isa:
    Untemplatized StaticInst and StaticInstPtr
arch/alpha/isa/pal.isa:
cpu/base_dyn_inst.cc:
    Untemplatized StaticInstPtr
arch/alpha/isa_traits.hh:
    Changed variables to be externs instead of static since they are part of a namespace and not a class.
arch/alpha/stacktrace.cc:
    Untemplatized StaticInstPtr, and added a using directive for AlphaISA.
arch/alpha/stacktrace.hh:
    Added some typedefs for Addr and MachInst, and untemplatized StaticInstPtr
arch/alpha/vtophys.cc:
    Added a using directive for AlphaISA
arch/alpha/vtophys.hh:
    Added the AlphaISA namespace specifier where needed
arch/isa_parser.py:
    Changed the placement of the definition of the decodeInst function to be outside the namespaceInst namespace.
base/loader/object_file.hh:
cpu/o3/bpred_unit.hh:
    Added a typedef for Addr
base/loader/symtab.hh:
    Added a typedef for Addr, and added a TheISA to Addr in another typedef
base/remote_gdb.cc:
    Added a using namespace TheISA, and untemplatized StaticInstPtr
base/remote_gdb.hh:
    Added typedefs for Addr and MachInst
cpu/base.cc:
    Added TheISA specifier to some variables exported from the isa.
cpu/base.hh:
    Added a typedef for Addr, and TheISA to some variables from the ISA
cpu/base_dyn_inst.hh:
    Untemplatized StaticInstPtr, and added TheISA specifier to some variables from the ISA.
cpu/exec_context.hh:
    Added some typedefs for types from the isa, and added TheISA specifier to some variables from the isa
cpu/exetrace.hh:
    Added typedefs for some types from the ISA, and untemplatized StaticInstPtr
cpu/memtest/memtest.cc:
cpu/o3/btb.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/platform.cc:
dev/sinic.cc:
dev/uart8250.cc:
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
kern/system_events.cc:
kern/tru64/dump_mbuf.cc:
kern/tru64/tru64_events.cc:
sim/process.cc:
sim/pseudo_inst.cc:
sim/system.cc:
    Added using namespace TheISA
cpu/memtest/memtest.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/itx_reader.hh:
dev/ide_disk.hh:
dev/pcidev.hh:
dev/platform.hh:
dev/tsunami.hh:
sim/system.hh:
sim/vptr.hh:
    Added typedef for Addr
cpu/o3/2bit_local_pred.hh:
    Changed the include to use arch/isa_traits.hh instead of arch/alpha/isa_traits.hh. Added typedef for Addr
cpu/o3/alpha_cpu.hh:
    Added typedefs for Addr and IntReg
cpu/o3/alpha_cpu_impl.hh:
    Added this-> to setNextPC to fix a problem since it didn't depend on template parameters any more. Removed "typename" where it was no longer needed.
cpu/o3/alpha_dyn_inst.hh:
    Cleaned up some typedefs, and untemplatized StaticInst
cpu/o3/alpha_dyn_inst_impl.hh:
    untemplatized StaticInstPtr
cpu/o3/alpha_impl.hh:
    Fixed up a typedef of MachInst
cpu/o3/bpred_unit_impl.hh:
    Added a using TheISA::MachInst to a function
cpu/o3/btb.hh:
    Changed an include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr
cpu/o3/commit.hh:
    Removed a typedef of Impl::ISA as ISA, since TheISA takes care of this now.
cpu/o3/cpu.cc:
    Cleaned up namespace issues
cpu/o3/cpu.hh:
    Cleaned up namespace usage
cpu/o3/decode.hh:
    Removed typedef of ISA, and changed it to TheISA
cpu/o3/fetch.hh:
    Fized up typedefs, and changed ISA to TheISA
cpu/o3/free_list.hh:
    Changed include of arch/alpha/isa_traits.hh to arch/isa_traits.hh
cpu/o3/iew.hh:
    Removed typedef of ISA
cpu/o3/iew_impl.hh:
    Added TheISA namespace specifier to MachInst
cpu/o3/ras.hh:
    Changed include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr.
cpu/o3/regfile.hh:
    Changed ISA to TheISA, and added some typedefs for Addr, IntReg, FloatReg, and MiscRegFile
cpu/o3/rename.hh:
    Changed ISA to TheISA, and added a typedef for RegIndex
cpu/o3/rename_map.hh:
    Added an include for arch/isa_traits.hh, and a typedef for RegIndex
cpu/o3/rob.hh:
    Added a typedef for RegIndex
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
    Changed an include of arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef of Addr
cpu/ozone/cpu.hh:
    Changed ISA into TheISA, and untemplatized StaticInst
cpu/pc_event.cc:
    Added namespace specifier TheISA to Addr types
cpu/profile.hh:
kern/kernel_stats.hh:
    Added typedef for Addr, and untemplatized StaticInstPtr
cpu/simple/cpu.cc:
    Changed using directive from LittleEndianGuest to AlphaISA, which will contain both namespaces. Added TheISA where needed, and untemplatized StaticInst
cpu/simple/cpu.hh:
    Added a typedef for MachInst, and untemplatized StaticInst
cpu/static_inst.cc:
    Untemplatized StaticInst
cpu/static_inst.hh:
    Untemplatized StaticInst by using the TheISA namespace
dev/alpha_console.cc:
    Added using namespace AlphaISA
dev/simple_disk.hh:
    Added typedef for Addr and fixed up some formatting
dev/sinicreg.hh:
    Added TheISA namespace specifier where needed
dev/tsunami.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
    Added using namespace TheISA. It might be better for it to be AlphaISA
dev/tsunami_cchip.cc:
    Added typedef for TheISA. It might be better for it to be AlphaISA
kern/linux/aligned.hh:
sim/pseudo_inst.hh:
    Added TheISA namespace specifier to Addr
kern/linux/linux_threadinfo.hh:
    Added typedef for Addr, and TheISA namespace specifier to StackPointerReg
kern/tru64/mbuf.hh:
    Added TheISA to Addr type in structs
sim/process.hh:
    Added typedefs of Addr, RegFile, and MachInst
sim/syscall_emul.cc:
    Added using namespace TheISA, and a cast of VMPageSize to the int type
sim/syscall_emul.hh:
    Added typecast for Addr, and TheISA namespace specifier for where needed

--HG--
extra : convert_revision : 91d4f6ca33a73b21c1f1771d74bfdea3b80eff45
2006-02-19 02:34:37 -05:00
Gabe Black
2c5e03550a Removed isa_traits.hh from targetarch, moved vptr.hh from arch/alpha to sim, fixed an include to have the new location, and removed an ambiguating function declaration in byteswap.hh.
SConscript:
    Moved isa_fullsys_traits.hh out of targetarch, since the only place it's included, and the only place the comments in the file say it should be included, is in the alpha isa_traits.hh
    targetarch/isa_traits.hh is now included through arch/isa_traits.hh
    vptr.hh was removed from targetarch, and moved to sim
arch/alpha/pseudo_inst.cc:
    Moved vptr.hh from targetarch to sim
base/loader/object_file.hh:
base/loader/symtab.hh:
cpu/base.hh:
dev/ide_disk.cc:
    Changed the include of isa_traits.hh from targetarch to arch
cpu/static_inst.hh:
dev/platform.hh:
dev/simple_disk.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/mbuf.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/process.hh:
sim/syscall_emul.hh:
    Changed the include of isa_traits.hh from targetarch to arch.
kern/linux/linux_threadinfo.hh:
    Changed the include of vptr.hh from targetarch to sim.
sim/byteswap.hh:
    Removed the line declaring swap_byte(long), since it ambiguates with swap_byte(int32_t)
sim/vptr.hh:
    Fixed the assert in the equals operator.
    Changed the AlphaISA namespace reference to TheISA.
    Changed arch/alpha/vtophys.hh to targetarch/vtophys.hh, since this file is now for all architectures.
    Added an include of arch/isa_traits.hh so that TheISA would be defined.

--HG--
extra : convert_revision : e3c6ac17ed0277cfeba1d35cd63eba66eba5996f
2006-02-12 12:40:58 -05:00
Steve Reinhardt
ad8b9636f8 Many files:
Update copyright dates and author list

SConscript:
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/crc.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/match.cc:
base/match.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/output.cc:
base/output.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/timebuf.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
build/SConstruct:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/smt.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
cpu/memtest/memtest.hh:
cpu/o3/sat_counter.cc:
cpu/o3/sat_counter.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/ibm_reader.cc:
cpu/trace/reader/ibm_reader.hh:
cpu/trace/reader/itx_reader.cc:
cpu/trace/reader/itx_reader.hh:
cpu/trace/reader/m5_reader.cc:
cpu/trace/reader/m5_reader.hh:
cpu/trace/reader/mem_trace_reader.cc:
cpu/trace/reader/mem_trace_reader.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/pktfifo.cc:
dev/pktfifo.hh:
dev/platform.cc:
dev/platform.hh:
dev/simconsole.cc:
dev/simconsole.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunamireg.h:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
docs/stl.hh:
encumbered/cpu/full/op_class.hh:
kern/kernel_stats.cc:
kern/kernel_stats.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/linux/linux_threadinfo.hh:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
python/SConscript:
python/m5/__init__.py:
python/m5/config.py:
python/m5/convert.py:
python/m5/multidict.py:
python/m5/smartdict.py:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/root.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/startup.cc:
sim/startup.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/genini.py:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/ccdrv/devtime.c:
util/m5/m5.c:
util/oprofile-top.py:
util/rundiff:
util/m5/m5op.h:
util/m5/m5op.s:
util/stats/db.py:
util/stats/dbinit.py:
util/stats/display.py:
util/stats/info.py:
util/stats/print.py:
util/stats/stats.py:
util/tap/tap.cc:
    Update copyright dates and author list

--HG--
extra : convert_revision : 0faba08fc0fc0146f1efb7f61e4b043c020ff9e4
2005-06-05 05:16:00 -04:00
Nathan Binkert
5eab6c4b41 Make the notion of a global event tick independent of the actual
CPU cycle ticks.  This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency.  For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.

arch/alpha/ev5.cc:
    The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
    frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
    frequency isn't the cpu parameter anymore, cycleTime is.
    create several public functions for getting the cpu frequency
    and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
    Now that ticks aren't cpu cycles, fixup code to advance
    by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
    Provide a function to get the number of ticks for a given
    number of cycles.
dev/alpha_console.cc:
    Update for changes in the way that frequencies and latencies are
    accessed.  Move some stuff to init()
dev/alpha_console.hh:
    Need a pointer to the system and the cpu to get the frequency
    so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
    outline the constructor and destructor
dev/platform.hh:
    outline the constructor and destructor.
    don't keep track of the interrupt frequency.  Only provide the
    accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
    outline the constructor and destructor
    Don't set the interrupt frequency here.  Get it from the actual device
    that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
    Make the interrupt interval a configuration parameter.  (And convert
    the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
    update for changes in the way bandwidths are passed from
    python to C++ to accomidate the new way that ticks works.
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
kern/tru64/tru64_system.cc:
    For now, we must get the boot cpu's frequency as a parameter
    since allowing the system to have a pointer to the boot cpu would
    cause a cycle.
python/m5/config.py:
    Fix support for cycle_time relative latencies and frequencies.
    Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
    All CPUs now have a cycle_time.  The default is the global frequency,
    but it is now possible to set the global frequency to some large value
    (like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
    Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
    We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
    Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
    this frequency isn't needed.  We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
    The clock generator should hold the frequency
sim/eventq.hh:
    Need to remove this assertion because the writeback event
    queue is different from the CPU's event queue which can cause
    this assertion to fail.
sim/process.cc:
    Fix comment.
sim/system.hh:
    Struct member to hold the boot CPU's frequency.
sim/universe.cc:
    remove unneeded variable.

--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 15:32:06 -04:00
Nathan Binkert
3ece6ab029 New and improved configuration mechanism. No more writing of
wierd ini files.  The ini files are still used as an intermediate step,
but a sophisticated python library exists to help build them more
easily.

SConscript:
    add the new embedded file stuff
    remove all of the old object description junk
base/inifile.cc:
base/inifile.hh:
    get rid of findDefault and findAppend since they were the source
    of much evil.
base/trace.cc:
    For now, if we don't have the dprintf_stream set up, dump
    to standard out.  We probably want a command line option
    for this.
dev/alpha_console.cc:
    PioDevice now takes a platform parameter.
    All PioDevices must have a pio_latency parameter.  We stick
    a dummy parameter in here for now until we get rid of the
    builder stuff.
dev/alpha_console.hh:
    don't need Platform anymore
dev/baddev.cc:
    PioDevice now takes a platform parameter.
    All PioDevices must have a pio_latency parameter.  We stick
    a dummy parameter in here for now until we get rid of the
    builder stuff. Same for the platform parameter, though we just
    pass the PioDevice a null parameter since it isn't used by
    this device and it's quicker.
dev/baddev.hh:
    fix #include guards
dev/etherlink.cc:
    rename parameters.
dev/ethertap.cc:
    rename parameters
dev/ide_ctrl.cc:
    All devices need an address even if it will get overwritten later.
dev/ide_disk.cc:
    use an enum for the drive ID stuff.
    rename disk_delay -> delay
    Actually, I think that we should implement "cable select" and
    have the controller tell the drive what it is.
dev/io_device.cc:
dev/io_device.hh:
    All IO devices take a Platform *
dev/ns_gige.cc:
    all devices need an io_bus.  rename header_bus to io_bus
    We don't need stuff for the interrupt controller since
    it's all in the platform now.
dev/ns_gige.hh:
    We don't need stuff for the interrupt controller now since
    it's all in the platform.
dev/pciconfigall.cc:
    Pass a dummy NULL to the PioDevice for the platform since
    we don't need one.
dev/pcidev.cc:
    Move a bunch of common functionality into the PciDev
dev/platform.hh:
    remove unneeded code
dev/tsunami.cc:
    remove unused param
dev/tsunami_cchip.cc:
    pass platform pointer
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart.cc:
    pass platform variable
dev/uart.hh:
    don't need to keep a platform pointer.  it's in the base class
kern/linux/linux_system.cc:
kern/tru64/tru64_system.cc:
    rename some parameters
sim/builder.cc:
    clean up builder code. use more parameters from the
    config node.  all sections with a type= are now created,
    the old mechanisms no longer work
sim/builder.hh:
    remove some extra variables since they are found in the ConfigNode
sim/main.cc:
    add a quick hack command line argument -X to dump out the
    embedded files.  (probably should be fixed up a little.)
    accept .mpy files
    printing to the streams has to happen after the hierarchy
    is built since we're moving away from param contexts
sim/param.cc:
    add parsing support for ranges
sim/process.cc:
    isValid isn't very useful anymore.  interpret the names
    stdout, stderr, cout, cerr for the file descriptors
sim/pyconfig/SConscript:
    Add Action handlers for creating an embedded python file
    and for creating an embedded C file.

    use these action handlers to embed all objects found in the objects
    tree into the binary along with the importer and the m5config stuff
sim/pyconfig/m5config.py:
    Major changes to the original configuration file generator.  These
    changes largely involve implementing copy-on-write like semantics
    for all of the SimObjects.  Real documentation must be written.
sim/universe.cc:
    Universe becomes a SimObject since we don't really have the notion of
    param contexts in the python code.

--HG--
rename : sim/pyconfig/m5configbase.py => sim/pyconfig/m5config.py
extra : convert_revision : c353453e5beb91c37f15755998fc0d8858c6829a
2005-01-15 04:12:25 -05:00
Nathan Binkert
b031888038 Use parameter structs for initialization so it's easier
to add new devices.  Abstract the Platform more so that
it is unnecessary to know know platform specifics for
interrupting or translating PCI DMA addresses.

dev/ide_ctrl.cc:
    convert to parameter struct for initialization
    use the interrupt functions in the PciDev base class
    convert from tsunami to using platform
    We don't need an interrupt controller here.
dev/ide_ctrl.hh:
    don't use Tsunami, use Platform
    make the IdeDisk a friend so that it can access my plaform
    convert to parameter struct for construction
dev/ide_disk.cc:
    don't use tsunami references, but platform references
dev/ns_gige.cc:
    Convert to parameter struct for initialzation. Use code in
    base class for interrupts so we don't need to know anything
    about the platform. Don't need an IntrControl *.
dev/ns_gige.hh:
    We don't need a Tsunami * anymore
    convert to a parameter struct for construction
dev/pcidev.cc:
    deal with new parameter struct
dev/pcidev.hh:
    - Move all of the configuration parameters into a param struct
    that we can pass into the constructor.
    - Add a Platform * for accessing new generic interrupt post/clear
    and dma address translation fuctions
    - Create functions for posting/clearing interrupts and translating
    dma addresses
dev/platform.cc:
    have default functions that panic on pci calls
dev/platform.hh:
    don't make the pci stuff pure virtual, but rather provide
    default implementations that panic.  Also, add dma address
    translation.
dev/tsunami.cc:
    this-> isn't necessary here.
    add pci address translation
dev/tsunami.hh:
    implement the pciToDma address translation

--HG--
extra : convert_revision : 7db27a2fa1f1bd84704921ec7ca0280b5653c43e
2004-11-13 15:45:22 -05:00
Ali Saidi
3402411661 changes to make interrupts part of the platform rather than tsunami
specific

--HG--
extra : convert_revision : f51788dd41c23f13b253268bb2b286a5225ef087
2004-10-25 18:14:13 -04:00
Ali Saidi
54b49f933a rewrote uart and renamed console.cc to simconsole to reduce confusion
base/traceflags.py:
    removed TsunamiUart/TlaserUart and added a plain Uart
dev/alpha_console.cc:
    updated for new simconsole
dev/platform.hh:
    added a uart member to platform
dev/simconsole.cc:
dev/simconsole.hh:
    removed lots of legacy code, it should all be ours now.
    converted tabs to 8 spaces
    added our copyright
dev/tsunami.cc:
    uses simconsole.hh rather than console.hh
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
    never needed console.hh
dev/tsunami_io.hh:
    this does need eventq.hh and it just happend to be working whenn console.hh was
    included everywhere
dev/tsunamireg.h:
    added a couple more 8250/16550 uart defines
dev/uart.cc:
    new uart code, rewritten to support both tlaser and tsunami (both a 8250 and 8530
    uart).
dev/uart.hh:
    updated for new uart, legacy code removed

--HG--
rename : dev/console.cc => dev/simconsole.cc
rename : dev/console.hh => dev/simconsole.hh
rename : dev/tsunami_uart.cc => dev/uart.cc
rename : dev/tsunami_uart.hh => dev/uart.hh
extra : convert_revision : e663352d49d4c2d3c95643030cf73c0e85ba2f08
2004-06-26 21:26:28 -04:00
Ali Saidi
9ce632d1f0 Updated copyright on Tsunami and kern/linux files.
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
    Updated copyright
dev/tsunamireg.h:
    Updated copyright and fixed a ULL

--HG--
extra : convert_revision : 4800bd227c7064044ee98169d6a91f74c791956f
2004-06-04 13:43:50 -04:00
Ali Saidi
6010f637ff Removed dynamic cast to get interrupt frequency and replaced with a
virtual function in alphaaccess.cc

dev/alpha_console.cc:
dev/alpha_console.hh:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_io.hh:
    Removed dynamic cast to get interrupt frequency and replaced with a
    virtual function

--HG--
extra : convert_revision : 01f514a33d8f76c6527ab25a713d5c86f9fd646e
2004-06-01 17:36:38 -04:00
Ali Saidi
fd21387149 Linux boots... various fixes to make console work correctly
dev/console.cc:
    commented out code that checks if an interrupt is happening before issuing one
    because they can get lost when linux boots
dev/console.hh:
    added a setPlatform function to set the platform to interrupt
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
    Added virtual functions to post console interrupts
dev/tsunami_io.cc:
    allowed a 64bit read of the PIC since we can't do a physical byte read
dev/tsunami_uart.cc:
    moved TsunamiUart to PioDevice
    various little fixes to make linux work
dev/tsunami_uart.hh:
    Made Tsunami_Uart a PIO device
dev/tsunamireg.h:
    added some UART defines and used the ULL macros
kern/linux/linux_system.cc:
    commented out waiting for gdb

--HG--
extra : convert_revision : 8cfd0700f3812ab349a6d7f132f85f4f421c5c5e
2004-05-14 17:34:15 -04:00
Andrew Schultz
6807c319b0 Checkin of latest IDE and some separation between platforms (Tsunami and
Turbolaser)

base/range.hh:
    Change semantics of range to be inclusive of the end value, may need to
    check other users of range to make sure they are semantically correct.
    This was needed for access of last byte in range of address on IDE and
    makes sense for case of range from 0 to all f
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
    Whole mess of changes.. at current state simulator will boot and read
    partition table and then have a bunch of errors and panic
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/platform.hh:
    Changes to work with platform separation
dev/tsunami.cc:
dev/tsunami.hh:
    Change to work with platform separation

--HG--
extra : convert_revision : e1de22b54df7fdcf391efc2a8555ada93f46beab
2004-05-03 11:47:52 -04:00
Andrew Schultz
48bb27be72 Added platform.hh
--HG--
extra : convert_revision : c11fde5e5f0e344d2f4c89c57a4d41ca179a31e5
2004-02-09 14:52:41 -05:00