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Author SHA1 Message Date
Nathan Binkert
6f4c1aa475 Move the turbolaser python simobject stuff into the 
encumbered directory

--HG--
extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854
 2007-04-18 11:15:52 -07:00
Nathan Binkert
d92fff858b fix SIGUSR1 and SIGUSR2 by clearing the variables after 
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
 2007-04-18 08:04:46 -07:00
Ron Dreslinski
3b95161da8 Merge zizzer:/bk/newmem 
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head

--HG--
extra : convert_revision : 8630b3771678b68d5cd12a61f7a4de2e3443a8d7
 2007-04-16 11:32:09 -04:00
Ron Dreslinski
2952c34096 Fixes for splash, may conflict with Korey's SMT work and doesn't support 03cpu yet. 
src/cpu/simple/base.cc:
    Cpu's should start as unallocated, not suspended
src/cpu/simple_thread.cc:
    Wait for a thread to be assigned to activate the cpu
src/kern/tru64/tru64.hh:
    When looking for a open cpu to assign threads, look for an unallocated one, not a suspended one.

--HG--
extra : convert_revision : 5e3ad2e96b4a715ed38293ceaccff5b9f4ea7985
 2007-04-16 11:31:54 -04:00
Kevin Lim
68221b708c Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : fd9a2d0e833dd47f55aad9c50c68431bc6d3e0a7
 2007-04-15 22:40:18 -04:00
Kevin Lim
733a57d45a Update long test refs. 
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini:
tests/long/30.eon/ref/alpha/tru64/o3-timing/config.out:
tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.out:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.out:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out:
tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr:
    Update refs.

--HG--
extra : convert_revision : 19483a5a18e76338a3208a58d7460a922377acd3
 2007-04-15 22:29:37 -04:00
Ali Saidi
9be23ea4ae Merge zizzer:/bk/newmem 
into  udhcp-macvpn-501.public.engin.umich.edu:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : 38c2427790d27c64e69ac3223e76cabeeb765904
 2007-04-13 13:34:04 -04:00
Ali Saidi
2778458eb5 take a first stab at the release notes 
AUTHORS:
    add sparc full system support to my list of accolades

--HG--
extra : convert_revision : 1d3afaae2502306e44cd7fb251e763931a7e3ae9
 2007-04-13 13:33:32 -04:00
Nathan Binkert
a575fbd4aa Completely re-work how the scons framework incorporates swig 
and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python.  This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++).  Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.

--HG--
extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
 2007-04-12 21:20:04 -07:00
Nathan Binkert
eefbda7f7c Don't allow Source to accept multiple arguments, lists, 
or automatically do Split().  It isn't used anywhere, and
isn't very consistent with the python features that are
about to be added.  Do accept SCons.Node.FS.File arguments
though.

--HG--
extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
 2007-04-12 09:07:59 -07:00
Nathan Binkert
e04208f046 Fix NextEthernetAddr. 
unproxy() needs to return a new object otherwise all
instances will use the same value.  This fix is more
or less unique to NextEthernetAddr because its use of
the proxy stuff is a bit different than everything else.

--HG--
extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
 2007-04-12 08:37:55 -07:00
Nathan Binkert
fa2a93a236 Add a scons hack to force symlinks to the swig .i files 
to be created

--HG--
extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
 2007-04-12 08:35:19 -07:00
Gabe Black
6ec510385d Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
 2007-04-11 15:30:09 +00:00
Gabe Black
121a5438a5 Make trying to execute macroops fail with a better error message. 
--HG--
extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
 2007-04-11 12:26:23 +00:00
Gabe Black
e72f1e63f0 Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 
--HG--
extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
 2007-04-11 12:25:00 +00:00
Gabe Black
fcc35a67e0 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
 2007-04-10 17:27:33 +00:00
Gabe Black
74122c04cf Even if you don't want to fetch more bytes, make sure you handle a fault. 
--HG--
extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
 2007-04-10 17:27:12 +00:00
Gabe Black
798caa36ad Include the new GenFault microop. 
--HG--
extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
 2007-04-10 17:26:04 +00:00
Gabe Black
9f4ebf9156 Reworked x86 a bit 
--HG--
extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
 2007-04-10 17:25:15 +00:00
Gabe Black
d6f81e02b4 Updated for the new instruction stubs. 
--HG--
extra : convert_revision : c85799c9093d8e9efba0744c8768196879974b74
 2007-04-10 17:23:47 +00:00
Gabe Black
b79cacaf3f Changed some instruction names to be in all caps, and "implemented" move to test the stub code for instructions. 
--HG--
extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
 2007-04-10 17:22:45 +00:00
Gabe Black
321ca32152 Added stub implementations of the x86 instructions categorized like they are in the AMD64 manuals' instruction summary in volume 1. 
--HG--
extra : convert_revision : 47b1d9aa0c88f6832f14ab68df174263d0d1eda9
 2007-04-10 17:18:59 +00:00
Gabe Black
7d53e54019 A new microop which generates a specified fault. 
--HG--
extra : convert_revision : c5c59f82553ffae273c95ea777e21e85648a4f98
 2007-04-10 17:16:22 +00:00
Gabe Black
1320e294fe Added a class which lets you manipulate all the strings returned by the parser as a unit. 
--HG--
extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
 2007-04-10 17:14:51 +00:00
Gabe Black
c59f9456b9 Fix up the base x86 fault object and create a fault to be generated by unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. 
--HG--
extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
 2007-04-10 17:13:26 +00:00
Gabe Black
f71a6c8fed Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : 247fc298ba8ea1ea38ee2e906aa84bb5bc3f4592
 2007-04-10 01:53:04 +00:00
Gabe Black
5476247623 Fixed a compile error. 
--HG--
extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
 2007-04-10 01:52:38 +00:00
Ali Saidi
438b951a5b add code to whack the intel gbe model from the relase.... it's not tested and it's configuration is a hack 
--HG--
extra : convert_revision : b65cd6d9b45a67ba64ea398cf0c0ce28f91c7e27
 2007-04-09 18:49:02 -04:00
Gabe Black
d54b8b73ed Comment out the remote gdb object for SE mode. 
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
 2007-04-09 18:30:50 +00:00
Kevin Lim
64b4572c3e Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head

--HG--
extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
 2007-04-09 14:30:49 -04:00
Kevin Lim
0cc343d41d Fix bug when blocking due to no free registers. 
--HG--
extra : convert_revision : a1a218d3294515184689041487057495223360b7
 2007-04-09 14:29:59 -04:00
Gabe Black
f53d2ccbfc Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
 2007-04-09 07:59:57 +00:00
Gabe Black
97e8111b46 Added SPARC o3 insttest regression. 
--HG--
extra : convert_revision : b008b4bda60ced329df9b700ff9b0a978e2d3b19
 2007-04-09 03:59:56 -04:00
Gabe Black
7e1807acfb Added SPARC simple timing regression for insttest 
--HG--
extra : convert_revision : cb490fd6f1be73b57dceb93edf83d7edc4a67beb
 2007-04-09 03:52:15 -04:00
Gabe Black
d9da10199e Make SPARC build o3 by default. 
--HG--
extra : convert_revision : 7be49f9d395094d849d8da59b0fd4efe962fb201
 2007-04-09 03:40:21 -04:00
Gabe Black
85f9213b8a Accidentally didn't save when moving the specialization code out of here. 
--HG--
extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
 2007-04-09 01:08:05 +00:00
Gabe Black
c7bb106886 Take into account that the flattened integer register space is a different size than the architected one. Also fixed some asserts. 
--HG--
extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
 2007-04-08 23:31:11 +00:00
Gabe Black
d29979b043 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
 2007-04-08 01:54:08 +00:00
Gabe Black
3bb5fd8c44 Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. 
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
 2007-04-08 01:42:42 +00:00
Gabe Black
5d52cd6409 Move the instruction specialization stuff out of the microassembler file, and added some comments to main.isa 
--HG--
extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
 2007-04-06 16:55:56 +00:00
Gabe Black
a3ed19f82a Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
 2007-04-06 16:39:47 +00:00
Gabe Black
59df95c7e6 Consolidated the microcode assembler to help separate it from more x86-centric stuff. 
--HG--
extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
 2007-04-06 16:39:25 +00:00
Gabe Black
2a1c102f25 Refactored the x86 isa description some more. There should be more seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. 
--HG--
rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa
extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
 2007-04-06 16:00:56 +00:00
Gabe Black
75e8838ba4 Clean up the code a little, fix (I think) a perceived problem with immediate sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. 
--HG--
extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
 2007-04-06 15:19:23 +00:00
Gabe Black
e633e23a3a Add in a stub merging function 
--HG--
extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
 2007-04-06 15:16:36 +00:00
Gabe Black
47c24ff07a Clean up the macroop code. 
--HG--
extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
 2007-04-06 15:15:36 +00:00
Gabe Black
3c9768e644 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec

--HG--
extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
 2007-04-06 14:37:46 +00:00
Gabe Black
077183f7ec Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : efdbf9787383dc1df544b7276f8120285e69bf69
 2007-04-05 11:35:31 +00:00
Gabe Black
ff7b89beee The process of going from an instruction definition to an instruction to be returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 
1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter.
2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number.
3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM.
4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s.
5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it.

In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though.

src/arch/x86/isa/decoder/one_byte_opcodes.isa:
src/arch/x86/isa/microasm.isa:
src/arch/x86/isa/microops/microops.isa:
src/arch/x86/isa/operands.isa:
src/arch/x86/isa/microops/base.isa:
    Implemented polymorphic microops and changed around the microcode assembler syntax.

--HG--
extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
 2007-04-04 23:35:20 +00:00
Gabe Black
ab2bed349b Fix a regular expression problem when recognizing labels for string substitution. 
--HG--
extra : convert_revision : ba398e1b434efda28882f159d5a4419302276371
 2007-04-04 23:19:32 +00:00