arch/alpha/vtophys.cc:
fix up vtophys to deal with translations if there
is no ptbr, and to deal with PAL addresses
add ptomem which is just a wrapper for dma_addr
arch/alpha/vtophys.hh:
add ptomem which is a wrapper for dma_addr with the
same usage as vtomem
--HG--
extra : convert_revision : 1ae22073d400e87b708a4a7ef501124227fc6c39
In the future, this can be used for actual data, but for now, it's
so that devices can respond to timing accesses properly. This way,
an uncached access on a bus further away will take longer to respond.
dev/alpha_console.cc:
dev/alpha_console.hh:
suport the separate IO bus
--HG--
extra : convert_revision : ececb70f5febfd00231f6e406f93b2a79be01261
Changed base_linux.ini file to use physical addresses
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Fix masking of read/write address to get read/write offset
dev/tsunami_uart.cc:
Fix masking of read/write address to get read/write offset
Also added add_child call that was missed
dev/tsunami_uart.hh:
Changed size to 0x8
--HG--
extra : convert_revision : 1468ca43167bfb28b28c4510401a1ebad683e102
some sundry problems with new interface
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Fixed to use new FunctionalMemory interface
--HG--
extra : convert_revision : bee98e6285d92f28fafacf919ab06eaf333a9b56
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
Add aligned copy tests, percent of copies is specified by percent_copies
--HG--
extra : convert_revision : eaf1900fcb8832db98249e94e3472ebfb049eb48
dev/pcidev.cc:
Linux 2.6 writes the latency timer, so it was added to the list of
allowable writes
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
A couple of changes so that the new linux autoconf serial driver thinks
that the serial port exists and configures it
--HG--
extra : convert_revision : 6c026ef754e31de56c9b837ceb8f6be48c8d8d9c
- Make the MemoryController use address ranges (via Range) instead
of an address and a mask
base/remote_gdb.cc:
reflect name change
dev/alpha_access.h:
better include
dev/alpha_console.cc:
- FunctionalMemory no longer takes care of mapping my address into
the proper address space. It must be done locally.
- the memory controller no longer uses a mask, but a size, and the
size is determined by the device, not the .ini file
- fix up address calculations to reflect the removal of a mask
- PhysicalMemory::getSize() -> PhysicalMemory::size()
dev/alpha_console.hh:
- FunctionalMemory no longer takes care of mapping my address into
the proper address space. It must be done locally.
- the memory controller no longer uses a mask, but a size, and the
size is determined by the device, not the .ini file
- fix up address calculations to reflect the removal of a mask
- get rid of MmapDevice and inherit from FunctionalMemory
--HG--
extra : convert_revision : e3a65c9debf6f899632d62c70781cbdc2826616b
base/range.hh:
Add a constructor that takes the beginning and end as arguments
size returns T not a bool
quick make_range() function that is a shortcut for making a range
kinda like make_pair()
quick formatting fix
--HG--
extra : convert_revision : 94b1d462710e6fb55e72e1da2ad8c46993af1ef7
to be consistent with the way that the stl works. It also makes
lots of other stuff easier. (Maybe those guys were smart?)
Overload the various comparison operators so that you can test
for overlapping of ranges, etc.
base/range.hh:
Totally rework the Range class. Now the range is from [start, end)
to be consistent with the way that the stl works. It also makes
lots of other stuff easier. (Maybe those guys were smart?)
Overload the various comparison operators so that you can test
for overlapping of ranges, etc.
make parse function private and offer operator= instead
isValid -> valid
and for you erik, I add comments
test/Makefile:
add range.o
test/rangetest.cc:
better tests
--HG--
extra : convert_revision : dd58720aa3d02f20b03e933f2eaa3320c82bb27a
dev/tsunami.cc:
Changed so Tsunami has a pointer to the System to which it belongs.
Now it is derived from generic base class Platform so platform stuff
can be accessed based on the system
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Cleanup and added copyright
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
Added event to skip the "calibrate_delay" function, now calculate
loops_per_jiffy based on frequency, interrupt frequency, and constant
sim/system.hh:
Added pointer to generic Platform base class
--HG--
extra : convert_revision : 5bd925eec220a2ca48eb6164d2ecfdec96922c2c
benchmarks for alpha-linux.
arch/alpha/alpha_linux_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit, times and rt_sigaction.
Should eventually provide a function for times.
arch/alpha/alpha_tru64_process.cc:
Added some more ioctl commands to ignore.
Set unlink and rename to the new functions.
Ignore setrlimit.
sim/syscall_emul.cc:
Added implementations for unlink and rename.
sim/syscall_emul.hh:
Added unlink and rename functions.
Added a couple more ioctl requests to ignore.
Print out the PC of any ioctl commands that fail.
--HG--
extra : convert_revision : 8af21c7fa7d0645d3f9324c9ce70ad33590c3c8e
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami.cc:
dev/tsunami.hh:
A bunch of changes to clean up new PCI code and to fix build
--HG--
extra : convert_revision : 71063bcc565c50fc293b323ddce2c8e701f544ff
execution pipeline (Alpha trapb & excb).
Add support for write memory barriers (mostly impacts
store buffer).
Add StaticInst flag to indicate memory barriers, though
this is not modeled in the pipeline yet.
arch/alpha/isa_desc:
Implement trapb, excb, mb, and wmb as insts with
no execution effect (empty execute() function) but
with flags that indicate their side effects.
Also make sure every instruction that needs to go to
the execute stage has a real opClass value, since we
are now using No_OpClass to signal insts that can get
dropped at dispatch.
StaticInst::branchTarget() is now a const method.
cpu/static_inst.hh:
Add flags to indicate serializing insts (trapb, excb) and
memory and write barriers.
Also declare some StaticInst methods as const methods.
dev/etherlink.hh:
sim/eventq.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_object.hh:
Make name() return value const.
--HG--
extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c
The last change only caught the ones with types that
started with capitals. This pass catches the rest
(mostly STL and uint*_t types).
base/cprintf_formats.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/serialize.cc:
sim/serialize.hh:
Change "foo_t& foo" to "foo_t &foo".
--HG--
extra : convert_revision : fc7f7425db2aef33e490f952b5ce74c8c36d0d41
