mereged some comments with some of andrews changes

--HG--
extra : convert_revision : 8b3d1b2fe15eeb7d97462dac0043ca6b0863f6e6

dev/tsunami.cc

@@ -78,7 +78,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Tsunami)
     INIT_PARAM(ethernet, "ethernet controller"),
     INIT_PARAM(cons, "system console"),
     INIT_PARAM(intrctrl, "interrupt controller"),
-    INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1200)
+    INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1024)
 
 END_INIT_SIM_OBJECT_PARAMS(Tsunami)
 

dev/tsunami.hh

@@ -28,8 +28,8 @@
 
 /**
  * @file
- * Declaration of top level class for the Tsunami chipset. This class just retains pointers
- * to all its children so the children can communicate
+ * Declaration of top level class for the Tsunami chipset. This class just
+ * retains pointers to all its children so the children can communicate.
  */
 
 #ifndef __TSUNAMI_HH__
@@ -83,8 +83,8 @@ class Tsunami : public SimObject
       */
     TsunamiPChip *pchip;
 
-    /** Pointer to the PCI Config Space
-      * The config space in Tsunami all needs to return
+    /** Pointer to the Tsunami PCI Config Space
+      * The config space in tsunami all needs to return
       * -1 if a device is not there.
       */
     PCIConfigAll *pciconfig;
@@ -97,10 +97,15 @@ class Tsunami : public SimObject
   public:
     /**
       * Constructor for the Tsunami Class.
-      * @param
+      * @param name name of the object
+      * @param scsi pointer to scsi controller object
+      * @param con pointer to the console
+      * @param intrcontrol pointer to the interrupt controller
+      * @param intrFreq frequency that interrupts happen
       */
-    Tsunami(const std::string &name, EtherDev *ethernet, SimConsole *con,
-            IntrControl *intctrl, int intrFreq);
+    Tsunami(const std::string &name, AdaptecController *scsi,
+               EtherDev *ethernet,
+               SimConsole *con, IntrControl *intctrl, int intrFreq);
 
     virtual void serialize(std::ostream &os);
     virtual void unserialize(Checkpoint *cp, const std::string &section);

dev/tsunami_cchip.cc

@@ -1,7 +1,7 @@
 /* $Id$ */
 
 /* @file
- * Tsunami CChip (processor, memory, or IO)
+ * Emulation of the Tsunami CChip CSRs
  */
 
 #include <deque>

dev/tsunami_cchip.hh

@@ -27,7 +27,7 @@
  */
 
 /* @file
- * Turbolaser system bus node (processor, memory, or IO)
+ * Emulation of the Tsunami CChip CSRs
  */
 
 #ifndef __TSUNAMI_CCHIP_HH__
@@ -44,10 +44,30 @@ class TsunamiCChip : public MmapDevice
   public:
 
   protected:
+      /**
+       * pointer to the tsunami object.
+       * This is our access to all the other tsunami
+       * devices.
+       */
     Tsunami *tsunami;
+
+    /**
+     * The dims are device interrupt mask registers.
+     * One exists for each CPU, the DRIR X DIM = DIR
+     */
     uint64_t dim[Tsunami::Max_CPUs];
+
+    /**
+     * The dirs are device interrupt registers.
+     * One exists for each CPU, the DRIR X DIM = DIR
+     */
     uint64_t dir[Tsunami::Max_CPUs];
     bool dirInterrupting[Tsunami::Max_CPUs];
+
+    /**
+     * This register contains bits for each PCI interrupt
+     * that can occur.
+     */
     uint64_t drir;
 
   public: