Commit graph

62 commits

Author SHA1 Message Date
Steve Reinhardt 5a1eb9049d Support for Serializable non-SimObject things like events.
Can now serialize & unserialize DmaRequestEvents and DmaTransferEvents.
Also support serialize/unserialize of pointers to SimObjects and
other Serializable objects.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Events get serialized by the event queue only if they're marked
    as AutoSerialize... others are assumed to be serialized by something
    else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
    Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
    Define Checkpoint object to encapsulate everything you need to know
    about a checkpoint.  Use it to allow lookups of named Serializable
    objects (and SimObjects) during unserialization.
    unserialize() now takes a Checkpoint* instead of an IniFile*.

--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
2003-10-29 21:45:39 -08:00
Steve Reinhardt 1511370d09 More progress on checkpointing... we can now write out a checkpoint and read it back in,
though most objects don't actually serialize any data.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    Change unserialize param from IniFile& to const IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    Change unserialize param from IniFile& to const IniFile*.
    Make unserialize call ExecContext::unserialize.
sim/eventq.cc:
    Rename MainEventQueue (no spaces) for easier parsing in checkpoints.
    Disable event serialization for now, so we can focus on the easy stuff.
sim/serialize.cc:
    Change paramIn and arrayParamIn param from IniFile& to const IniFile*.
sim/serialize.hh:
    Change unserialize, paramIn, and arrayParamIn params from IniFile& to const IniFile*.

--HG--
extra : convert_revision : 6e8853ed375eddec0e140c95a01dd51bd225f7b9
2003-10-29 00:41:24 -08:00
Steve Reinhardt b90f810575 Revamp serialization to make it easier.
--HG--
extra : convert_revision : c57a538d7cf606dbdf5fa244f92da46bd830e335
2003-10-28 12:55:12 -08:00
Steve Reinhardt 91cb532f9f Make FullCPU schedule its TickEvent when one of its contexts becomes active.
This fixes detailed-mpboot, which was broken as of my last change.
Also clean up some of the ExecContext status initialization.

cpu/base_cpu.hh:
    CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
    which execContext had the status change.
    BaseCPU::registerExecContexts() no longer needs to be virtual.
cpu/exec_context.cc:
    Initialize _status directly... don't use setStatus() as this will notify the CPU
    of the change before it is ready.
    CPU::execCtxStatusChg() now takes thread_num as an arg so the CPU knows
    which execContext had the status change.
cpu/exec_context.hh:
    Don't need initStatus() any more.
cpu/simple_cpu/simple_cpu.cc:
    Move execCtxStatusChg() from header to .cc file.
    No longer need specialized version of registerExecContexts to schedule TickEvent.
cpu/simple_cpu/simple_cpu.hh:
    Move execCtxStatusChg() from header to .cc file.
    CPU::execCtxStatusChg() now takes thread_num as arg (must be 0 for SimpleCPU).
    No longer need specialized version of registerExecContexts to schedule TickEvent.
kern/tru64/tru64_system.cc:
    Don't need initRegs; the PC etc. get initialized in the CPU constructor.
    ExecContexts start out as Unallocated, so no need to set them to Unallocated here.
kern/tru64/tru64_system.hh:
    Don't need initRegs; the PC etc. get initialized in the CPU constructor.
sim/prog.cc:
    ExecContexts start out as Unallocated, so no need to set them to Unallocated here.

--HG--
extra : convert_revision : e960ebbeb845960344633798e251b6c8bf1c0378
2003-10-24 23:02:36 -07:00
Steve Reinhardt cc9a838f4c Merge stever@zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : b0f93bd35d767fd3a520a9fed70a71d40b0056db
2003-10-23 19:09:18 -07:00
Steve Reinhardt f5da73b688 Initial support for CPU switching. New SamplingCPU object encompasses a set
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet).  Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time.  Also worked at making behavior and naming
in System and Process objects more consistent.

arch/alpha/ev5.cc:
    Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
    Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
    Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
    Support for ExecContext switching.
    Renamed contexts array to execContexts to be consistent with Process.
    CPU ID now auto-assigned by system object.
    Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
    Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
    Support for ExecContext switching.
    CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
    Support for ExecContext switching.
    Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
    Support for ExecContext switching.
    Renamed xcvec array to execContexts to be consistent with Process.

--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
2003-10-23 19:07:52 -07:00
Erik Hallnor 320540829d Move to non-architecture specific MemReq
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/pc_event.hh:
    Move to non architecture specific MemReq

--HG--
extra : convert_revision : 2445943b6f1c8af86b90cfa9c2f9b1eb4a6a1aa2
2003-10-23 16:40:08 -04:00
Steve Reinhardt 83d32482dc Add comment to elaborate on store-conditional result code (and remove
stale reference to machine.def).

arch/alpha/isa_desc:
    Add comment describing store-conditional result code
cpu/exec_context.hh:
    update comments

--HG--
extra : convert_revision : ac59e0ad7a9440cb6656617fdf05495b59c68f55
2003-10-18 21:21:14 -07:00
Nathan Binkert 8dd080032b Global whitespace fixes
Mainly removing whitespace at the end of lines.
This will reduce future diffs/conflicts.
Also adding a space after if, while, and for

This was all accomplished with:
#!/usr/bin/perl -pi~
s/[ 	]+$//;           # there is a space and a tab in the brackets
s/if\(/if (/g;
s/for\(/for (/g;
s/while\(/while (/g;

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/fake_syscall.cc:
arch/alpha/isa_traits.hh:
arch/alpha/vtophys.cc:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/dbl_list.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inifile.cc:
base/intmath.cc:
base/intmath.hh:
base/misc.cc:
base/mod_num.hh:
base/pollevent.cc:
base/random.cc:
base/random.hh:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/loader/coff_sym.h:
base/loader/coff_symconst.h:
base/loader/ecoff_object.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/str.hh:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/intr_control.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
cpu/full_cpu/op_class.hh:
cpu/full_cpu/smt.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherint.cc:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/pcireg.h:
docs/stl.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/printf.cc:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_object.cc:
sim/sim_time.cc:
sim/sim_time.hh:
sim/system.cc:
test/bitvectest.cc:
test/circletest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/sized_test.cc:
test/stattest.cc:
test/symtest.cc:
util/tap/tap.cc:
util/term/term.c:
    formatting fixes

--HG--
extra : convert_revision : 01e6dbc9615c5d0e923502b8410a416c0434cdf6
2003-10-15 16:39:37 -04:00
Nathan Binkert f94ff9ace5 Split up kernel.cc into separate files for dump_mbuf and printf
cpu/exec_context.hh:
dev/alpha_console.cc:
sim/system.cc:
sim/system.hh:
    Convert from fixed array to a vector
arch/alpha/arguments.hh:
    now that CopyData and CopyString are in vtophys.hh, this
    include is not necessary
arch/alpha/vtophys.hh:
    Include isa_traits.hh for Addr
cpu/pc_event.cc:
    Temporarily get this working while we're changing things

--HG--
extra : convert_revision : 9a7597b7bd5d050819766f8edf7a02f28447b9ca
2003-10-13 17:24:27 -04:00
Steve Reinhardt 25693e9e69 Make include paths explicit and update makefile accordingly.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/fake_syscall.cc:
arch/alpha/faults.cc:
arch/alpha/isa_desc:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/circlebuf.cc:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/fast_alloc.cc:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/exec_aout.h:
base/loader/exec_ecoff.h:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/pollevent.cc:
base/pollevent.hh:
base/random.cc:
base/random.hh:
base/range.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/statistics.cc:
base/statistics.hh:
base/str.cc:
base/trace.cc:
base/trace.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
sim/debug.cc:
sim/eventq.cc:
sim/eventq.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/prog.cc:
sim/prog.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/sim_time.cc:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/tap/tap.cc:
    Make include paths explicit.

--HG--
extra : convert_revision : 941cbdc591fd4d3d1d9f095cd58fc23dd2d73840
2003-10-10 11:09:00 -07:00
Steve Reinhardt 52b31ea0a6 File moves for the reorg. Tree is in broken state until I commit the makefile and
#include changes.

--HG--
rename : sim/cache/lzss_compression.cc => base/compression/lzss_compression.cc
rename : sim/cache/lzss_compression.hh => base/compression/lzss_compression.hh
rename : sim/cache/null_compression.hh => base/compression/null_compression.hh
rename : sim/hybrid_pred.cc => base/hybrid_pred.cc
rename : sim/hybrid_pred.hh => base/hybrid_pred.hh
rename : base/aout_object.cc => base/loader/aout_object.cc
rename : base/aout_object.hh => base/loader/aout_object.hh
rename : base/coff_sym.h => base/loader/coff_sym.h
rename : base/coff_symconst.h => base/loader/coff_symconst.h
rename : base/ecoff_object.cc => base/loader/ecoff_object.cc
rename : base/ecoff_object.hh => base/loader/ecoff_object.hh
rename : base/elf_object.cc => base/loader/elf_object.cc
rename : base/elf_object.hh => base/loader/elf_object.hh
rename : base/exec_aout.h => base/loader/exec_aout.h
rename : base/exec_ecoff.h => base/loader/exec_ecoff.h
rename : base/object_file.cc => base/loader/object_file.cc
rename : base/object_file.hh => base/loader/object_file.hh
rename : base/symtab.cc => base/loader/symtab.cc
rename : base/symtab.hh => base/loader/symtab.hh
rename : sim/predictor.hh => base/predictor.hh
rename : sim/sat_counter.cc => base/sat_counter.cc
rename : sim/sat_counter.hh => base/sat_counter.hh
rename : sim/base_cpu.cc => cpu/base_cpu.cc
rename : sim/base_cpu.hh => cpu/base_cpu.hh
rename : sim/exec_context.cc => cpu/exec_context.cc
rename : sim/exec_context.hh => cpu/exec_context.hh
rename : sim/exetrace.cc => cpu/exetrace.cc
rename : sim/exetrace.hh => cpu/exetrace.hh
rename : sim/op_class.hh => cpu/full_cpu/op_class.hh
rename : sim/smt.hh => cpu/full_cpu/smt.hh
rename : sim/inst_seq.hh => cpu/inst_seq.hh
rename : sim/intr_control.cc => cpu/intr_control.cc
rename : sim/intr_control.hh => cpu/intr_control.hh
rename : sim/memtest.cc => cpu/memtest/memtest.cc
rename : sim/memtest.hh => cpu/memtest/memtest.hh
rename : sim/pc_event.cc => cpu/pc_event.cc
rename : sim/pc_event.hh => cpu/pc_event.hh
rename : sim/simple_cpu.cc => cpu/simple_cpu/simple_cpu.cc
rename : sim/simple_cpu.hh => cpu/simple_cpu/simple_cpu.hh
rename : sim/static_inst.cc => cpu/static_inst.cc
rename : sim/static_inst.hh => cpu/static_inst.hh
extra : convert_revision : 05bd41acb2a424f1a38609fd4ac6df681bb479d6
2003-10-10 09:57:26 -07:00
Renamed from sim/exec_context.hh (Browse further)