Commit graph

12 commits

Author SHA1 Message Date
Steve Reinhardt
e1985e0200 More memory system cleanup:
- Get rid of unused ProxyMemory class (replaced by TranslatingPort).
- Get rid of remaining unused prot_* functions.

mem/physical.cc:
mem/physical.hh:
mem/port.hh:
    Get rid of remaining unused prot_* functions.

--HG--
extra : convert_revision : f16c208f4e4c38bd6bb3626339674c9278da9e07
2006-03-12 16:11:41 -05:00
Gabe Black
f102365bfe SimpleCPU compiles with merge.
arch/alpha/isa_traits.hh:
arch/alpha/linux/process.cc:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
base/chunk_generator.hh:
base/loader/elf_object.cc:
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
kern/linux/linux.hh:
kern/tru64/tru64.hh:
mem/packet.hh:
mem/page_table.cc:
mem/page_table.hh:
mem/physical.cc:
mem/request.hh:
mem/translating_port.cc:
sim/process.hh:
sim/system.cc:
    Fixing merged changes.

--HG--
extra : convert_revision : 2e94f21009395db654880fcb94ec806b6f5772c3
2006-03-09 19:21:35 -05:00
Steve Reinhardt
e7f442d527 Simple program runs with sendAtomic!
Ignoring returned latency for now.
Refactored loadSections in ObjectFile hierarchy.

base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
    Have each section record a pointer to image data.
    This allows us to move common loadSections code into ObjectFile.
base/loader/object_file.cc:
    Have each section record a pointer to image data.
    This allows us to move common loadSections code into ObjectFile.
    Also explicitly load BSS now since we need to allocate the
    translations for it in syscall emulation.
cpu/base.hh:
    Don't need memPort (just pass port in to ExecContext constructor).
cpu/exec_context.cc:
cpu/exec_context.hh:
mem/port.cc:
mem/translating_port.cc:
mem/translating_port.hh:
    Pass syscall emulation Port into constructor instead of
    getting it from BaseCPU.
cpu/simple/cpu.cc:
    Explicitly choose one of three timing models.
    Statically allocate request and packet objects when possible.
    Several more minor bug fixes.
    Works for simple program with SIMPLE_CPU_MEM_IMMEDIATE model now.
    Probably have memory leaks with SIMPLE_CPU_MEM_TIMING (if it works at all).
    Pass syscall emulation Port into constructor instead of
    getting it from BaseCPU.
cpu/simple/cpu.hh:
    Explicitly choose one of three timing models.
    Statically allocate request and packet objects when possible.
    Pass syscall emulation Port into constructor instead of
    getting it from BaseCPU.
mem/physical.cc:
    Set packet result field.

--HG--
extra : convert_revision : 359d0ebe4b4665867f4e26e7394ec0f1d17cfc26
2006-03-02 10:31:48 -05:00
Steve Reinhardt
22504f8b48 More progress toward actually running a program.
See configs/test.py for test config (using simple
binary in my home directory on zizzer).

base/chunk_generator.hh:
    Fix assertion for chunkSize == 0 (not a power of 2)
base/intmath.hh:
    Fix roundDown to take integer alignments.
cpu/base.cc:
    Register exec contexts regardless of state (not sure why
    this check was in here in the first place).
mem/physical.cc:
    Add breaks to switch.
python/m5/objects/BaseCPU.py:
    Default mem to Parent.any (e.g. get from System).
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
    HierParams is gone.
python/m5/objects/PhysicalMemory.py:
    mmu param is full-system only.
sim/process.cc:
    Stack mapping request must be page-aligned and page-sized.
    Don't delete objFile object in create since we are counting
    on it being around for startup().

--HG--
extra : convert_revision : 90c43ee927e7d82a045d6e10302d965797d006f7
2006-03-01 18:45:50 -05:00
Ron Dreslinski
b6247c9ea7 Add support for multiple ports on the memory. Hook up simple cpu to memory.
Ready to start testing if I could fix the linking errors I can't ever seem to fix.

cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Add connecting of ports until builder can handle it.
mem/physical.cc:
    Add function to allocate a port in the object

    Remove some full_sys stuff untill needed
mem/physical.hh:
    Add function to allocate a port in the object
python/m5/objects/BaseCPU.py:
    Update the params
sim/process.cc:
    Make sure to use the right name (hopefully CPU constructor already called)

--HG--
extra : convert_revision : 4089caf20d7eb53e5463c8ac93ddce5e43ea5d85
2006-02-23 17:02:34 -05:00
Ron Dreslinski
8fc06589cb Update functional memory to have a response event
Clean out old memory python files, move them into old_mem directory.  Maybe we should just delete them, they are under revision control.

Add new py files for new objects.

SConscript:
    Update because memory is just a header file now
base/chunk_generator.hh:
    Make Chunk Generator return the entire size if the chunk_size is set to zero.  Useful when trying to chunck on blocksize of memory, which can write large pieces of data.
cpu/simple/cpu.cc:
    Make sure to delete the pkt.
mem/physical.cc:
mem/physical.hh:
    Set up response event.
mem/port.cc:
    Rename rqst to req to conform to same standard naming convention.
python/m5/objects/PhysicalMemory.py:
    Update the params, inheritence

--HG--
extra : convert_revision : 857154ec256522baf423b715833930497999549b
2006-02-23 13:51:54 -05:00
Ron Dreslinski
ceac38e41c Remove unneeded functions, moving code around abit.
mem/physical.cc:
    Remove unneeded functions.  Need to add a .toString option for commands to making printing prettier.
mem/physical.hh:
    Remove unneeded functions.

--HG--
extra : convert_revision : 3707d317f542d56c0a0758a2c5ba493b92fb0c87
2006-02-22 17:43:08 -05:00
Ron Dreslinski
b403abfbdb Move the port from base memory object into the physical memory object.
The Memory is now a pure virtual base class for all memory type objects (DRAM, physical).
We should consider renaming MemObject to something more meaningful to represent it is for all memory heirarchy objects, perhaps MemHeirObject?

mem/physical.cc:
mem/physical.hh:
    Move the port from the base class into the actual object.

--HG--
extra : convert_revision : b7754ee7b90fd8f816f9876dce374c1d43c7e34b
2006-02-22 17:29:04 -05:00
Ron Dreslinski
1fff9f504f Some more changes for compilation. Since memset is now part of port and not virtual, no need for memory to define them.
mem/physical.cc:
    Return 0 for block size.  The chunk generator should treat this as a infinite size.
mem/physical.hh:
    Add function prototype
mem/port.hh:
    Fix function to take no arguments
mem/translating_port.cc:
mem/translating_port.hh:
    Remove the memsetBlob because it doesn't exist yet.

--HG--
extra : convert_revision : dfe352acfc2912ecc9a1ba1863e5666f46b991cc
2006-02-21 20:04:23 -05:00
Ron Dreslinski
4bd11c10a5 Add blocksize functions to physical memory. Fix the port we were using in the process loader.
mem/physical.cc:
    Implement the blockSize function, return VMPageSize for the physical memory
mem/port.hh:
    Add a function to get a pointer to a peer, needed for initVirtMem to work in the loader.
sim/process.cc:
    The way the translating port is setup we don't want the memory port, we want the peer port associated with that memory.  We may need to revisit this.

--HG--
extra : convert_revision : 46a51d448d1683db7bd5afe64adbe167a5743060
2006-02-21 13:39:01 -05:00
Ron Dreslinski
7f114ca419 Many changes that make the new mem system compile. Now to convert the rest of the tree to use the new mem system.
mem/mem_object.hh:
    Create constrtor so it compiles
mem/packet.hh:
    Fix typedefs so they compile, add in a few more headers for compilation
mem/page_table.cc:
    convert to new mem system so it compiles
mem/page_table.hh:
    fix it to the version that had asid support.  Make it compile in the new system
mem/physical.cc:
    Fix some compilation bugs
mem/physical.hh:
    Add a type that made compile fail
mem/port.hh:
    Fix a spelling error that messed up compilation
mem/request.hh:
    fix typedefs and forward declerations so it compiles

--HG--
extra : convert_revision : 580fb1ba31ada799ff0122601b8b5a8d994bb8af
2006-02-15 14:21:09 -05:00
Ron Dreslinski
4e36678028 Adding some more things toward having cpu->mem test in place. Still need to work on compilation issues.
mem/physical.cc:
mem/physical.hh:
    Added a stripped down version of the physical memory object

--HG--
extra : convert_revision : 26826fb316f4cac900ec648fa268f1d95bc960f1
2006-02-03 14:54:37 -05:00