Ali Saidi
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b504b44b2f
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CPU: Reset fetch offset after a exception
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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943b77b9bb
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ARM: Decode the VLDR instruction.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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4f130683e0
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ARM: Implement the VLDR instruction.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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dbec303864
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ARM: Decode all the various forms of vmov.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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ff3996b24d
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ARM: Make VFP load/store and 64 bit move decode correspond with CP10 and CP11.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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dd1aedc98b
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ARM: Implement the various versions of VMOV.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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1f059541d6
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ARM: Add a new RegImmOp base class.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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6976b4890a
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ARM: Add a RegRegImmOp base class.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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186cfe3ae3
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ARM: Widen the immediate fields in the misc instruction classes.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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b87ebf382f
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ARM: Add a function to decode VFP modified immediate constants.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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7eb4d02dd9
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ARM: Add a function to decode SIMD modified immediate constants.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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abda50173c
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ARM: Add fp operands to operands.isa.
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2010-06-02 12:58:12 -05:00 |
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Gabe Black
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6365d29c21
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ARM: Decode the VMRS instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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fbf2ad5ae8
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ARM: Update the set of FP related miscregs.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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aade63a8fe
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ARM: Implement the VMRS instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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a8b56b452c
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ARM: Decode the VMSR instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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06008c54eb
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ARM: Implement the VMSR instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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0ff71c7c34
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ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) registers.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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c9c4dfc09d
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ARM: Ignore attempts to disable coprocessors that aren't implemented anyway.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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c3bf29bbea
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ARM: Implement the udiv instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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f3e65c2de2
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ARM: Implement the sdiv instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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5943f0fc84
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ARM: Ignore writing a bad mode to CPSR with MSR.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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ba33db8fd6
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ARM: Decode the CPS instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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7861b084f6
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ARM: Implement the CPS instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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eb1447302d
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ARM: Decode the SRS instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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bb6fea91da
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ARM: Implement the SRS instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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dbee6e0c54
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ARM: Add a base class for SRS.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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239c9af90d
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ARM: Implement a badMode function that says whether a mode is legal.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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a5ea52bb45
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ARM: Allow flattening into any mode.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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698ee26c6b
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ARM: Decode TBB and TBH.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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6fa713a66c
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ARM: Decode the setend instruction.
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2010-06-02 12:58:11 -05:00 |
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Gabe Black
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4683cd1655
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ARM: Define the setend instruction.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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fb23297914
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ARM: Make a base class for instructions that use only an immediate.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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247acd93c4
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ARM: Decode the arm version of ldrexd.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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3ad31f61c2
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ARM: Decode the strex instructions.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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54ab07e636
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ARM: Implement the strex instructions.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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524a8195e1
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ARM: Set CPSR.E to SCTLR.EE on faults.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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683421e0c6
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ARM: Warn about not implementing MPU translation, not panic about MMU.
We'll start out with a stbu version of PMSA and switch over to VMSA for the
full implementation.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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6fb5189c47
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ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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89b1dd5582
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ARM: Allow access to the RGNR register.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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c3381167c9
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ARM: Make the MPUIR register report that 1 unified data region is supported.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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3aa8faf177
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ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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faf6c727f6
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ARM: Respect the E bit of the CPSR when doing loads and stores.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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b6cb6f1874
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ARM: Zero the micropc when vectoring to a fault.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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1d5233958a
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ARM: Implement the V7 version of alignment checking.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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7b397925af
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ARM: Decode the RFE instruction.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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a2cb503ba6
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ARM: Implement the RFE instruction.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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ec4cd00b11
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ARM: Add a base class for the RFE instruction.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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1ada9d4880
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ARM: Make sure some undefined thumb32 instructions fault.
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2010-06-02 12:58:10 -05:00 |
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Gabe Black
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3caa75d53a
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ARM: Squash the low order bits of the PC when performing a regular branch.
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2010-06-02 12:58:10 -05:00 |
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