Commit graph

688 commits

Author SHA1 Message Date
Tony Gutierrez
02cb6b19a7 ruby: fix issue with unused var in DMASequencer
the iterator declared in DMASequencer::ackCallback() is only used in an
assert, this causes clang to fail when building fast. here we move
the find call on the request table directly into the assert.
2016-12-20 11:47:30 -05:00
Jieming Yin
b9c7b8190c ruby: Detect garnet network-level deadlock.
This patch detects garnet network deadlock by monitoring
network interfaces. If a network interface continuously
fails to allocate virtual channels for a message, a
possible deadlock is detected.
2016-12-15 16:59:17 -05:00
Andreas Hansson
c642d6fc37 ruby: Remove RubyMemoryControl and associated files
This patch removes the deprecated RubyMemoryControl. The DRAMCtrl
module should be used instead.
2016-12-05 16:49:07 -05:00
Matthew Poremba
80607a2a1d ruby: Fix overflow reported by ASAN in MessageBuffer.
In MessageBuffer the m_not_avail_count member is incremented but not used.
This causes an overflow reported by ASAN. This patch changes from an int to
Stats::Scalar, since the count is useful in debugging finite MessageBuffers.
2016-12-02 11:40:40 -05:00
Jieming Yin
b0856ab3b1 ruby: Fix potential bugs in garnet2.0
1. Delete unused variable from struct LinkEntry
2. Correct GarnetExtLink and GarnetIntLink inheritance
2016-11-21 15:41:30 -05:00
Tony Gutierrez
f82418acef ruby: add default ctor for MachineID type
not all uses of MachineID initialize its fields, so here we add a default
ctor.
2016-11-21 15:37:07 -05:00
Michael LeBeane
48e43c9ad1 ruby: Allow multiple outstanding DMA requests
DMA sequencers and protocols can currently only issue one DMA access at
a time. This patch implements the necessary functionality to support
multiple outstanding DMA requests in Ruby.
2016-10-26 22:48:37 -04:00
Tony Gutierrez
c7d4afd878 ruby: make a RequestDesc class instead of std::pair
the RequestDesc was previously implemented as a std::pair, which made
the implementation overly complex and error prone. here we encapsulate the
packet, primary, and secondary types all in a single data structure with
all members properly intialized in a ctor
2016-10-26 22:46:58 -04:00
Tushar Krishna
22e6f65d72 ruby: Add M5_VAR_USED before variables used only inside assert in garnet2.0.
This removes errors when building gem5.fast
2016-10-06 21:06:00 -04:00
Tushar Krishna
dbe8892b76 ruby: garnet2.0
Revamped version of garnet with more optimized single-cycle routers,
more configurability, and cleaner code.
2016-10-06 14:35:22 -04:00
Tushar Krishna
b512f4bf71 ruby: remove the original garnet code.
Only garnet2.0 will be supported henceforth.
2016-10-06 14:35:21 -04:00
Tushar Krishna
0962d76827 config: add port directions and per-router delay in topology.
This patch adds port direction names to the links during topology
creation, which can be used for better printed names for the links
or for users to code up their own adaptive routing algorithms.
It also adds support for every router to have an independent latency
value to support heterogeneous topologies with the subsequent
garnet2.0 patch.
2016-10-06 14:35:20 -04:00
Tushar Krishna
003c08fa90 config: make internal links in network topology unidirectional.
This patch makes the internal links within the network topology
unidirectional, thus allowing any deadlock-free routing algorithms to
be specified from the topology itself using weights.
This patch also renames Mesh.py and MeshDirCorners.py to
Mesh_XY.py and MeshDirCorners_XY.py (Mesh with XY routing).
It also adds a Mesh_westfirst.py and CrossbarGarnet.py topologies.
2016-10-06 14:35:18 -04:00
Tushar Krishna
aca869bf2d ruby: rename ALPHA_Network_test protocol to Garnet_standalone.
Over the past 6 years, we realized that the protocol is essentially used
to run the garnet network in a standalone manner, and feed standard synthetic
traffic patterns through it.
2016-10-06 14:35:14 -04:00
Brad Beckmann
ee78758857 ruby: correct size for partial memory writes
Fixed AbstractController::queueMemoryWritePartial to specify the
correct size for partial memory writes.
2016-09-29 01:06:52 -04:00
Andreas Sandberg
26dc0017d2 ruby: Implement support for functional accesses to PIO ranges
There are cases where we want to put boot ROMs on the PIO bus. Ruby
currently doesn't support functional accesses to such memories since
functional accesses are always assumed to go to physical memory. Add
the required support for routing functional accesses to the PIO bus.

Change-Id: Ia5b0fcbe87b9642bfd6ff98a55f71909d1a804e3
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Brad Beckmann <brad.beckmann@amd.com>
Reviewed-by: Michael LeBeane <michael.lebeane@amd.com>
2016-08-10 15:27:13 +01:00
Matthew Poremba
134824e847 ruby: Fix double statistic registration in garnet
Currently garnet will not run due to double statistic registration of new
stats in ClockedObject. This occurs because a temporary array named 'cls'
is being added as a child to garnet internal and external link SimObjects.
This patch simply renames the temporary array which prevents it from
being added as a child object and avoids the assertion that a statistic
was already registered.

Committed by Jason Lowe-Power <jason@lowepower.com>
2016-07-01 10:31:37 -05:00
David Guillen Fandos
70798b1ba0 stats: Fixing regStats function for some SimObjects
Fixing an issue with regStats not calling the parent class method
for most SimObjects in Gem5. This causes issues if one adds new
stats in the base class (since they are never initialized properly!).

Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06 17:16:43 +01:00
Marco Elver
289a8ebdb1 ruby: Implement SwapReq support
This implements SwapReq for Ruby memory.

A SwapReq should be treated like a write, except that the response
packet contains the overwritten data.

Note that, in particular, the conditional checking for isStore/isLoad
needs to be reversed, as a SwapReq is both.
2016-06-03 16:20:08 -04:00
Matthew Poremba
67e93a5846 ruby: Rename pkt to m_pkt so it may be accessed via SLICC
Allow usage of packet class in ruby for convenience purposes. This may be
used to access members of the packet/request class (e.g., via helper
functions) and/or push protocol specific information to the packets
SenderState without needing to modify SLICC types and protocols in multiple
locations.
2016-04-26 12:07:51 -04:00
Joel Hestness
39e10ced03 ruby: Fix block_on behavior
Ruby's controller block_on behavior aimed to block MessageBuffer requests into
SLICC controllers when a Locked_RMW was in flight. Unfortunately, this
functionality only partially works: When non-Locked_RMW memory accesses are
issued to the sequencer to an address with an in-flight Locked_RMW, the
sequencer may pass those accesses through to the controller. At the controller,
a number of incorrect activities can occur depending on the protocol. In
MOESI_hammer, for example, an intermediate IFETCH will cause an L1D to L2
transfer, which cannot be serviced, because the block_on functionality blocks
the trigger queue, resulting in a deadlock. Further, if an intermediate store
arrives (e.g. from a separate SMT thread), the sequencer allows the request
through to the controller, and the atomicity of the Locked_RMW may be broken.

To avoid these problems, disallow the Sequencer from passing any memory
accesses to the controller besides Locked_RMW_Write when a Locked_RMW is in-
flight.
2016-04-15 12:34:02 -05:00
Andreas Hansson
8127c4e7bf misc: Fix issues flagged by gcc 6
A few warnings (and thus errors) pop up after being added to -Wall:

1. -Wmisleading-indentation

In the auto-generated code there were instances of if/else blocks that
were not indented to gcc's liking. This is addressed by adding braces.

2. -Wshift-negative-value

gcc is clever enougn to consider ~0 a negative constant, and
rightfully complains. This is addressed by using mask() which
explicitly casts to unsigned before shifting.

That is all. Porting done.
2016-04-13 12:13:44 -04:00
Andreas Sandberg
fd52a63e24 Revert to 74c1e6513bd0 (sim: Thermal support for Linux) 2016-04-07 10:42:07 +01:00
Akash Bagdia
3ee4957b49 power: Add power states to ClockedObject
Add 4 power states to the ClockedObject, provides necessary access functions
to check and update the power state. Default power state is UNDEFINED, it is
responsibility of the respective simulation model to provide the startup state
and any other logic for state change.

Add number of transition stat.
Add distribution of time spent in clock gated state.
Add power state residency stat.

Add dump call back function to allow stats update of distribution and residency
stats.
2014-11-18 14:00:48 +00:00
Andreas Hansson
4619f0ee8b scons: Add missing override to appease clang
Make clang happy...again.
2016-02-23 03:27:20 -05:00
Tony Gutierrez
5a88f0931f ruby: move range change send from RubyPort to derived classes. 2016-02-18 10:50:16 -05:00
Tony Gutierrez
969babd26f ruby: send address ranges from RubyPort 2016-02-17 11:31:54 -05:00
Andreas Hansson
0d50979888 misc: Add missing overrides to appease clang
Since the last round of fixes a few new issues have snuck in. We
should consider switching the regression runs to clang.
2016-02-15 03:40:32 -05:00
Michael LeBeane
b181cea364 ruby: make DMASequencer inherit from RubyPort
This patch essentially rolls back 10518:30e3715c9405 to make RubyPort the
parent class of DMASequencer.  It removes redundant code and restores some
features which were lost when directly inheriting from MemObject.  For
example,
DMASequencer can now communicate to other devices using PIO, which is useful
for memmory-mapped communication between multiple DMADevices.
2016-02-14 20:28:48 -05:00
Steve Reinhardt
f6b828d068 style: eliminate explicit boolean comparisons
Result of running 'hg m5style --skip-all --fix-control -a' to get
rid of '== true' comparisons, plus trivial manual edits to get
rid of '== false'/'== False' comparisons.

Left a couple of explicit comparisons in where they didn't seem
unreasonable:
invalid boolean comparison in src/arch/mips/interrupts.cc:155
>>        DPRINTF(Interrupt, "Interrupts OnCpuTimerINterrupt(tc) == true\n");<<
invalid boolean comparison in src/unittest/unittest.hh:110
>>            "EXPECT_FALSE(" #expr ")", (expr) == false)<<
2016-02-06 17:21:20 -08:00
Steve Reinhardt
5592798865 style: fix missing spaces in control statements
Result of running 'hg m5style --skip-all --fix-control -a'.
2016-02-06 17:21:19 -08:00
Steve Reinhardt
dc8018a5c3 style: remove trailing whitespace
Result of running 'hg m5style --skip-all --fix-white -a'.
2016-02-06 17:21:18 -08:00
David Hashe
698866d461 ruby: split CPU and GPU latency stats 2015-07-20 09:15:18 -05:00
Tony Gutierrez
1a7d3f9fcb gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
Tony Gutierrez
28e353e040 mem: write combining for ruby protocols
This patch adds support for write-combining in ruby.
2016-01-19 14:05:03 -05:00
Blake Hechtman
34fb6b5e35 mem: misc flags for AMD gpu model
This patch add support to mark memory requests/packets with attributes defined
in HSA, such as memory order and scope.
2015-07-20 09:15:18 -05:00
Andreas Hansson
12eb034378 scons: Enable -Wextra by default
Make best use of the compiler, and enable -Wextra as well as
-Wall. There are a few issues that had to be resolved, but they are
all trivial.
2016-01-11 05:52:20 -05:00
Andreas Hansson
0fcb376e5f mem: Make cache terminology easier to understand
This patch changes the name of a bunch of packet flags and MSHR member
functions and variables to make the coherency protocol easier to
understand. In addition the patch adds and updates lots of
descriptions, explicitly spelling out assumptions.

The following name changes are made:

* the packet memInhibit flag is renamed to cacheResponding

* the packet sharedAsserted flag is renamed to hasSharers

* the packet NeedsExclusive attribute is renamed to NeedsWritable

* the packet isSupplyExclusive is renamed responderHadWritable

* the MSHR pendingDirty is renamed to pendingModified

The cache states, Modified, Owned, Exclusive, Shared are also called
out in the cache and MSHR code to make it easier to understand.
2015-12-31 09:32:58 -05:00
Brad Beckmann
173a786921 ruby: more flexible ruby tester support
This patch allows the ruby random tester to use ruby ports that may only
support instr or data requests.  This patch is similar to a previous changeset
(8932:1b2c17565ac8) that was unfortunately broken by subsequent changesets.
This current patch implements the support in a more straight-forward way.
Since retries are now tested when running the ruby random tester, this patch
splits up the retry and drain check behavior so that RubyPort children, such
as the GPUCoalescer, can perform those operations correctly without having to
duplicate code.  Finally, the patch also includes better DPRINTFs for
debugging the tester.
2015-07-20 09:15:18 -05:00
Brad Beckmann
95f20a2905 ruby: added stl vector of ints to be used by SLICC 2015-07-20 09:15:20 -05:00
Tony Gutierrez
d10fac27bc slicc: fixes for the Address to Addr changeset (11025)
misc changes now that Address has become Addr including int to address util
function
2015-11-13 17:30:58 -05:00
Joe Gross
5143d480f3 ruby: add BoolVec
The BoolVec typedef and insertion operator overload function simplify usage of
vectors of type bool
2015-11-13 17:30:56 -05:00
Andreas Hansson
2cb5467e85 misc: Appease clang static analyzer
A few minor fixes to issues identified by the clang static analyzer.
2015-11-06 03:26:16 -05:00
Nilay Vaish
4453537ead ruby: profiler: provide the number of vnets through ruby system
The aim is to ultimately do away with the static function
Network::getNumberOfVirtualNetworks().
2015-10-14 00:29:43 -05:00
Nilay Vaish
f1b6d1913c ruby: remove unused functionalRead() function.
Not required since functional reads cannot rely on messages that are inflight.
2015-10-14 00:29:39 -05:00
Nilay Vaish
7defb594b3 ruby: garnet: flexible: refactor flit 2015-10-14 00:29:38 -05:00
Andreas Hansson
2ac04c11ac misc: Add explicit overrides and fix other clang >= 3.5 issues
This patch adds explicit overrides as this is now required when using
"-Wall" with clang >= 3.5, the latter now part of the most recent
XCode. The patch consequently removes "virtual" for those methods
where "override" is added. The latter should be enough of an
indication.

As part of this patch, a few minor issues that clang >= 3.5 complains
about are also resolved (unused methods and variables).
2015-10-12 04:08:01 -04:00
Andreas Hansson
22c04190c6 misc: Remove redundant compiler-specific defines
This patch moves away from using M5_ATTR_OVERRIDE and the m5::hashmap
(and similar) abstractions, as these are no longer needed with gcc 4.7
and clang 3.1 as minimum compiler versions.
2015-10-12 04:07:59 -04:00
Joel Hestness
c05d268cfa ruby: Fix CacheMemory allocate leak
If a cache entry permission was previously set to NotPresent, but the entry was
not deleted, a following cache allocation can cause the entry to be leaked by
setting the entry pointer to a newly allocated entry. To eliminate this
possibility, check if the new entry is different from the old one, and if so,
delete the old one.
2015-09-29 09:28:26 -05:00
Joel Hestness
b80024ee7d ruby: RubyPort delete snoop requests
In RubyPort::ruby_eviction_callback, prior changes fixed a memory leak caused
by instantiating separate packets for each port that the eviction was forwarded
to. That change, however, left the instantiated request to also leak. Allocate
it on the stack to avoid the leak.
2015-09-29 09:28:25 -05:00