6 commits

Author	SHA1	Message	Date
Ali Saidi	021421d663	Config: Remove some ini file code that no longer works ... --HG-- extra : convert_revision : cb01dc0abeabc97b03d7af10959d92ceb62ea936	2007-09-04 13:12:58 -04:00
Ali Saidi	464a51e29e	Ports: Only try to do EthPort stuff in full system. ... --HG-- extra : convert_revision : 9ea093ea7c9ab22f8467c5cd5d55b66c71eb3427	2007-08-17 04:20:02 -04:00
Ali Saidi	773cb77656	Devices: Make EtherInts connect in the same way memory ports currently do. ... --HG-- extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2	2007-08-16 16:49:02 -04:00
Nathan Binkert	abc76f20cb	Major changes to how SimObjects are created and initialized. Almost all ... creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed	2007-07-23 21:51:38 -07:00
Steve Reinhardt	0305159abf	PhysicalMemory has vector of uniform ports instead of one special one. ... configs/example/memtest.py: PhysicalMemory has vector of uniform ports instead of one special one. Other updates to fix obsolete brokenness. src/mem/physical.cc: src/mem/physical.hh: src/python/m5/objects/PhysicalMemory.py: Have vector of uniform ports instead of one special one. src/python/swig/pyobject.cc: Add comment. --HG-- extra : convert_revision : a4a764dcdcd9720bcd07c979d0ece311fc8cb4f1	2007-05-19 00:24:34 -04:00
Nathan Binkert	ffe6bebb05	Factor code out of main.cc and main.i into a bunch of files ... so things are organized in a more sensible manner. Take apart finalInit and expose the individual functions which are now called from python. Make checkpointing a bit easier to use. --HG-- extra : convert_revision : f470ddabbb47103e7b4734ef753c40089f2dcd9d	2007-03-02 22:24:00 -08:00