Commit graph

5004 commits

Author SHA1 Message Date
Nathan Binkert
087a2ed6a1 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest

--HG--
extra : convert_revision : 2a258d16ba51ce34f5748825a94b456abfb577cc
2004-02-25 16:13:00 -05:00
Nathan Binkert
b678152277 Fix stats debugging and always compile it in for the
debug target

--HG--
extra : convert_revision : aa16e6256a056e6df9affec6fd973e62e812e23c
2004-02-25 16:12:48 -05:00
Lisa Hsu
6a306d4caf add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process).
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    same thing for simple cpu's.

--HG--
extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
2004-02-24 14:59:25 -05:00
Steve Reinhardt
f9c91277f3 Quote args properly in tracediff.
util/tracediff:
    Quote simulator args so args with spaces get handled correctly.

--HG--
extra : convert_revision : b48677bc712be17e6e50ca35680e757ba9364692
2004-02-23 08:07:32 -08:00
Nathan Binkert
6d574e9cff Only one request may be on the dma interface at a time,
so add some states to indicate that the dma read/write
hasn't issued yet, and add some support to reissue the
request when the interface becomes unblocked.

--HG--
extra : convert_revision : 448695a8eb2e9f98554769f3165df1f796adf44a
2004-02-23 02:49:09 -05:00
Nathan Binkert
cc863129b8 extend the hack by turning the address into a real
physical address

--HG--
extra : convert_revision : 9f752d5ab6def492056d4dfe0bda5eecb022ba80
2004-02-23 02:46:47 -05:00
Nathan Binkert
220952d592 Don't issue memory requests for bogus addresses
--HG--
extra : convert_revision : 786b7fa503436f9a269ebeaedf152c6364874ab5
2004-02-23 02:46:04 -05:00
Nathan Binkert
052e0e3116 Make this like PCI-X
--HG--
extra : convert_revision : 59eaf2c548a88df075b13e78aaa7a4377f20e6c8
2004-02-23 02:44:22 -05:00
Nathan Binkert
bc5ed80b32 configurable latency for programmed IO
fix serialization

dev/etherlink.cc:
    fix serialization

--HG--
extra : convert_revision : 6739001f3f97b745d9874bb4c5729cc4909625c2
2004-02-22 18:09:11 -05:00
Andrew Schultz
c82113d022 Load local kernel symbols, and set aic7xxx_no_reset to prevent an initial
(very painful) bus reset from occuring

base/loader/elf_object.cc:
    Fixed to allow proper loading of local symbols

--HG--
extra : convert_revision : 5c9a1f4d7b5748a1c8cabdfd67763c21f988f8fd
2004-02-21 20:31:08 -05:00
Andrew Schultz
43787ad863 Added initial (hackish) support for translating between a PCI bus address
and a physical memory address for DMA

dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
    Changed registers to array and added mapping function to translate between
    PCI bus space and physical address space

--HG--
extra : convert_revision : e9dc4de4e7effe8e8e2365298843d6f767b5a289
2004-02-21 20:29:38 -05:00
Andrew Schultz
7f069e7bdb Merge zizzer:/bk/linux
into zizzer.eecs.umich.edu:/z/alschult/DiskModel/m5

--HG--
extra : convert_revision : 9c69ae2810bef16e0e6625b1977588204e7b19e3
2004-02-21 14:30:06 -05:00
Andrew Schultz
6ff8c35e02 Rewrite of AdaptecController
--HG--
extra : convert_revision : 0a795251653c999eb099d192392302a7939f24d0
2004-02-21 14:29:59 -05:00
Nathan Binkert
e067bc751b Change order of serialization
sim/sim_object.cc:
    serialize objects in the reverse order of their creation.
    This causes a SimObject that is dependent on another
    to be serialized first.  For example, the ethernet device
    writes back some data to physical memory while serializing,
    so this will cause the physical memory to be serialized
    after that, preserving the data written back.

--HG--
extra : convert_revision : f9a37b63ce777df1cfecefa80f94f8fc69e42448
2004-02-21 10:46:31 -05:00
Nathan Binkert
610081079c New Ethernet device. Descriptors are now done via DMA instead
of faking it.  Renamed stuff to follow our style.  Lots of
general cleanup.

dev/etherpkt.hh:
    fix up includes

--HG--
extra : convert_revision : fb3a21466cdae00f8747d6e3027c9f2c63569c48
2004-02-21 10:43:37 -05:00
Ron Dreslinski
4362b42cce Create a mp test for linux-boot, make the other ini files more modular
for other mp testbenches

--HG--
extra : convert_revision : a962c67f63d059d25077a1bd4278f0d04737da04
2004-02-20 16:53:54 -05:00
Ron Dreslinski
4768c72964 Fix the RTC code so it is in the cchip, only interrupt processors that
are present

dev/tsunami_cchip.cc:
    Only need to interrupt processors that are there
    Move RTC interrupt code into a function
dev/tsunami_cchip.hh:
    Make a RTC interrupt function, move variables out of public scope
dev/tsunami_io.cc:
    Make a call to the RTC interrupt routine instead

--HG--
extra : convert_revision : 88113664d0e54a7dddc00ec11ff9b9d088232b31
2004-02-20 16:51:19 -05:00
Nathan Binkert
a1259a4fcf Add a simple event wrapper class that takes a class pointer
and member function and will schedule it for the future.

--HG--
extra : convert_revision : f5c5a8df0839e1e10716850c2086862c4a5bc499
2004-02-20 15:24:21 -05:00
Nathan Binkert
ec06c63cc7 make the dma interface useable.
make it so that pio devices must respond with some delay.

dev/io_device.cc:
    don't forget to include dma_interface.hh so we could use it.
dev/io_device.hh:
    the generic BusInterface isn't enough for doing DMA
    we need the actual DMAInterface

--HG--
extra : convert_revision : 70298d33c8520a3f4ad11aa600825a8cec7e44bf
2004-02-20 15:23:27 -05:00
Nathan Binkert
695d51e513 make uncacheable stuff happen again
cpu/simple_cpu/simple_cpu.cc:
    Allow requests to be uncacheable

--HG--
extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c
2004-02-20 15:22:41 -05:00
Nathan Binkert
38e8cb8df1 make the devices default to being attached to the memory bus
but provide a #define that can be used to put them on
a separate IO bus

--HG--
extra : convert_revision : 75d48f312c503ad67d22319db691ef5a0de12996
2004-02-20 15:22:02 -05:00
Nathan Binkert
aa483a0026 Don't need to specify two etherdump devices
--HG--
extra : convert_revision : 62e8d6b218909c00a97d71e0d3b0f11816499fbf
2004-02-20 15:20:37 -05:00
Nathan Binkert
a51cec6669 Make it so dump takes a void *
base/trace.cc:
base/trace.hh:
    take a void * for the raw data

--HG--
extra : convert_revision : fc336dc82b4d533c3a0f319977074f26342445ea
2004-02-20 15:19:55 -05:00
Nathan Binkert
ee8c8cbcd8 make etherdump work again
dev/etherdump.cc:
    now that init is automatically called by the framework, don't
    init twice.

--HG--
extra : convert_revision : 16dcdef67aa193ed71ff546e7b255d60f39bf13d
2004-02-20 15:19:19 -05:00
Nathan Binkert
7ad5b6ee22 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 691c89ebacb3c5a5eb67359ed102646b8547dd17
2004-02-20 15:08:02 -05:00
Ron Dreslinski
db940dd0b0 Add support for IPI's and extend RTC to interrupt all Processors
dev/tsunami_cchip.cc:
    Add support for IPI, making changes to read/write to MISC register
    Particularly the IPREQ, IPINTR, and ITINTR subfields
dev/tsunami_cchip.hh:
    Make an array to keep track of the number of outstanding IPI's,
    Extend RTC to interrupt all processors, not just cpu0
dev/tsunami_io.cc:
    Extend RTC to interrupt all present proccessors, not just cpu0

--HG--
extra : convert_revision : 0715cbf0abb06002c0fb0b05ef369304cdf75001
2004-02-20 14:28:59 -05:00
Ron Dreslinski
ee799f47d5 Merge zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/rdreslin/m5bk/clean
--HG--
extra : convert_revision : b8e4d9c2901c4c784ecca351fd34a3f5a2845473
2004-02-20 12:45:11 -05:00
Ron Dreslinski
373d70980e Add serialization for packets on the ethernet link,
and for link events

--HG--
extra : convert_revision : 0054dbc4a42dd38ff8bbf64af303bc509dd5aa8a
2004-02-20 12:44:41 -05:00
Lisa Hsu
5e494f0c59 put back $SETUPDIR = $ENV{PWD} for amd purposes.
--HG--
extra : convert_revision : 115a9ea8d08bf3e32ecb689962c8a12c9a7dba26
2004-02-20 12:37:52 -05:00
Nathan Binkert
cb928f0391 Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 626baf73d2e26201088b05b4e5fac19292abcb32
2004-02-20 11:29:39 -05:00
Lisa Hsu
4ec55bef11 interestingly, when setup is called from a perl script, when you chdir in the perl script, the ENV{PWD} does not change.
--HG--
extra : convert_revision : e1b2fb3e3b791921b9c3f4bb3b7417ff047bbcbf
2004-02-19 17:58:17 -05:00
Andrew Schultz
d4637757f8 Remote an old hack that is now unnecessary
base/cprintf_formats.hh:
    Add additional format modifiers

--HG--
extra : convert_revision : f9ec0a664eeb96db7dacacd6b7636e3cb47555e7
2004-02-19 16:32:13 -05:00
Andrew Schultz
e3fb3d1ad0 Misspeculation fix and (more importantly) change to allow for the ev6 style
physical addressing.  This has the uncacheable bit as bit 40 as opposed
to bit 39.  Additionally, we now support (at least superficially) a 44-bit
physical address.  To deal with superpage access in this scheme, any super
page access with either bit 39 or 40 set is sign extended.

--HG--
extra : convert_revision : 05ddbcb9a6a92481109a63b261743881953620ab
2004-02-19 16:30:06 -05:00
Andrew Schultz
12747d3084 Change the physical memory logic, and also add misspeculation fix to
tlb index calls that are called from ExecContext::readIpr

arch/alpha/ev5.cc:
    Fix misspeculation bugs for misspeculated IPR accesses

--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7
2004-02-18 21:38:55 -05:00
Nathan Binkert
26d0cf70ea Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/memory

--HG--
extra : convert_revision : 20e6f7edd432952b3c30d4f017058dfd52456fda
2004-02-18 14:17:44 -05:00
Nathan Binkert
2d5ef88e1c couple fixes
--HG--
extra : convert_revision : bd0948bc831610f442d5ff6893f0e2a68e3aa83f
2004-02-18 14:17:13 -05:00
Nathan Binkert
3bf012fe2f Merge
--HG--
extra : convert_revision : b29c9bbb50994e2567fd58deedb853123d2d69a0
2004-02-18 12:01:04 -05:00
Erik Hallnor
6610699987 Add COW support to the IIC.
cpu/memtest/memtest.cc:
    Move the trace Addr to the end of the printouts

--HG--
extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4
2004-02-17 22:53:15 -05:00
Erik Hallnor
4bb902328a Merge ehallnor@zizzer:/bk/m5 into zazzer.eecs.umich.edu:/z/ehallnor/m5
--HG--
extra : convert_revision : 19800f3879c943addbf4bca747b357a94352b6a8
2004-02-17 03:14:21 -05:00
Erik Hallnor
5c77989c9b Change the way data is handled in the cache blocks.
--HG--
extra : convert_revision : 8c071c4f48581a398bebc4f033e18580dca0897f
2004-02-17 03:05:19 -05:00
Andrew Schultz
59a6e9d705 Merge
arch/alpha/alpha_memory.cc:
    SCCS merged

--HG--
extra : convert_revision : 0348e29c833684fd593a6c02913319f45f24e76e
2004-02-16 22:04:55 -05:00
Andrew Schultz
a73e263f94 Change logic for translating a memory addresses, extra checks for invalid
physical addresses.

--HG--
extra : convert_revision : efb4a5229d88cb3c024e0b24f5916048bd42d589
2004-02-16 21:56:38 -05:00
Andrew Schultz
772f95975d Changed physical device addresses to fit within the 40-bit implemented
physical address

--HG--
extra : convert_revision : c51b5d3e09b4d5384cb113ab2ed569ef9a1f2ab4
2004-02-16 21:20:18 -05:00
Erik Hallnor
b797f99213 Rework BusBridge to have a latency and handle bus IDs correctly.
--HG--
extra : convert_revision : 901ef4782d0c9f0d842deba7acdba7896da7e41c
2004-02-16 16:28:11 -05:00
Ali Saidi
706d6bea52 1 << x != (uint64_t)1 << x
dev/tsunami_cchip.cc:
    fixed another problem with the interrupt code, should all work now

--HG--
extra : convert_revision : 1d9fe6081b6391e3e09f1c4a9380a30240fac6dc
2004-02-16 16:04:34 -05:00
Andrew Schultz
9c9d1cb5bf Changed device IRQ back to 1
--HG--
extra : convert_revision : 3fb611e6e0305fe9854cdf7813492b75750cd7a9
2004-02-16 01:33:43 -05:00
Andrew Schultz
484a4de65a Added new aic register definition, fix some interrupt related calls
dev/tsunami_cchip.cc:
    Change interrupt level to 20 for devices

--HG--
extra : convert_revision : deee68d5434643dc751de08e5a804c14d1a86efd
2004-02-16 01:07:16 -05:00
Ali Saidi
b82bd8fd78 changed interrupt index to be 64 bits long and fixed a bad include
in adaptec_ctrl.hh

cpu/base_cpu.cc:
    changed index to 64bits
cpu/base_cpu.hh:
    changed index to 64 bits

--HG--
extra : convert_revision : e70d5f09f6066b90fca82cae22bb7d7eb705d65e
2004-02-16 00:21:42 -05:00
Ali Saidi
03e8793f89 Merge
dev/tsunami_cchip.cc:
    SCCS merged

--HG--
extra : convert_revision : a4b2b0b92038217608a733a6c8f27edb018e910d
2004-02-16 00:00:23 -05:00
Ali Saidi
de5fa66714 Rewrote interrupt code to handle masking correctly and changed every
interrupt to use a different subnumber since both devices could
interrupt at the same time and we don't want to loose one.

dev/tsunami_cchip.cc:
    rewrote interrupt code to handle interrupt mask clearing correctly
dev/tsunami_cchip.hh:
    changed (post/clear)DRIR to use a interrupt number rather than a vecotr
dev/tsunami_io.cc:
    updated for new post/clearDRIR calls

--HG--
extra : convert_revision : 5b39f5e15a66d5eb6e689e6ece62f99b5fa735ab
2004-02-15 23:56:44 -05:00