SimpleCPU compiles with merge.
arch/alpha/isa_traits.hh: arch/alpha/linux/process.cc: arch/alpha/process.cc: arch/alpha/process.hh: arch/alpha/tru64/process.cc: base/chunk_generator.hh: base/loader/elf_object.cc: cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: cpu/exec_context.hh: cpu/simple/cpu.cc: kern/linux/linux.hh: kern/tru64/tru64.hh: mem/packet.hh: mem/page_table.cc: mem/page_table.hh: mem/physical.cc: mem/request.hh: mem/translating_port.cc: sim/process.hh: sim/system.cc: Fixing merged changes. --HG-- extra : convert_revision : 2e94f21009395db654880fcb94ec806b6f5772c3
This commit is contained in:
parent
872bbdfc33
commit
f102365bfe
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@ -344,6 +344,7 @@ extern const int reg_redir[NumIntRegs];
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const Addr MaxAddr = (Addr)-1;
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const Addr MaxAddr = (Addr)-1;
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#if !FULL_SYSTEM
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static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
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static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
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{
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{
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// check for error condition. Alpha syscall convention is to
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// check for error condition. Alpha syscall convention is to
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@ -359,6 +360,7 @@ extern const int reg_redir[NumIntRegs];
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regs->intRegFile[ReturnValueReg] = -return_value.value();
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regs->intRegFile[ReturnValueReg] = -return_value.value();
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}
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}
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}
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}
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#endif
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};
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};
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static inline AlphaISA::ExtMachInst
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static inline AlphaISA::ExtMachInst
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@ -32,7 +32,6 @@
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#include "base/trace.hh"
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#include "base/trace.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/exec_context.hh"
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#include "kern/linux/linux.hh"
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#include "kern/linux/linux.hh"
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#include "mem/functional/functional.hh"
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#include "sim/process.hh"
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#include "sim/process.hh"
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#include "sim/syscall_emul.hh"
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#include "sim/syscall_emul.hh"
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@ -55,7 +54,7 @@ unameFunc(SyscallDesc *desc, int callnum, Process *process,
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strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
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strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
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strcpy(name->machine, "alpha");
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strcpy(name->machine, "alpha");
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name.copyOut(xc->getMemPtr());
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name.copyOut(xc->port);
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return 0;
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return 0;
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}
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}
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@ -75,7 +74,7 @@ osf_getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
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TypedBufferArg<uint64_t> fpcr(xc->getSyscallArg(1));
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TypedBufferArg<uint64_t> fpcr(xc->getSyscallArg(1));
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// I don't think this exactly matches the HW FPCR
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// I don't think this exactly matches the HW FPCR
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*fpcr = 0;
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*fpcr = 0;
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fpcr.copyOut(xc->getMemPtr());
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fpcr.copyOut(xc->port);
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return 0;
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return 0;
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}
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}
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@ -101,7 +100,7 @@ osf_setsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
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case 14: { // SSI_IEEE_FP_CONTROL
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case 14: { // SSI_IEEE_FP_CONTROL
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TypedBufferArg<uint64_t> fpcr(xc->getSyscallArg(1));
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TypedBufferArg<uint64_t> fpcr(xc->getSyscallArg(1));
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// I don't think this exactly matches the HW FPCR
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// I don't think this exactly matches the HW FPCR
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fpcr.copyIn(xc->getMemPtr());
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fpcr.copyIn(xc->port);
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DPRINTFR(SyscallVerbose, "osf_setsysinfo(SSI_IEEE_FP_CONTROL): "
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DPRINTFR(SyscallVerbose, "osf_setsysinfo(SSI_IEEE_FP_CONTROL): "
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" setting FPCR to 0x%x\n", gtoh(*(uint64_t*)fpcr));
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" setting FPCR to 0x%x\n", gtoh(*(uint64_t*)fpcr));
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return 0;
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return 0;
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@ -567,15 +566,17 @@ SyscallDesc AlphaLinuxProcess::syscallDescs[] = {
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AlphaLinuxProcess::AlphaLinuxProcess(const std::string &name,
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AlphaLinuxProcess::AlphaLinuxProcess(const std::string &name,
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ObjectFile *objFile,
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ObjectFile *objFile,
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System *system,
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int stdin_fd,
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int stdin_fd,
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int stdout_fd,
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int stdout_fd,
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int stderr_fd,
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int stderr_fd,
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std::vector<std::string> &argv,
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std::vector<std::string> &argv,
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std::vector<std::string> &envp)
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std::vector<std::string> &envp)
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: LiveProcess(name, objFile, stdin_fd, stdout_fd, stderr_fd, argv, envp),
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: LiveProcess(name, objFile, system, stdin_fd, stdout_fd,
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stderr_fd, argv, envp),
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Num_Syscall_Descs(sizeof(syscallDescs) / sizeof(SyscallDesc))
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Num_Syscall_Descs(sizeof(syscallDescs) / sizeof(SyscallDesc))
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{
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{
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init_regs->intRegFile[0] = 0;
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//init_regs->intRegFile[0] = 0;
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}
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}
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@ -32,7 +32,7 @@ namespace AlphaISA
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{
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{
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LiveProcess *
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LiveProcess *
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createProcess(const std::string &nm, ObjectFile * objFile,
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createProcess(const std::string &nm, ObjectFile * objFile, System *system,
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int stdin_fd, int stdout_fd, int stderr_fd,
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int stdin_fd, int stdout_fd, int stderr_fd,
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std::vector<std::string> &argv, std::vector<std::string> &envp)
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std::vector<std::string> &argv, std::vector<std::string> &envp)
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{
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{
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@ -41,13 +41,13 @@ createProcess(const std::string &nm, ObjectFile * objFile,
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fatal("Object file does not match architecture.");
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fatal("Object file does not match architecture.");
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switch (objFile->getOpSys()) {
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switch (objFile->getOpSys()) {
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case ObjectFile::Tru64:
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case ObjectFile::Tru64:
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process = new AlphaTru64Process(nm, objFile,
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process = new AlphaTru64Process(nm, objFile, system,
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stdin_fd, stdout_fd, stderr_fd,
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stdin_fd, stdout_fd, stderr_fd,
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argv, envp);
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argv, envp);
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break;
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break;
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case ObjectFile::Linux:
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case ObjectFile::Linux:
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process = new AlphaLinuxProcess(nm, objFile,
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process = new AlphaLinuxProcess(nm, objFile, system,
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stdin_fd, stdout_fd, stderr_fd,
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stdin_fd, stdout_fd, stderr_fd,
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argv, envp);
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argv, envp);
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break;
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break;
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@ -39,7 +39,7 @@ namespace AlphaISA
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{
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{
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LiveProcess *
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LiveProcess *
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createProcess(const std::string &nm, ObjectFile * objFile,
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createProcess(const std::string &nm, ObjectFile * objFile, System * system,
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int stdin_fd, int stdout_fd, int stderr_fd,
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int stdin_fd, int stdout_fd, int stderr_fd,
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std::vector<std::string> &argv, std::vector<std::string> &envp);
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std::vector<std::string> &argv, std::vector<std::string> &envp);
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@ -30,7 +30,6 @@
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#include "arch/alpha/tru64/process.hh"
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#include "arch/alpha/tru64/process.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/exec_context.hh"
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#include "kern/tru64/tru64.hh"
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#include "kern/tru64/tru64.hh"
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#include "mem/functional/functional.hh"
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#include "sim/fake_syscall.hh"
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#include "sim/fake_syscall.hh"
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#include "sim/process.hh"
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#include "sim/process.hh"
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#include "sim/syscall_emul.hh"
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#include "sim/syscall_emul.hh"
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@ -51,7 +50,7 @@ unameFunc(SyscallDesc *desc, int callnum, Process *process,
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strcpy(name->version, "732");
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strcpy(name->version, "732");
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strcpy(name->machine, "alpha");
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strcpy(name->machine, "alpha");
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name.copyOut(xc->getMemPtr());
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name.copyOut(xc->port);
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return 0;
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return 0;
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}
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}
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@ -68,21 +67,21 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
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case Tru64::GSI_MAX_CPU: {
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case Tru64::GSI_MAX_CPU: {
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TypedBufferArg<uint32_t> max_cpu(xc->getSyscallArg(1));
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TypedBufferArg<uint32_t> max_cpu(xc->getSyscallArg(1));
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*max_cpu = htog((uint32_t)process->numCpus());
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*max_cpu = htog((uint32_t)process->numCpus());
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max_cpu.copyOut(xc->getMemPtr());
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max_cpu.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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case Tru64::GSI_CPUS_IN_BOX: {
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case Tru64::GSI_CPUS_IN_BOX: {
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TypedBufferArg<uint32_t> cpus_in_box(xc->getSyscallArg(1));
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TypedBufferArg<uint32_t> cpus_in_box(xc->getSyscallArg(1));
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*cpus_in_box = htog((uint32_t)process->numCpus());
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*cpus_in_box = htog((uint32_t)process->numCpus());
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cpus_in_box.copyOut(xc->getMemPtr());
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cpus_in_box.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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case Tru64::GSI_PHYSMEM: {
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case Tru64::GSI_PHYSMEM: {
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TypedBufferArg<uint64_t> physmem(xc->getSyscallArg(1));
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TypedBufferArg<uint64_t> physmem(xc->getSyscallArg(1));
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*physmem = htog((uint64_t)1024 * 1024); // physical memory in KB
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*physmem = htog((uint64_t)1024 * 1024); // physical memory in KB
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physmem.copyOut(xc->getMemPtr());
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physmem.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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@ -99,14 +98,14 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
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infop->cpu_ex_binding = htog(0);
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infop->cpu_ex_binding = htog(0);
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infop->mhz = htog(667);
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infop->mhz = htog(667);
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infop.copyOut(xc->getMemPtr());
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infop.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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case Tru64::GSI_PROC_TYPE: {
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case Tru64::GSI_PROC_TYPE: {
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TypedBufferArg<uint64_t> proc_type(xc->getSyscallArg(1));
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TypedBufferArg<uint64_t> proc_type(xc->getSyscallArg(1));
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*proc_type = htog((uint64_t)11);
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*proc_type = htog((uint64_t)11);
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proc_type.copyOut(xc->getMemPtr());
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proc_type.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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@ -115,14 +114,14 @@ getsysinfoFunc(SyscallDesc *desc, int callnum, Process *process,
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strncpy((char *)bufArg.bufferPtr(),
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strncpy((char *)bufArg.bufferPtr(),
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"COMPAQ Professional Workstation XP1000",
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"COMPAQ Professional Workstation XP1000",
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nbytes);
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nbytes);
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bufArg.copyOut(xc->getMemPtr());
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bufArg.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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case Tru64::GSI_CLK_TCK: {
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case Tru64::GSI_CLK_TCK: {
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TypedBufferArg<uint64_t> clk_hz(xc->getSyscallArg(1));
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TypedBufferArg<uint64_t> clk_hz(xc->getSyscallArg(1));
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*clk_hz = htog((uint64_t)1024);
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*clk_hz = htog((uint64_t)1024);
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clk_hz.copyOut(xc->getMemPtr());
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clk_hz.copyOut(xc->port);
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return 1;
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return 1;
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}
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}
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@ -531,12 +530,14 @@ AlphaTru64Process::getDesc(int callnum)
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AlphaTru64Process::AlphaTru64Process(const std::string &name,
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AlphaTru64Process::AlphaTru64Process(const std::string &name,
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ObjectFile *objFile,
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ObjectFile *objFile,
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System *system,
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int stdin_fd,
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int stdin_fd,
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int stdout_fd,
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int stdout_fd,
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int stderr_fd,
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int stderr_fd,
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std::vector<std::string> &argv,
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std::vector<std::string> &argv,
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std::vector<std::string> &envp)
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std::vector<std::string> &envp)
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: LiveProcess(name, objFile, stdin_fd, stdout_fd, stderr_fd, argv, envp),
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: LiveProcess(name, objFile, system, stdin_fd, stdout_fd,
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stderr_fd, argv, envp),
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Num_Syscall_Descs(sizeof(syscallDescs) / sizeof(SyscallDesc)),
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Num_Syscall_Descs(sizeof(syscallDescs) / sizeof(SyscallDesc)),
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Num_Mach_Syscall_Descs(sizeof(machSyscallDescs) / sizeof(SyscallDesc))
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Num_Mach_Syscall_Descs(sizeof(machSyscallDescs) / sizeof(SyscallDesc))
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{
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{
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@ -36,7 +36,7 @@
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#include <algorithm>
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#include <algorithm>
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#include "base/intmath.hh"
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#include "base/intmath.hh"
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#include "targetarch/isa_traits.hh" // for Addr
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#include "arch/isa_traits.hh" // for Addr
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/**
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/**
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* This class takes an arbitrary memory region (address/length pair)
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* This class takes an arbitrary memory region (address/length pair)
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@ -47,6 +47,8 @@
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#include "base/trace.hh" // for DPRINTF
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#include "base/trace.hh" // for DPRINTF
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#include "sim/byteswap.hh"
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using namespace std;
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using namespace std;
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@ -92,7 +92,7 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num,
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}
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}
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CPUExecContext::CPUExecContext(RegFile *regFile)
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CPUExecContext::CPUExecContext(RegFile *regFile)
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: cpu(NULL), thread_num(-1), process(NULL), mem(NULL), asid(-1),
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: cpu(NULL), thread_num(-1), process(NULL), asid(-1),
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func_exe_inst(0), storeCondFailures(0)
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func_exe_inst(0), storeCondFailures(0)
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{
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{
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regs = *regFile;
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regs = *regFile;
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@ -363,15 +363,13 @@ class CPUExecContext
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{
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{
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panic("instRead not implemented");
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panic("instRead not implemented");
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// return funcPhysMem->read(req, inst);
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// return funcPhysMem->read(req, inst);
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return No_Fault;
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return NoFault;
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}
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}
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void setCpuId(int id) { cpu_id = id; }
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void setCpuId(int id) { cpu_id = id; }
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int readCpuId() { return cpu_id; }
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int readCpuId() { return cpu_id; }
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FunctionalMemory *getMemPtr() { return mem; }
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void copyArchRegs(ExecContext *xc);
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void copyArchRegs(ExecContext *xc);
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//
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//
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@ -30,7 +30,7 @@
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#define __CPU_EXEC_CONTEXT_HH__
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#define __CPU_EXEC_CONTEXT_HH__
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#include "config/full_system.hh"
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#include "config/full_system.hh"
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#include "mem/mem_req.hh"
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#include "mem/request.hh"
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#include "sim/faults.hh"
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#include "sim/faults.hh"
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#include "sim/host.hh"
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#include "sim/host.hh"
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#include "sim/serialize.hh"
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#include "sim/serialize.hh"
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@ -43,8 +43,8 @@ class AlphaDTB;
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class AlphaITB;
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class AlphaITB;
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class BaseCPU;
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class BaseCPU;
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class Event;
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class Event;
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class FunctionalMemory;
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class PhysicalMemory;
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class PhysicalMemory;
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class TranslatingPort;
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class Process;
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class Process;
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class System;
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class System;
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@ -79,6 +79,8 @@ class ExecContext
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Halted
|
Halted
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};
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};
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TranslatingPort * port;
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|
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virtual ~ExecContext() { };
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virtual ~ExecContext() { };
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virtual BaseCPU *getCpuPtr() = 0;
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virtual BaseCPU *getCpuPtr() = 0;
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@ -87,8 +89,6 @@ class ExecContext
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|
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virtual int readCpuId() = 0;
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virtual int readCpuId() = 0;
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|
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virtual FunctionalMemory *getMemPtr() = 0;
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|
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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virtual System *getSystemPtr() = 0;
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virtual System *getSystemPtr() = 0;
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|
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@ -148,11 +148,11 @@ class ExecContext
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virtual int getInstAsid() = 0;
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virtual int getInstAsid() = 0;
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virtual int getDataAsid() = 0;
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virtual int getDataAsid() = 0;
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|
|
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virtual Fault translateInstReq(MemReqPtr &req) = 0;
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virtual Fault translateInstReq(CpuRequestPtr &req) = 0;
|
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|
|
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virtual Fault translateDataReadReq(MemReqPtr &req) = 0;
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virtual Fault translateDataReadReq(CpuRequestPtr &req) = 0;
|
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|
|
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virtual Fault translateDataWriteReq(MemReqPtr &req) = 0;
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virtual Fault translateDataWriteReq(CpuRequestPtr &req) = 0;
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// Also somewhat obnoxious. Really only used for the TLB fault.
|
// Also somewhat obnoxious. Really only used for the TLB fault.
|
||||||
// However, may be quite useful in SPARC.
|
// However, may be quite useful in SPARC.
|
||||||
|
@ -249,8 +249,6 @@ class ProxyExecContext : public ExecContext
|
||||||
|
|
||||||
int readCpuId() { return actualXC->readCpuId(); }
|
int readCpuId() { return actualXC->readCpuId(); }
|
||||||
|
|
||||||
FunctionalMemory *getMemPtr() { return actualXC->getMemPtr(); }
|
|
||||||
|
|
||||||
#if FULL_SYSTEM
|
#if FULL_SYSTEM
|
||||||
System *getSystemPtr() { return actualXC->getSystemPtr(); }
|
System *getSystemPtr() { return actualXC->getSystemPtr(); }
|
||||||
|
|
||||||
|
@ -310,13 +308,13 @@ class ProxyExecContext : public ExecContext
|
||||||
int getInstAsid() { return actualXC->getInstAsid(); }
|
int getInstAsid() { return actualXC->getInstAsid(); }
|
||||||
int getDataAsid() { return actualXC->getDataAsid(); }
|
int getDataAsid() { return actualXC->getDataAsid(); }
|
||||||
|
|
||||||
Fault translateInstReq(MemReqPtr &req)
|
Fault translateInstReq(CpuRequestPtr &req)
|
||||||
{ return actualXC->translateInstReq(req); }
|
{ return actualXC->translateInstReq(req); }
|
||||||
|
|
||||||
Fault translateDataReadReq(MemReqPtr &req)
|
Fault translateDataReadReq(CpuRequestPtr &req)
|
||||||
{ return actualXC->translateDataReadReq(req); }
|
{ return actualXC->translateDataReadReq(req); }
|
||||||
|
|
||||||
Fault translateDataWriteReq(MemReqPtr &req)
|
Fault translateDataWriteReq(CpuRequestPtr &req)
|
||||||
{ return actualXC->translateDataWriteReq(req); }
|
{ return actualXC->translateDataWriteReq(req); }
|
||||||
|
|
||||||
// @todo: Do I need this?
|
// @todo: Do I need this?
|
||||||
|
|
|
@ -410,7 +410,7 @@ SimpleCPU::copySrcTranslate(Addr src)
|
||||||
}
|
}
|
||||||
return fault;
|
return fault;
|
||||||
#else
|
#else
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -462,7 +462,7 @@ SimpleCPU::copy(Addr dest)
|
||||||
return fault;
|
return fault;
|
||||||
#else
|
#else
|
||||||
panic("copy not implemented");
|
panic("copy not implemented");
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -483,7 +483,7 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags)
|
||||||
}
|
}
|
||||||
|
|
||||||
// @todo: Figure out a way to create a Fault from the packet result.
|
// @todo: Figure out a way to create a Fault from the packet result.
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
// memReq->reset(addr, sizeof(T), flags);
|
// memReq->reset(addr, sizeof(T), flags);
|
||||||
|
@ -501,7 +501,7 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags)
|
||||||
Fault fault = cpuXC->translateDataReadReq(data_read_req);
|
Fault fault = cpuXC->translateDataReadReq(data_read_req);
|
||||||
|
|
||||||
// Now do the access.
|
// Now do the access.
|
||||||
if (fault == No_Fault) {
|
if (fault == NoFault) {
|
||||||
#if SIMPLE_CPU_MEM_TIMING
|
#if SIMPLE_CPU_MEM_TIMING
|
||||||
data_read_pkt = new Packet;
|
data_read_pkt = new Packet;
|
||||||
data_read_pkt->cmd = Read;
|
data_read_pkt->cmd = Read;
|
||||||
|
@ -525,7 +525,7 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags)
|
||||||
}
|
}
|
||||||
|
|
||||||
// @todo: Figure out a way to create a Fault from the packet result.
|
// @todo: Figure out a way to create a Fault from the packet result.
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
/*
|
/*
|
||||||
|
@ -616,7 +616,7 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
|
||||||
// translate to physical address
|
// translate to physical address
|
||||||
Fault fault = cpuXC->translateDataWriteReq(data_write_req);
|
Fault fault = cpuXC->translateDataWriteReq(data_write_req);
|
||||||
// Now do the access.
|
// Now do the access.
|
||||||
if (fault == No_Fault) {
|
if (fault == NoFault) {
|
||||||
#if SIMPLE_CPU_MEM_TIMING
|
#if SIMPLE_CPU_MEM_TIMING
|
||||||
data_write_pkt = new Packet;
|
data_write_pkt = new Packet;
|
||||||
data_write_pkt->cmd = Write;
|
data_write_pkt->cmd = Write;
|
||||||
|
@ -974,7 +974,7 @@ SimpleCPU::tick()
|
||||||
IFETCH_FLAGS(xc->regs.pc));
|
IFETCH_FLAGS(xc->regs.pc));
|
||||||
*/
|
*/
|
||||||
|
|
||||||
fault = xc->translateInstReq(ifetch_req);
|
fault = cpuXC->translateInstReq(ifetch_req);
|
||||||
|
|
||||||
if (fault == NoFault) {
|
if (fault == NoFault) {
|
||||||
#if SIMPLE_CPU_MEM_TIMING
|
#if SIMPLE_CPU_MEM_TIMING
|
||||||
|
|
|
@ -46,6 +46,8 @@ class Linux {};
|
||||||
|
|
||||||
#include "sim/syscall_emul.hh"
|
#include "sim/syscall_emul.hh"
|
||||||
|
|
||||||
|
class TranslatingPort;
|
||||||
|
|
||||||
///
|
///
|
||||||
/// This class encapsulates the types, structures, constants,
|
/// This class encapsulates the types, structures, constants,
|
||||||
/// functions, and syscall-number mappings specific to the Alpha Linux
|
/// functions, and syscall-number mappings specific to the Alpha Linux
|
||||||
|
@ -240,7 +242,7 @@ class Linux {
|
||||||
/// memory space. Used by stat(), fstat(), and lstat().
|
/// memory space. Used by stat(), fstat(), and lstat().
|
||||||
#if !BSD_HOST
|
#if !BSD_HOST
|
||||||
static void
|
static void
|
||||||
copyOutStatBuf(FunctionalMemory *mem, Addr addr, hst_stat *host)
|
copyOutStatBuf(TranslatingPort *mem, Addr addr, hst_stat *host)
|
||||||
{
|
{
|
||||||
TypedBufferArg<Linux::tgt_stat> tgt(addr);
|
TypedBufferArg<Linux::tgt_stat> tgt(addr);
|
||||||
|
|
||||||
|
@ -264,7 +266,7 @@ class Linux {
|
||||||
// Third version for bsd systems which no longer have any support for
|
// Third version for bsd systems which no longer have any support for
|
||||||
// the old stat() call and stat() is actually a stat64()
|
// the old stat() call and stat() is actually a stat64()
|
||||||
static void
|
static void
|
||||||
copyOutStatBuf(FunctionalMemory *mem, Addr addr, hst_stat64 *host)
|
copyOutStatBuf(TranslatingPort *mem, Addr addr, hst_stat64 *host)
|
||||||
{
|
{
|
||||||
TypedBufferArg<Linux::tgt_stat> tgt(addr);
|
TypedBufferArg<Linux::tgt_stat> tgt(addr);
|
||||||
|
|
||||||
|
@ -289,7 +291,7 @@ class Linux {
|
||||||
|
|
||||||
// Same for stat64
|
// Same for stat64
|
||||||
static void
|
static void
|
||||||
copyOutStat64Buf(FunctionalMemory *mem, int fd, Addr addr, hst_stat64 *host)
|
copyOutStat64Buf(TranslatingPort *mem, int fd, Addr addr, hst_stat64 *host)
|
||||||
{
|
{
|
||||||
TypedBufferArg<Linux::tgt_stat64> tgt(addr);
|
TypedBufferArg<Linux::tgt_stat64> tgt(addr);
|
||||||
|
|
||||||
|
|
|
@ -61,6 +61,8 @@ typedef struct stat global_stat;
|
||||||
typedef struct statfs global_statfs;
|
typedef struct statfs global_statfs;
|
||||||
typedef struct dirent global_dirent;
|
typedef struct dirent global_dirent;
|
||||||
|
|
||||||
|
class TranslatingPort;
|
||||||
|
|
||||||
///
|
///
|
||||||
/// This class encapsulates the types, structures, constants,
|
/// This class encapsulates the types, structures, constants,
|
||||||
/// functions, and syscall-number mappings specific to the Alpha Tru64
|
/// functions, and syscall-number mappings specific to the Alpha Tru64
|
||||||
|
@ -540,7 +542,7 @@ class Tru64 {
|
||||||
/// memory space. Used by stat(), fstat(), and lstat().
|
/// memory space. Used by stat(), fstat(), and lstat().
|
||||||
template <class T>
|
template <class T>
|
||||||
static void
|
static void
|
||||||
copyOutStatBuf(FunctionalMemory *mem, Addr addr, global_stat *host)
|
copyOutStatBuf(TranslatingPort *mem, Addr addr, global_stat *host)
|
||||||
{
|
{
|
||||||
TypedBufferArg<T> tgt(addr);
|
TypedBufferArg<T> tgt(addr);
|
||||||
|
|
||||||
|
@ -566,7 +568,7 @@ class Tru64 {
|
||||||
/// memory space. Used by statfs() and fstatfs().
|
/// memory space. Used by statfs() and fstatfs().
|
||||||
template <class T>
|
template <class T>
|
||||||
static void
|
static void
|
||||||
copyOutStatfsBuf(FunctionalMemory *mem, Addr addr, global_statfs *host)
|
copyOutStatfsBuf(TranslatingPort *mem, Addr addr, global_statfs *host)
|
||||||
{
|
{
|
||||||
TypedBufferArg<T> tgt(addr);
|
TypedBufferArg<T> tgt(addr);
|
||||||
|
|
||||||
|
@ -590,13 +592,13 @@ class Tru64 {
|
||||||
|
|
||||||
class F64 {
|
class F64 {
|
||||||
public:
|
public:
|
||||||
static void copyOutStatBuf(FunctionalMemory *mem, Addr addr,
|
static void copyOutStatBuf(TranslatingPort *mem, Addr addr,
|
||||||
global_stat *host)
|
global_stat *host)
|
||||||
{
|
{
|
||||||
Tru64::copyOutStatBuf<Tru64::F64_stat>(mem, addr, host);
|
Tru64::copyOutStatBuf<Tru64::F64_stat>(mem, addr, host);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void copyOutStatfsBuf(FunctionalMemory *mem, Addr addr,
|
static void copyOutStatfsBuf(TranslatingPort *mem, Addr addr,
|
||||||
global_statfs *host)
|
global_statfs *host)
|
||||||
{
|
{
|
||||||
Tru64::copyOutStatfsBuf<Tru64::F64_statfs>(mem, addr, host);
|
Tru64::copyOutStatfsBuf<Tru64::F64_statfs>(mem, addr, host);
|
||||||
|
@ -605,13 +607,13 @@ class Tru64 {
|
||||||
|
|
||||||
class PreF64 {
|
class PreF64 {
|
||||||
public:
|
public:
|
||||||
static void copyOutStatBuf(FunctionalMemory *mem, Addr addr,
|
static void copyOutStatBuf(TranslatingPort *mem, Addr addr,
|
||||||
global_stat *host)
|
global_stat *host)
|
||||||
{
|
{
|
||||||
Tru64::copyOutStatBuf<Tru64::pre_F64_stat>(mem, addr, host);
|
Tru64::copyOutStatBuf<Tru64::pre_F64_stat>(mem, addr, host);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void copyOutStatfsBuf(FunctionalMemory *mem, Addr addr,
|
static void copyOutStatfsBuf(TranslatingPort *mem, Addr addr,
|
||||||
global_statfs *host)
|
global_statfs *host)
|
||||||
{
|
{
|
||||||
Tru64::copyOutStatfsBuf<Tru64::pre_F64_statfs>(mem, addr, host);
|
Tru64::copyOutStatfsBuf<Tru64::pre_F64_statfs>(mem, addr, host);
|
||||||
|
@ -623,7 +625,7 @@ class Tru64 {
|
||||||
/// the simulated memory space. Used by pre_F64_stat(),
|
/// the simulated memory space. Used by pre_F64_stat(),
|
||||||
/// pre_F64_fstat(), and pre_F64_lstat().
|
/// pre_F64_fstat(), and pre_F64_lstat().
|
||||||
static void
|
static void
|
||||||
copyOutPreF64StatBuf(FunctionalMemory *mem, Addr addr, struct stat *host)
|
copyOutPreF64StatBuf(TranslatingPort *mem, Addr addr, struct stat *host)
|
||||||
{
|
{
|
||||||
TypedBufferArg<Tru64::pre_F64_stat> tgt(addr);
|
TypedBufferArg<Tru64::pre_F64_stat> tgt(addr);
|
||||||
|
|
||||||
|
@ -666,7 +668,7 @@ class Tru64 {
|
||||||
|
|
||||||
// just pass basep through uninterpreted.
|
// just pass basep through uninterpreted.
|
||||||
TypedBufferArg<int64_t> basep(tgt_basep);
|
TypedBufferArg<int64_t> basep(tgt_basep);
|
||||||
basep.copyIn(xc->getMemPtr());
|
basep.copyIn(xc->port);
|
||||||
long host_basep = (off_t)htog((int64_t)*basep);
|
long host_basep = (off_t)htog((int64_t)*basep);
|
||||||
int host_result = getdirentries(fd, host_buf, tgt_nbytes, &host_basep);
|
int host_result = getdirentries(fd, host_buf, tgt_nbytes, &host_basep);
|
||||||
|
|
||||||
|
@ -693,7 +695,7 @@ class Tru64 {
|
||||||
tgt_dp->d_reclen = tgt_bufsize;
|
tgt_dp->d_reclen = tgt_bufsize;
|
||||||
tgt_dp->d_namlen = namelen;
|
tgt_dp->d_namlen = namelen;
|
||||||
strcpy(tgt_dp->d_name, host_dp->d_name);
|
strcpy(tgt_dp->d_name, host_dp->d_name);
|
||||||
tgt_dp.copyOut(xc->getMemPtr());
|
tgt_dp.copyOut(xc->port);
|
||||||
|
|
||||||
tgt_buf_ptr += tgt_bufsize;
|
tgt_buf_ptr += tgt_bufsize;
|
||||||
host_buf_ptr += host_dp->d_reclen;
|
host_buf_ptr += host_dp->d_reclen;
|
||||||
|
@ -702,7 +704,7 @@ class Tru64 {
|
||||||
delete [] host_buf;
|
delete [] host_buf;
|
||||||
|
|
||||||
*basep = htog((int64_t)host_basep);
|
*basep = htog((int64_t)host_basep);
|
||||||
basep.copyOut(xc->getMemPtr());
|
basep.copyOut(xc->port);
|
||||||
|
|
||||||
return tgt_buf_ptr - tgt_buf;
|
return tgt_buf_ptr - tgt_buf;
|
||||||
#endif
|
#endif
|
||||||
|
@ -716,7 +718,7 @@ class Tru64 {
|
||||||
using TheISA::RegFile;
|
using TheISA::RegFile;
|
||||||
TypedBufferArg<Tru64::sigcontext> sc(xc->getSyscallArg(0));
|
TypedBufferArg<Tru64::sigcontext> sc(xc->getSyscallArg(0));
|
||||||
|
|
||||||
sc.copyIn(xc->getMemPtr());
|
sc.copyIn(xc->port);
|
||||||
|
|
||||||
// Restore state from sigcontext structure.
|
// Restore state from sigcontext structure.
|
||||||
// Note that we'll advance PC <- NPC before the end of the cycle,
|
// Note that we'll advance PC <- NPC before the end of the cycle,
|
||||||
|
@ -761,7 +763,7 @@ class Tru64 {
|
||||||
elp->si_phz = htog(clk_hz);
|
elp->si_phz = htog(clk_hz);
|
||||||
elp->si_boottime = htog(seconds_since_epoch); // seconds since epoch?
|
elp->si_boottime = htog(seconds_since_epoch); // seconds since epoch?
|
||||||
elp->si_max_procs = htog(process->numCpus());
|
elp->si_max_procs = htog(process->numCpus());
|
||||||
elp.copyOut(xc->getMemPtr());
|
elp.copyOut(xc->port);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -782,7 +784,7 @@ class Tru64 {
|
||||||
{
|
{
|
||||||
TypedBufferArg<Tru64::vm_stack> argp(xc->getSyscallArg(0));
|
TypedBufferArg<Tru64::vm_stack> argp(xc->getSyscallArg(0));
|
||||||
|
|
||||||
argp.copyIn(xc->getMemPtr());
|
argp.copyIn(xc->port);
|
||||||
|
|
||||||
// if the user chose an address, just let them have it. Otherwise
|
// if the user chose an address, just let them have it. Otherwise
|
||||||
// pick one for them.
|
// pick one for them.
|
||||||
|
@ -791,7 +793,7 @@ class Tru64 {
|
||||||
int stack_size = (htog(argp->rsize) + htog(argp->ysize) +
|
int stack_size = (htog(argp->rsize) + htog(argp->ysize) +
|
||||||
htog(argp->gsize));
|
htog(argp->gsize));
|
||||||
process->next_thread_stack_base -= stack_size;
|
process->next_thread_stack_base -= stack_size;
|
||||||
argp.copyOut(xc->getMemPtr());
|
argp.copyOut(xc->port);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -811,7 +813,7 @@ class Tru64 {
|
||||||
TypedBufferArg<Tru64::nxm_task_attr> attrp(xc->getSyscallArg(0));
|
TypedBufferArg<Tru64::nxm_task_attr> attrp(xc->getSyscallArg(0));
|
||||||
TypedBufferArg<Addr> configptr_ptr(xc->getSyscallArg(1));
|
TypedBufferArg<Addr> configptr_ptr(xc->getSyscallArg(1));
|
||||||
|
|
||||||
attrp.copyIn(xc->getMemPtr());
|
attrp.copyIn(xc->port);
|
||||||
|
|
||||||
if (gtoh(attrp->nxm_version) != NXM_LIB_VERSION) {
|
if (gtoh(attrp->nxm_version) != NXM_LIB_VERSION) {
|
||||||
cerr << "nxm_task_init: thread library version mismatch! "
|
cerr << "nxm_task_init: thread library version mismatch! "
|
||||||
|
@ -852,7 +854,7 @@ class Tru64 {
|
||||||
config->nxm_slot_state = htog(slot_state_addr);
|
config->nxm_slot_state = htog(slot_state_addr);
|
||||||
config->nxm_rad[0] = htog(rad_state_addr);
|
config->nxm_rad[0] = htog(rad_state_addr);
|
||||||
|
|
||||||
config.copyOut(xc->getMemPtr());
|
config.copyOut(xc->port);
|
||||||
|
|
||||||
// initialize the slot_state array and copy it out
|
// initialize the slot_state array and copy it out
|
||||||
TypedBufferArg<Tru64::nxm_slot_state_t> slot_state(slot_state_addr,
|
TypedBufferArg<Tru64::nxm_slot_state_t> slot_state(slot_state_addr,
|
||||||
|
@ -865,7 +867,7 @@ class Tru64 {
|
||||||
(i == 0) ? Tru64::NXM_SLOT_BOUND : Tru64::NXM_SLOT_AVAIL;
|
(i == 0) ? Tru64::NXM_SLOT_BOUND : Tru64::NXM_SLOT_AVAIL;
|
||||||
}
|
}
|
||||||
|
|
||||||
slot_state.copyOut(xc->getMemPtr());
|
slot_state.copyOut(xc->port);
|
||||||
|
|
||||||
// same for the per-RAD "shared" struct. Note that we need to
|
// same for the per-RAD "shared" struct. Note that we need to
|
||||||
// allocate extra bytes for the per-VP array which is embedded at
|
// allocate extra bytes for the per-VP array which is embedded at
|
||||||
|
@ -899,13 +901,13 @@ class Tru64 {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
rad_state.copyOut(xc->getMemPtr());
|
rad_state.copyOut(xc->port);
|
||||||
|
|
||||||
//
|
//
|
||||||
// copy pointer to shared config area out to user
|
// copy pointer to shared config area out to user
|
||||||
//
|
//
|
||||||
*configptr_ptr = htog(config_addr);
|
*configptr_ptr = htog(config_addr);
|
||||||
configptr_ptr.copyOut(xc->getMemPtr());
|
configptr_ptr.copyOut(xc->port);
|
||||||
|
|
||||||
// Register this as a valid address range with the process
|
// Register this as a valid address range with the process
|
||||||
process->nxm_start = base_addr;
|
process->nxm_start = base_addr;
|
||||||
|
@ -942,7 +944,7 @@ class Tru64 {
|
||||||
int thread_index = xc->getSyscallArg(2);
|
int thread_index = xc->getSyscallArg(2);
|
||||||
|
|
||||||
// get attribute args
|
// get attribute args
|
||||||
attrp.copyIn(xc->getMemPtr());
|
attrp.copyIn(xc->port);
|
||||||
|
|
||||||
if (gtoh(attrp->version) != NXM_LIB_VERSION) {
|
if (gtoh(attrp->version) != NXM_LIB_VERSION) {
|
||||||
cerr << "nxm_thread_create: thread library version mismatch! "
|
cerr << "nxm_thread_create: thread library version mismatch! "
|
||||||
|
@ -967,7 +969,7 @@ class Tru64 {
|
||||||
|
|
||||||
TypedBufferArg<Tru64::nxm_shared> rad_state(0x14000,
|
TypedBufferArg<Tru64::nxm_shared> rad_state(0x14000,
|
||||||
rad_state_size);
|
rad_state_size);
|
||||||
rad_state.copyIn(xc->getMemPtr());
|
rad_state.copyIn(xc->port);
|
||||||
|
|
||||||
uint64_t uniq_val = gtoh(attrp->pthid) - gtoh(rad_state->nxm_uniq_offset);
|
uint64_t uniq_val = gtoh(attrp->pthid) - gtoh(rad_state->nxm_uniq_offset);
|
||||||
|
|
||||||
|
@ -978,7 +980,7 @@ class Tru64 {
|
||||||
|
|
||||||
// This is supposed to be a port number. Make something up.
|
// This is supposed to be a port number. Make something up.
|
||||||
*kidp = htog(99);
|
*kidp = htog(99);
|
||||||
kidp.copyOut(xc->getMemPtr());
|
kidp.copyOut(xc->port);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
} else if (gtoh(attrp->type) == Tru64::NXM_TYPE_VP) {
|
} else if (gtoh(attrp->type) == Tru64::NXM_TYPE_VP) {
|
||||||
|
@ -992,7 +994,7 @@ class Tru64 {
|
||||||
ssp->nxm_u.pth_id = attrp->pthid;
|
ssp->nxm_u.pth_id = attrp->pthid;
|
||||||
ssp->nxm_u.nxm_active = htog(uniq_val | 1);
|
ssp->nxm_u.nxm_active = htog(uniq_val | 1);
|
||||||
|
|
||||||
rad_state.copyOut(xc->getMemPtr());
|
rad_state.copyOut(xc->port);
|
||||||
|
|
||||||
Addr slot_state_addr = 0x12000 + sizeof(Tru64::nxm_config_info);
|
Addr slot_state_addr = 0x12000 + sizeof(Tru64::nxm_config_info);
|
||||||
int slot_state_size =
|
int slot_state_size =
|
||||||
|
@ -1002,7 +1004,7 @@ class Tru64 {
|
||||||
slot_state(slot_state_addr,
|
slot_state(slot_state_addr,
|
||||||
slot_state_size);
|
slot_state_size);
|
||||||
|
|
||||||
slot_state.copyIn(xc->getMemPtr());
|
slot_state.copyIn(xc->port);
|
||||||
|
|
||||||
if (slot_state[thread_index] != Tru64::NXM_SLOT_AVAIL) {
|
if (slot_state[thread_index] != Tru64::NXM_SLOT_AVAIL) {
|
||||||
cerr << "nxm_thread_createFunc: requested VP slot "
|
cerr << "nxm_thread_createFunc: requested VP slot "
|
||||||
|
@ -1014,7 +1016,7 @@ class Tru64 {
|
||||||
// doesn't work anyway
|
// doesn't work anyway
|
||||||
slot_state[thread_index] = Tru64::NXM_SLOT_BOUND;
|
slot_state[thread_index] = Tru64::NXM_SLOT_BOUND;
|
||||||
|
|
||||||
slot_state.copyOut(xc->getMemPtr());
|
slot_state.copyOut(xc->port);
|
||||||
|
|
||||||
// Find a free simulator execution context.
|
// Find a free simulator execution context.
|
||||||
for (int i = 0; i < process->numCpus(); ++i) {
|
for (int i = 0; i < process->numCpus(); ++i) {
|
||||||
|
@ -1028,7 +1030,7 @@ class Tru64 {
|
||||||
// and get away with just sticking the thread index
|
// and get away with just sticking the thread index
|
||||||
// here.
|
// here.
|
||||||
*kidp = htog(thread_index);
|
*kidp = htog(thread_index);
|
||||||
kidp.copyOut(xc->getMemPtr());
|
kidp.copyOut(xc->port);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -1157,12 +1159,12 @@ class Tru64 {
|
||||||
{
|
{
|
||||||
TypedBufferArg<uint64_t> lockp(uaddr);
|
TypedBufferArg<uint64_t> lockp(uaddr);
|
||||||
|
|
||||||
lockp.copyIn(xc->getMemPtr());
|
lockp.copyIn(xc->port);
|
||||||
|
|
||||||
if (gtoh(*lockp) == 0) {
|
if (gtoh(*lockp) == 0) {
|
||||||
// lock is free: grab it
|
// lock is free: grab it
|
||||||
*lockp = htog(1);
|
*lockp = htog(1);
|
||||||
lockp.copyOut(xc->getMemPtr());
|
lockp.copyOut(xc->port);
|
||||||
} else {
|
} else {
|
||||||
// lock is busy: disable until free
|
// lock is busy: disable until free
|
||||||
process->waitList.push_back(Process::WaitRec(uaddr, xc));
|
process->waitList.push_back(Process::WaitRec(uaddr, xc));
|
||||||
|
@ -1176,7 +1178,7 @@ class Tru64 {
|
||||||
{
|
{
|
||||||
TypedBufferArg<uint64_t> lockp(uaddr);
|
TypedBufferArg<uint64_t> lockp(uaddr);
|
||||||
|
|
||||||
lockp.copyIn(xc->getMemPtr());
|
lockp.copyIn(xc->port);
|
||||||
assert(*lockp != 0);
|
assert(*lockp != 0);
|
||||||
|
|
||||||
// Check for a process waiting on the lock.
|
// Check for a process waiting on the lock.
|
||||||
|
@ -1185,7 +1187,7 @@ class Tru64 {
|
||||||
// clear lock field if no waiting context is taking over the lock
|
// clear lock field if no waiting context is taking over the lock
|
||||||
if (num_waiting == 0) {
|
if (num_waiting == 0) {
|
||||||
*lockp = 0;
|
*lockp = 0;
|
||||||
lockp.copyOut(xc->getMemPtr());
|
lockp.copyOut(xc->port);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1212,12 +1214,12 @@ class Tru64 {
|
||||||
Addr uaddr = xc->getSyscallArg(0);
|
Addr uaddr = xc->getSyscallArg(0);
|
||||||
TypedBufferArg<uint64_t> lockp(uaddr);
|
TypedBufferArg<uint64_t> lockp(uaddr);
|
||||||
|
|
||||||
lockp.copyIn(xc->getMemPtr());
|
lockp.copyIn(xc->port);
|
||||||
|
|
||||||
if (gtoh(*lockp) == 0) {
|
if (gtoh(*lockp) == 0) {
|
||||||
// lock is free: grab it
|
// lock is free: grab it
|
||||||
*lockp = htog(1);
|
*lockp = htog(1);
|
||||||
lockp.copyOut(xc->getMemPtr());
|
lockp.copyOut(xc->port);
|
||||||
return 0;
|
return 0;
|
||||||
} else {
|
} else {
|
||||||
return 1;
|
return 1;
|
||||||
|
@ -1272,7 +1274,7 @@ class Tru64 {
|
||||||
TypedBufferArg<uint64_t> lockp(lock_addr);
|
TypedBufferArg<uint64_t> lockp(lock_addr);
|
||||||
|
|
||||||
// user is supposed to acquire lock before entering
|
// user is supposed to acquire lock before entering
|
||||||
lockp.copyIn(xc->getMemPtr());
|
lockp.copyIn(xc->port);
|
||||||
assert(gtoh(*lockp) != 0);
|
assert(gtoh(*lockp) != 0);
|
||||||
|
|
||||||
m5_unlock_mutex(lock_addr, process, xc);
|
m5_unlock_mutex(lock_addr, process, xc);
|
||||||
|
|
|
@ -36,7 +36,7 @@
|
||||||
#define __MEM_PACKET_HH__
|
#define __MEM_PACKET_HH__
|
||||||
|
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
#include "targetarch/isa_traits.hh"
|
#include "arch/isa_traits.hh"
|
||||||
#include "sim/root.hh"
|
#include "sim/root.hh"
|
||||||
|
|
||||||
struct Packet;
|
struct Packet;
|
||||||
|
|
|
@ -34,6 +34,7 @@
|
||||||
#include <map>
|
#include <map>
|
||||||
#include <fstream>
|
#include <fstream>
|
||||||
|
|
||||||
|
#include "arch/faults.hh"
|
||||||
#include "base/bitfield.hh"
|
#include "base/bitfield.hh"
|
||||||
#include "base/intmath.hh"
|
#include "base/intmath.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
|
@ -43,6 +44,7 @@
|
||||||
#include "sim/system.hh"
|
#include "sim/system.hh"
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
using namespace TheISA;
|
||||||
|
|
||||||
PageTable::PageTable(System *_system, Addr _pageSize)
|
PageTable::PageTable(System *_system, Addr _pageSize)
|
||||||
: pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
|
: pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
|
||||||
|
@ -61,23 +63,23 @@ PageTable::page_check(Addr addr, int size) const
|
||||||
if (size < sizeof(uint64_t)) {
|
if (size < sizeof(uint64_t)) {
|
||||||
if (!isPowerOf2(size)) {
|
if (!isPowerOf2(size)) {
|
||||||
panic("Invalid request size!\n");
|
panic("Invalid request size!\n");
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((size - 1) & addr)
|
if ((size - 1) & addr)
|
||||||
return Alignment_Fault;
|
return genAlignmentFault();
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
if ((addr & (VMPageSize - 1)) + size > VMPageSize) {
|
if ((addr & (VMPageSize - 1)) + size > VMPageSize) {
|
||||||
panic("Invalid request size!\n");
|
panic("Invalid request size!\n");
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((sizeof(uint64_t) - 1) & addr)
|
if ((sizeof(uint64_t) - 1) & addr)
|
||||||
return Alignment_Fault;
|
return genAlignmentFault();
|
||||||
}
|
}
|
||||||
|
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -123,7 +125,7 @@ PageTable::translate(CpuRequestPtr &req)
|
||||||
{
|
{
|
||||||
assert(pageAlign(req->vaddr + req->size - 1) == pageAlign(req->vaddr));
|
assert(pageAlign(req->vaddr + req->size - 1) == pageAlign(req->vaddr));
|
||||||
if (!translate(req->vaddr, req->paddr)) {
|
if (!translate(req->vaddr, req->paddr)) {
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
}
|
}
|
||||||
return page_check(req->paddr, req->size);
|
return page_check(req->paddr, req->size);
|
||||||
}
|
}
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
#include <string>
|
#include <string>
|
||||||
#include <map>
|
#include <map>
|
||||||
|
|
||||||
|
#include "arch/isa_traits.hh"
|
||||||
#include "base/trace.hh"
|
#include "base/trace.hh"
|
||||||
#include "mem/request.hh"
|
#include "mem/request.hh"
|
||||||
#include "mem/packet.hh"
|
#include "mem/packet.hh"
|
||||||
|
@ -59,7 +60,7 @@ class PageTable
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
PageTable(System *_system, Addr _pageSize = VMPageSize);
|
PageTable(System *_system, Addr _pageSize = TheISA::VMPageSize);
|
||||||
|
|
||||||
~PageTable();
|
~PageTable();
|
||||||
|
|
||||||
|
|
|
@ -44,10 +44,11 @@
|
||||||
#include "sim/host.hh"
|
#include "sim/host.hh"
|
||||||
#include "sim/builder.hh"
|
#include "sim/builder.hh"
|
||||||
#include "sim/eventq.hh"
|
#include "sim/eventq.hh"
|
||||||
#include "targetarch/isa_traits.hh"
|
#include "arch/isa_traits.hh"
|
||||||
|
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
using namespace TheISA;
|
||||||
|
|
||||||
PhysicalMemory::MemResponseEvent::MemResponseEvent(Packet &pkt, MemoryPort* _m)
|
PhysicalMemory::MemResponseEvent::MemResponseEvent(Packet &pkt, MemoryPort* _m)
|
||||||
: Event(&mainEventQueue, CPU_Tick_Pri), pkt(pkt), memoryPort(_m)
|
: Event(&mainEventQueue, CPU_Tick_Pri), pkt(pkt), memoryPort(_m)
|
||||||
|
|
|
@ -34,7 +34,7 @@
|
||||||
#ifndef __MEM_REQUEST_HH__
|
#ifndef __MEM_REQUEST_HH__
|
||||||
#define __MEM_REQUEST_HH__
|
#define __MEM_REQUEST_HH__
|
||||||
|
|
||||||
#include "targetarch/isa_traits.hh"
|
#include "arch/isa_traits.hh"
|
||||||
|
|
||||||
class Request;
|
class Request;
|
||||||
class CpuRequest;
|
class CpuRequest;
|
||||||
|
|
|
@ -27,11 +27,14 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <string>
|
#include <string>
|
||||||
|
#include "arch/faults.hh"
|
||||||
#include "base/chunk_generator.hh"
|
#include "base/chunk_generator.hh"
|
||||||
#include "mem/port.hh"
|
#include "mem/port.hh"
|
||||||
#include "mem/translating_port.hh"
|
#include "mem/translating_port.hh"
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
|
|
||||||
|
using namespace TheISA;
|
||||||
|
|
||||||
TranslatingPort::TranslatingPort(Port *_port, PageTable *p_table)
|
TranslatingPort::TranslatingPort(Port *_port, PageTable *p_table)
|
||||||
: port(_port), pTable(p_table)
|
: port(_port), pTable(p_table)
|
||||||
{ }
|
{ }
|
||||||
|
@ -48,13 +51,13 @@ TranslatingPort::readBlobFunctional(Addr addr, uint8_t *p, int size)
|
||||||
for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
|
for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
|
||||||
|
|
||||||
if (!pTable->translate(gen.addr(),paddr))
|
if (!pTable->translate(gen.addr(),paddr))
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
|
|
||||||
port->readBlobFunctional(paddr, p + prevSize, gen.size());
|
port->readBlobFunctional(paddr, p + prevSize, gen.size());
|
||||||
prevSize += gen.size();
|
prevSize += gen.size();
|
||||||
}
|
}
|
||||||
|
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
Fault
|
Fault
|
||||||
|
@ -72,7 +75,7 @@ TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size,
|
||||||
VMPageSize);
|
VMPageSize);
|
||||||
pTable->translate(gen.addr(), paddr);
|
pTable->translate(gen.addr(), paddr);
|
||||||
} else {
|
} else {
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -80,7 +83,7 @@ TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size,
|
||||||
prevSize += gen.size();
|
prevSize += gen.size();
|
||||||
}
|
}
|
||||||
|
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -98,14 +101,14 @@ TranslatingPort::memsetBlobFunctional(Addr addr, uint8_t val, int size,
|
||||||
VMPageSize);
|
VMPageSize);
|
||||||
pTable->translate(gen.addr(), paddr);
|
pTable->translate(gen.addr(), paddr);
|
||||||
} else {
|
} else {
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
port->memsetBlobFunctional(paddr, val, gen.size());
|
port->memsetBlobFunctional(paddr, val, gen.size());
|
||||||
}
|
}
|
||||||
|
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -120,12 +123,12 @@ TranslatingPort::writeStringFunctional(Addr addr, const char *str)
|
||||||
do {
|
do {
|
||||||
c = *str++;
|
c = *str++;
|
||||||
if (!pTable->translate(vaddr++,paddr))
|
if (!pTable->translate(vaddr++,paddr))
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
|
|
||||||
port->writeBlobFunctional(paddr, &c, 1);
|
port->writeBlobFunctional(paddr, &c, 1);
|
||||||
} while (c);
|
} while (c);
|
||||||
|
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
Fault
|
Fault
|
||||||
|
@ -138,12 +141,12 @@ TranslatingPort::readStringFunctional(std::string &str, Addr addr)
|
||||||
|
|
||||||
do {
|
do {
|
||||||
if (!pTable->translate(vaddr++,paddr))
|
if (!pTable->translate(vaddr++,paddr))
|
||||||
return Machine_Check_Fault;
|
return genMachineCheckFault();
|
||||||
|
|
||||||
port->readBlobFunctional(paddr, &c, 1);
|
port->readBlobFunctional(paddr, &c, 1);
|
||||||
str += c;
|
str += c;
|
||||||
} while (c);
|
} while (c);
|
||||||
|
|
||||||
return No_Fault;
|
return NoFault;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -48,7 +48,7 @@
|
||||||
#include "mem/page_table.hh"
|
#include "mem/page_table.hh"
|
||||||
#include "sim/sim_object.hh"
|
#include "sim/sim_object.hh"
|
||||||
#include "sim/stats.hh"
|
#include "sim/stats.hh"
|
||||||
#include "targetarch/isa_traits.hh"
|
#include "arch/isa_traits.hh"
|
||||||
|
|
||||||
class CPUExecContext;
|
class CPUExecContext;
|
||||||
class ExecContext;
|
class ExecContext;
|
||||||
|
|
|
@ -1,7 +1,6 @@
|
||||||
#include "base/loader/object_file.hh"
|
#include "base/loader/object_file.hh"
|
||||||
#include "base/loader/symtab.hh"
|
#include "base/loader/symtab.hh"
|
||||||
#include "cpu/exec_context.hh"
|
#include "cpu/exec_context.hh"
|
||||||
#include "arch/vtophys.hh"
|
|
||||||
#include "mem/memory.hh"
|
#include "mem/memory.hh"
|
||||||
#include "sim/builder.hh"
|
#include "sim/builder.hh"
|
||||||
#include "arch/isa_traits.hh"
|
#include "arch/isa_traits.hh"
|
||||||
|
@ -12,7 +11,7 @@
|
||||||
#include "base/remote_gdb.hh"
|
#include "base/remote_gdb.hh"
|
||||||
#include "kern/kernel_stats.hh"
|
#include "kern/kernel_stats.hh"
|
||||||
#include "mem/functional/memory_control.hh"
|
#include "mem/functional/memory_control.hh"
|
||||||
#include "targetarch/vtophys.hh"
|
#include "arch/vtophys.hh"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
using namespace std;
|
using namespace std;
|
||||||
|
@ -72,7 +71,6 @@ System::System(Params *p)
|
||||||
DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
|
DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
|
||||||
DPRINTF(Loader, "Kernel loaded...\n");
|
DPRINTF(Loader, "Kernel loaded...\n");
|
||||||
|
|
||||||
#if FULL_SYSTEM
|
|
||||||
kernelBinning = new Kernel::Binning(this);
|
kernelBinning = new Kernel::Binning(this);
|
||||||
#endif // FULL_SYSTEM
|
#endif // FULL_SYSTEM
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue