stats: update ruby.stats, config.ini files for x86 fs test
This commit is contained in:
parent
c4e7e18eeb
commit
e351e846e3
2 changed files with 237 additions and 194 deletions
|
@ -8,10 +8,11 @@ time_sync_spin_threshold=100000000
|
|||
|
||||
[system]
|
||||
type=LinuxX86System
|
||||
children=acpi_description_table_pointer cpu0 cpu1 e820_table intel_mp_pointer intel_mp_table intrctrl pc physmem piobus ruby smbios_table sys_port_proxy
|
||||
children=acpi_description_table_pointer clk_domain cpu0 cpu1 cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl pc physmem piobus ruby smbios_table sys_port_proxy voltage_domain
|
||||
acpi_description_table_pointer=system.acpi_description_table_pointer
|
||||
boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
|
||||
clock=1000
|
||||
cache_line_size=64
|
||||
clk_domain=system.clk_domain
|
||||
e820_table=system.e820_table
|
||||
init_param=0
|
||||
intel_mp_pointer=system.intel_mp_pointer
|
||||
|
@ -51,12 +52,17 @@ oem_id=
|
|||
oem_revision=0
|
||||
oem_table_id=
|
||||
|
||||
[system.clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=1000
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.cpu0]
|
||||
type=TimingSimpleCPU
|
||||
children=dtb interrupts isa itb tracer
|
||||
children=apic_clk_domain dtb interrupts isa itb tracer
|
||||
branchPred=Null
|
||||
checker=Null
|
||||
clock=500
|
||||
clk_domain=system.cpu_clk_domain
|
||||
cpu_id=0
|
||||
do_checkpoint_insts=true
|
||||
do_quiesce=true
|
||||
|
@ -82,6 +88,11 @@ workload=
|
|||
dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1]
|
||||
icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
|
||||
|
||||
[system.cpu0.apic_clk_domain]
|
||||
type=DerivedClockDomain
|
||||
clk_divider=16
|
||||
clk_domain=system.cpu_clk_domain
|
||||
|
||||
[system.cpu0.dtb]
|
||||
type=X86TLB
|
||||
children=walker
|
||||
|
@ -90,20 +101,21 @@ walker=system.cpu0.dtb.walker
|
|||
|
||||
[system.cpu0.dtb.walker]
|
||||
type=X86PagetableWalker
|
||||
clock=500
|
||||
clk_domain=system.cpu_clk_domain
|
||||
num_squash_per_cycle=4
|
||||
system=system
|
||||
port=system.ruby.l1_cntrl0.sequencer.slave[3]
|
||||
|
||||
[system.cpu0.interrupts]
|
||||
type=X86LocalApic
|
||||
clock=8000
|
||||
clk_domain=system.cpu0.apic_clk_domain
|
||||
int_latency=1000
|
||||
pio_addr=2305843009213693952
|
||||
pio_latency=100000
|
||||
system=system
|
||||
int_master=system.piobus.slave[4]
|
||||
int_slave=system.piobus.master[19]
|
||||
pio=system.piobus.master[18]
|
||||
int_slave=system.piobus.master[18]
|
||||
pio=system.piobus.master[17]
|
||||
|
||||
[system.cpu0.isa]
|
||||
type=X86ISA
|
||||
|
@ -116,7 +128,8 @@ walker=system.cpu0.itb.walker
|
|||
|
||||
[system.cpu0.itb.walker]
|
||||
type=X86PagetableWalker
|
||||
clock=500
|
||||
clk_domain=system.cpu_clk_domain
|
||||
num_squash_per_cycle=4
|
||||
system=system
|
||||
port=system.ruby.l1_cntrl0.sequencer.slave[2]
|
||||
|
||||
|
@ -125,10 +138,10 @@ type=ExeTracer
|
|||
|
||||
[system.cpu1]
|
||||
type=TimingSimpleCPU
|
||||
children=dtb interrupts isa itb tracer
|
||||
children=apic_clk_domain dtb interrupts isa itb tracer
|
||||
branchPred=Null
|
||||
checker=Null
|
||||
clock=500
|
||||
clk_domain=system.cpu_clk_domain
|
||||
cpu_id=1
|
||||
do_checkpoint_insts=true
|
||||
do_quiesce=true
|
||||
|
@ -154,6 +167,11 @@ workload=
|
|||
dcache_port=system.ruby.l1_cntrl1.sequencer.slave[1]
|
||||
icache_port=system.ruby.l1_cntrl1.sequencer.slave[0]
|
||||
|
||||
[system.cpu1.apic_clk_domain]
|
||||
type=DerivedClockDomain
|
||||
clk_divider=16
|
||||
clk_domain=system.cpu_clk_domain
|
||||
|
||||
[system.cpu1.dtb]
|
||||
type=X86TLB
|
||||
children=walker
|
||||
|
@ -162,20 +180,21 @@ walker=system.cpu1.dtb.walker
|
|||
|
||||
[system.cpu1.dtb.walker]
|
||||
type=X86PagetableWalker
|
||||
clock=500
|
||||
clk_domain=system.cpu_clk_domain
|
||||
num_squash_per_cycle=4
|
||||
system=system
|
||||
port=system.ruby.l1_cntrl1.sequencer.slave[3]
|
||||
|
||||
[system.cpu1.interrupts]
|
||||
type=X86LocalApic
|
||||
clock=8000
|
||||
clk_domain=system.cpu1.apic_clk_domain
|
||||
int_latency=1000
|
||||
pio_addr=2305843009213693952
|
||||
pio_latency=100000
|
||||
system=system
|
||||
int_master=system.piobus.slave[5]
|
||||
int_slave=system.piobus.master[21]
|
||||
pio=system.piobus.master[20]
|
||||
int_slave=system.piobus.master[20]
|
||||
pio=system.piobus.master[19]
|
||||
|
||||
[system.cpu1.isa]
|
||||
type=X86ISA
|
||||
|
@ -188,13 +207,19 @@ walker=system.cpu1.itb.walker
|
|||
|
||||
[system.cpu1.itb.walker]
|
||||
type=X86PagetableWalker
|
||||
clock=500
|
||||
clk_domain=system.cpu_clk_domain
|
||||
num_squash_per_cycle=4
|
||||
system=system
|
||||
port=system.ruby.l1_cntrl1.sequencer.slave[2]
|
||||
|
||||
[system.cpu1.tracer]
|
||||
type=ExeTracer
|
||||
|
||||
[system.cpu_clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=500
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.e820_table]
|
||||
type=X86E820Table
|
||||
children=entries0 entries1 entries2
|
||||
|
@ -583,7 +608,7 @@ system=system
|
|||
|
||||
[system.pc.behind_pci]
|
||||
type=IsaFake
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
fake_mem=false
|
||||
pio_addr=9223372036854779128
|
||||
pio_latency=100000
|
||||
|
@ -596,18 +621,18 @@ ret_data8=255
|
|||
system=system
|
||||
update_data=false
|
||||
warn_access=
|
||||
pio=system.piobus.master[12]
|
||||
pio=system.piobus.master[11]
|
||||
|
||||
[system.pc.com_1]
|
||||
type=Uart8250
|
||||
children=terminal
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
pio_addr=9223372036854776824
|
||||
pio_latency=100000
|
||||
platform=system.pc
|
||||
system=system
|
||||
terminal=system.pc.com_1.terminal
|
||||
pio=system.piobus.master[13]
|
||||
pio=system.piobus.master[12]
|
||||
|
||||
[system.pc.com_1.terminal]
|
||||
type=Terminal
|
||||
|
@ -625,7 +650,7 @@ port=3456
|
|||
|
||||
[system.pc.fake_com_2]
|
||||
type=IsaFake
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
fake_mem=false
|
||||
pio_addr=9223372036854776568
|
||||
pio_latency=100000
|
||||
|
@ -638,11 +663,11 @@ ret_data8=255
|
|||
system=system
|
||||
update_data=false
|
||||
warn_access=
|
||||
pio=system.piobus.master[14]
|
||||
pio=system.piobus.master[13]
|
||||
|
||||
[system.pc.fake_com_3]
|
||||
type=IsaFake
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
fake_mem=false
|
||||
pio_addr=9223372036854776808
|
||||
pio_latency=100000
|
||||
|
@ -655,11 +680,11 @@ ret_data8=255
|
|||
system=system
|
||||
update_data=false
|
||||
warn_access=
|
||||
pio=system.piobus.master[15]
|
||||
pio=system.piobus.master[14]
|
||||
|
||||
[system.pc.fake_com_4]
|
||||
type=IsaFake
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
fake_mem=false
|
||||
pio_addr=9223372036854776552
|
||||
pio_latency=100000
|
||||
|
@ -672,11 +697,11 @@ ret_data8=255
|
|||
system=system
|
||||
update_data=false
|
||||
warn_access=
|
||||
pio=system.piobus.master[16]
|
||||
pio=system.piobus.master[15]
|
||||
|
||||
[system.pc.fake_floppy]
|
||||
type=IsaFake
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
fake_mem=false
|
||||
pio_addr=9223372036854776818
|
||||
pio_latency=100000
|
||||
|
@ -689,11 +714,11 @@ ret_data8=255
|
|||
system=system
|
||||
update_data=false
|
||||
warn_access=
|
||||
pio=system.piobus.master[17]
|
||||
pio=system.piobus.master[16]
|
||||
|
||||
[system.pc.i_dont_exist]
|
||||
type=IsaFake
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
fake_mem=false
|
||||
pio_addr=9223372036854775936
|
||||
pio_latency=100000
|
||||
|
@ -706,12 +731,13 @@ ret_data8=255
|
|||
system=system
|
||||
update_data=false
|
||||
warn_access=
|
||||
pio=system.piobus.master[11]
|
||||
pio=system.piobus.master[10]
|
||||
|
||||
[system.pc.pciconfig]
|
||||
type=PciConfigAll
|
||||
bus=0
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
pio_addr=0
|
||||
pio_latency=30000
|
||||
platform=system.pc
|
||||
size=16777216
|
||||
|
@ -734,24 +760,24 @@ speaker=system.pc.south_bridge.speaker
|
|||
[system.pc.south_bridge.cmos]
|
||||
type=Cmos
|
||||
children=int_pin
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
int_pin=system.pc.south_bridge.cmos.int_pin
|
||||
pio_addr=9223372036854775920
|
||||
pio_latency=100000
|
||||
system=system
|
||||
time=Sun Jan 1 00:00:00 2012
|
||||
pio=system.piobus.master[1]
|
||||
pio=system.piobus.master[0]
|
||||
|
||||
[system.pc.south_bridge.cmos.int_pin]
|
||||
type=X86IntSourcePin
|
||||
|
||||
[system.pc.south_bridge.dma1]
|
||||
type=I8237
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
pio_addr=9223372036854775808
|
||||
pio_latency=100000
|
||||
system=system
|
||||
pio=system.piobus.master[2]
|
||||
pio=system.piobus.master[1]
|
||||
|
||||
[system.pc.south_bridge.ide]
|
||||
type=IdeController
|
||||
|
@ -794,7 +820,7 @@ SubClassCode=1
|
|||
SubsystemID=0
|
||||
SubsystemVendorID=0
|
||||
VendorID=32902
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
config_latency=20000
|
||||
ctrl_offset=0
|
||||
disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
|
||||
|
@ -805,9 +831,9 @@ pci_func=0
|
|||
pio_latency=30000
|
||||
platform=system.pc
|
||||
system=system
|
||||
config=system.piobus.master[4]
|
||||
config=system.piobus.master[3]
|
||||
dma=system.piobus.slave[0]
|
||||
pio=system.piobus.master[3]
|
||||
pio=system.piobus.master[2]
|
||||
|
||||
[system.pc.south_bridge.ide.disks0]
|
||||
type=IdeDisk
|
||||
|
@ -929,19 +955,19 @@ number=12
|
|||
[system.pc.south_bridge.io_apic]
|
||||
type=I82094AA
|
||||
apic_id=2
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
external_int_pic=system.pc.south_bridge.pic1
|
||||
int_latency=1000
|
||||
pio_addr=4273995776
|
||||
pio_latency=100000
|
||||
system=system
|
||||
int_master=system.piobus.slave[1]
|
||||
pio=system.piobus.master[10]
|
||||
pio=system.piobus.master[9]
|
||||
|
||||
[system.pc.south_bridge.keyboard]
|
||||
type=I8042
|
||||
children=keyboard_int_pin mouse_int_pin
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
command_port=9223372036854775908
|
||||
data_port=9223372036854775904
|
||||
keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
|
||||
|
@ -949,7 +975,7 @@ mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
|
|||
pio_addr=0
|
||||
pio_latency=100000
|
||||
system=system
|
||||
pio=system.piobus.master[5]
|
||||
pio=system.piobus.master[4]
|
||||
|
||||
[system.pc.south_bridge.keyboard.keyboard_int_pin]
|
||||
type=X86IntSourcePin
|
||||
|
@ -960,14 +986,14 @@ type=X86IntSourcePin
|
|||
[system.pc.south_bridge.pic1]
|
||||
type=I8259
|
||||
children=output
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
mode=I8259Master
|
||||
output=system.pc.south_bridge.pic1.output
|
||||
pio_addr=9223372036854775840
|
||||
pio_latency=100000
|
||||
slave=system.pc.south_bridge.pic2
|
||||
system=system
|
||||
pio=system.piobus.master[6]
|
||||
pio=system.piobus.master[5]
|
||||
|
||||
[system.pc.south_bridge.pic1.output]
|
||||
type=X86IntSourcePin
|
||||
|
@ -975,14 +1001,14 @@ type=X86IntSourcePin
|
|||
[system.pc.south_bridge.pic2]
|
||||
type=I8259
|
||||
children=output
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
mode=I8259Slave
|
||||
output=system.pc.south_bridge.pic2.output
|
||||
pio_addr=9223372036854775968
|
||||
pio_latency=100000
|
||||
slave=Null
|
||||
system=system
|
||||
pio=system.piobus.master[7]
|
||||
pio=system.piobus.master[6]
|
||||
|
||||
[system.pc.south_bridge.pic2.output]
|
||||
type=X86IntSourcePin
|
||||
|
@ -990,41 +1016,46 @@ type=X86IntSourcePin
|
|||
[system.pc.south_bridge.pit]
|
||||
type=I8254
|
||||
children=int_pin
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
int_pin=system.pc.south_bridge.pit.int_pin
|
||||
pio_addr=9223372036854775872
|
||||
pio_latency=100000
|
||||
system=system
|
||||
pio=system.piobus.master[8]
|
||||
pio=system.piobus.master[7]
|
||||
|
||||
[system.pc.south_bridge.pit.int_pin]
|
||||
type=X86IntSourcePin
|
||||
|
||||
[system.pc.south_bridge.speaker]
|
||||
type=PcSpeaker
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
i8254=system.pc.south_bridge.pit
|
||||
pio_addr=9223372036854775905
|
||||
pio_latency=100000
|
||||
system=system
|
||||
pio=system.piobus.master[9]
|
||||
pio=system.piobus.master[8]
|
||||
|
||||
[system.physmem]
|
||||
type=SimpleDRAM
|
||||
activation_limit=4
|
||||
addr_mapping=RaBaChCo
|
||||
banks_per_rank=8
|
||||
burst_length=8
|
||||
channels=1
|
||||
clock=1000
|
||||
conf_table_reported=false
|
||||
clk_domain=system.clk_domain
|
||||
conf_table_reported=true
|
||||
device_bus_width=8
|
||||
device_rowbuffer_size=1024
|
||||
devices_per_rank=8
|
||||
in_addr_map=true
|
||||
lines_per_rowbuffer=32
|
||||
mem_sched_policy=frfcfs
|
||||
null=false
|
||||
page_policy=open
|
||||
range=0:134217727
|
||||
ranks_per_channel=2
|
||||
read_buffer_size=32
|
||||
static_backend_latency=10000
|
||||
static_frontend_latency=10000
|
||||
tBURST=5000
|
||||
tCL=13750
|
||||
tRCD=13750
|
||||
|
@ -1035,36 +1066,39 @@ tWTR=7500
|
|||
tXAW=40000
|
||||
write_buffer_size=32
|
||||
write_thresh_perc=70
|
||||
zero=false
|
||||
port=system.piobus.master[0]
|
||||
port=system.piobus.master[21]
|
||||
|
||||
[system.piobus]
|
||||
type=NoncoherentBus
|
||||
block_size=64
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
header_cycles=1
|
||||
use_default_range=true
|
||||
width=8
|
||||
default=system.pc.pciconfig.pio
|
||||
master=system.physmem.port system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.cpu0.interrupts.pio system.cpu0.interrupts.int_slave system.cpu1.interrupts.pio system.cpu1.interrupts.int_slave
|
||||
master=system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.cpu0.interrupts.pio system.cpu0.interrupts.int_slave system.cpu1.interrupts.pio system.cpu1.interrupts.int_slave system.physmem.port
|
||||
slave=system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master system.ruby.l1_cntrl0.sequencer.pio_port system.ruby.l1_cntrl1.sequencer.pio_port system.cpu0.interrupts.int_master system.cpu1.interrupts.int_master
|
||||
|
||||
[system.ruby]
|
||||
type=RubySystem
|
||||
children=dir_cntrl0 dma_cntrl0 l1_cntrl0 l1_cntrl1 l2_cntrl0 network profiler
|
||||
children=clk_domain dir_cntrl0 dma_cntrl0 l1_cntrl0 l1_cntrl1 l2_cntrl0 memctrl_clk_domain network profiler
|
||||
block_size_bytes=64
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
mem_size=134217728
|
||||
no_mem_vec=false
|
||||
random_seed=1234
|
||||
randomization=false
|
||||
stats_filename=ruby.stats
|
||||
|
||||
[system.ruby.clk_domain]
|
||||
type=SrcClockDomain
|
||||
clock=500
|
||||
voltage_domain=system.voltage_domain
|
||||
|
||||
[system.ruby.dir_cntrl0]
|
||||
type=Directory_Controller
|
||||
children=directory memBuffer
|
||||
buffer_size=0
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
cntrl_id=3
|
||||
directory=system.ruby.dir_cntrl0.directory
|
||||
directory_latency=6
|
||||
|
@ -1074,7 +1108,7 @@ peer=Null
|
|||
recycle_latency=10
|
||||
ruby_system=system.ruby
|
||||
to_mem_ctrl_latency=1
|
||||
transitions_per_cycle=32
|
||||
transitions_per_cycle=4
|
||||
version=0
|
||||
|
||||
[system.ruby.dir_cntrl0.directory]
|
||||
|
@ -1092,7 +1126,7 @@ bank_busy_time=11
|
|||
bank_queue_size=12
|
||||
banks_per_rank=8
|
||||
basic_bus_busy_time=2
|
||||
clock=2500
|
||||
clk_domain=system.ruby.memctrl_clk_domain
|
||||
dimm_bit_0=12
|
||||
dimms_per_channel=2
|
||||
mem_ctl_latency=12
|
||||
|
@ -1111,7 +1145,7 @@ version=0
|
|||
type=DMA_Controller
|
||||
children=dma_sequencer
|
||||
buffer_size=0
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
cntrl_id=4
|
||||
dma_sequencer=system.ruby.dma_cntrl0.dma_sequencer
|
||||
number_of_TBEs=256
|
||||
|
@ -1119,13 +1153,13 @@ peer=Null
|
|||
recycle_latency=10
|
||||
request_latency=6
|
||||
ruby_system=system.ruby
|
||||
transitions_per_cycle=32
|
||||
transitions_per_cycle=4
|
||||
version=0
|
||||
|
||||
[system.ruby.dma_cntrl0.dma_sequencer]
|
||||
type=DMASequencer
|
||||
access_phys_mem=true
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
ruby_system=system.ruby
|
||||
support_data_reqs=true
|
||||
support_inst_reqs=true
|
||||
|
@ -1141,7 +1175,7 @@ children=L1Dcache L1Icache prefetcher sequencer
|
|||
L1Dcache=system.ruby.l1_cntrl0.L1Dcache
|
||||
L1Icache=system.ruby.l1_cntrl0.L1Icache
|
||||
buffer_size=0
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
cntrl_id=0
|
||||
enable_prefetch=false
|
||||
l1_request_latency=2
|
||||
|
@ -1155,7 +1189,7 @@ ruby_system=system.ruby
|
|||
send_evictions=false
|
||||
sequencer=system.ruby.l1_cntrl0.sequencer
|
||||
to_l2_latency=1
|
||||
transitions_per_cycle=32
|
||||
transitions_per_cycle=4
|
||||
version=0
|
||||
|
||||
[system.ruby.l1_cntrl0.L1Dcache]
|
||||
|
@ -1199,7 +1233,7 @@ unit_filter=8
|
|||
[system.ruby.l1_cntrl0.sequencer]
|
||||
type=RubySequencer
|
||||
access_phys_mem=true
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
dcache=system.ruby.l1_cntrl0.L1Dcache
|
||||
deadlock_threshold=500000
|
||||
icache=system.ruby.l1_cntrl0.L1Icache
|
||||
|
@ -1220,7 +1254,7 @@ children=L1Dcache L1Icache prefetcher sequencer
|
|||
L1Dcache=system.ruby.l1_cntrl1.L1Dcache
|
||||
L1Icache=system.ruby.l1_cntrl1.L1Icache
|
||||
buffer_size=0
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
cntrl_id=1
|
||||
enable_prefetch=false
|
||||
l1_request_latency=2
|
||||
|
@ -1234,7 +1268,7 @@ ruby_system=system.ruby
|
|||
send_evictions=false
|
||||
sequencer=system.ruby.l1_cntrl1.sequencer
|
||||
to_l2_latency=1
|
||||
transitions_per_cycle=32
|
||||
transitions_per_cycle=4
|
||||
version=1
|
||||
|
||||
[system.ruby.l1_cntrl1.L1Dcache]
|
||||
|
@ -1278,7 +1312,7 @@ unit_filter=8
|
|||
[system.ruby.l1_cntrl1.sequencer]
|
||||
type=RubySequencer
|
||||
access_phys_mem=true
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
dcache=system.ruby.l1_cntrl1.L1Dcache
|
||||
deadlock_threshold=500000
|
||||
icache=system.ruby.l1_cntrl1.L1Icache
|
||||
|
@ -1298,7 +1332,7 @@ type=L2Cache_Controller
|
|||
children=L2cache
|
||||
L2cache=system.ruby.l2_cntrl0.L2cache
|
||||
buffer_size=0
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
cntrl_id=2
|
||||
l2_request_latency=2
|
||||
l2_response_latency=2
|
||||
|
@ -1307,7 +1341,7 @@ peer=Null
|
|||
recycle_latency=10
|
||||
ruby_system=system.ruby
|
||||
to_l1_latency=1
|
||||
transitions_per_cycle=32
|
||||
transitions_per_cycle=4
|
||||
version=0
|
||||
|
||||
[system.ruby.l2_cntrl0.L2cache]
|
||||
|
@ -1324,12 +1358,17 @@ start_index_bit=6
|
|||
tagAccessLatency=1
|
||||
tagArrayBanks=1
|
||||
|
||||
[system.ruby.memctrl_clk_domain]
|
||||
type=DerivedClockDomain
|
||||
clk_divider=3
|
||||
clk_domain=system.ruby.clk_domain
|
||||
|
||||
[system.ruby.network]
|
||||
type=SimpleNetwork
|
||||
children=ext_links0 ext_links1 ext_links2 ext_links3 ext_links4 int_links0 int_links1 int_links2 int_links3 int_links4
|
||||
adaptive_routing=false
|
||||
buffer_size=0
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
control_msg_size=8
|
||||
endpoint_bandwidth=1000
|
||||
ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1 system.ruby.network.ext_links2 system.ruby.network.ext_links3 system.ruby.network.ext_links4
|
||||
|
@ -1351,7 +1390,7 @@ weight=1
|
|||
|
||||
[system.ruby.network.ext_links0.int_node]
|
||||
type=Switch
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
router_id=0
|
||||
virt_nets=10
|
||||
|
||||
|
@ -1367,7 +1406,7 @@ weight=1
|
|||
|
||||
[system.ruby.network.ext_links1.int_node]
|
||||
type=Switch
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
router_id=1
|
||||
virt_nets=10
|
||||
|
||||
|
@ -1383,7 +1422,7 @@ weight=1
|
|||
|
||||
[system.ruby.network.ext_links2.int_node]
|
||||
type=Switch
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
router_id=2
|
||||
virt_nets=10
|
||||
|
||||
|
@ -1399,7 +1438,7 @@ weight=1
|
|||
|
||||
[system.ruby.network.ext_links3.int_node]
|
||||
type=Switch
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
router_id=3
|
||||
virt_nets=10
|
||||
|
||||
|
@ -1415,7 +1454,7 @@ weight=1
|
|||
|
||||
[system.ruby.network.ext_links4.int_node]
|
||||
type=Switch
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
router_id=4
|
||||
virt_nets=10
|
||||
|
||||
|
@ -1431,7 +1470,7 @@ weight=1
|
|||
|
||||
[system.ruby.network.int_links0.node_b]
|
||||
type=Switch
|
||||
clock=500
|
||||
clk_domain=system.ruby.clk_domain
|
||||
router_id=5
|
||||
virt_nets=10
|
||||
|
||||
|
@ -1502,7 +1541,7 @@ version=
|
|||
[system.sys_port_proxy]
|
||||
type=RubyPortProxy
|
||||
access_phys_mem=true
|
||||
clock=1000
|
||||
clk_domain=system.clk_domain
|
||||
ruby_system=system.ruby
|
||||
support_data_reqs=true
|
||||
support_inst_reqs=true
|
||||
|
@ -1512,3 +1551,7 @@ using_ruby_tester=false
|
|||
version=0
|
||||
slave=system.system_port
|
||||
|
||||
[system.voltage_domain]
|
||||
type=VoltageDomain
|
||||
voltage=1.000000
|
||||
|
||||
|
|
|
@ -1,57 +1,57 @@
|
|||
Real time: Jun/24/2013 17:50:00
|
||||
Real time: Aug/19/2013 13:53:01
|
||||
|
||||
Profiler Stats
|
||||
--------------
|
||||
Elapsed_time_in_seconds: 779
|
||||
Elapsed_time_in_minutes: 12.9833
|
||||
Elapsed_time_in_hours: 0.216389
|
||||
Elapsed_time_in_days: 0.0090162
|
||||
Elapsed_time_in_seconds: 788
|
||||
Elapsed_time_in_minutes: 13.1333
|
||||
Elapsed_time_in_hours: 0.218889
|
||||
Elapsed_time_in_days: 0.00912037
|
||||
|
||||
Virtual_time_in_seconds: 777.47
|
||||
Virtual_time_in_minutes: 12.9578
|
||||
Virtual_time_in_hours: 0.215964
|
||||
Virtual_time_in_days: 0.0089985
|
||||
Virtual_time_in_seconds: 786.9
|
||||
Virtual_time_in_minutes: 13.115
|
||||
Virtual_time_in_hours: 0.218583
|
||||
Virtual_time_in_days: 0.00910764
|
||||
|
||||
Ruby_current_time: 10410298653
|
||||
Ruby_current_time: 10608810122
|
||||
Ruby_start_time: 0
|
||||
Ruby_cycles: 10410298653
|
||||
Ruby_cycles: 10608810122
|
||||
|
||||
mbytes_resident: 607.297
|
||||
mbytes_total: 853.949
|
||||
resident_ratio: 0.711172
|
||||
mbytes_resident: 611.57
|
||||
mbytes_total: 857.859
|
||||
resident_ratio: 0.712907
|
||||
|
||||
Busy Controller Counts:
|
||||
L1Cache-0:0 L1Cache-1:0
|
||||
L1Cache-0:10 L1Cache-1:9
|
||||
L2Cache-0:0
|
||||
Directory-0:0
|
||||
DMA-0:0
|
||||
|
||||
Busy Bank Count:0
|
||||
|
||||
sequencer_requests_outstanding: [binsize: 1 max: 2 count: 151894334 average: 1.00011 | standard deviation: 0.010498 | 0 151877593 16741 ]
|
||||
sequencer_requests_outstanding: [binsize: 1 max: 2 count: 154826690 average: 1.00012 | standard deviation: 0.0109671 | 0 154808066 18624 ]
|
||||
|
||||
All Non-Zero Cycle Demand Cache Accesses
|
||||
----------------------------------------
|
||||
latency: [binsize: 16 max: 273 count: 151894333 average: 3.45796 | standard deviation: 5.18178 | 149239567 2474629 249 0 0 0 81668 388 77 47537 49060 219 193 742 0 0 3 1 ]
|
||||
latency: LD: [binsize: 16 max: 220 count: 14873782 average: 5.10749 | standard deviation: 8.69963 | 13484760 1354788 171 0 0 0 11397 128 12 15254 6999 38 58 177 ]
|
||||
latency: ST: [binsize: 16 max: 273 count: 9469041 average: 5.2084 | standard deviation: 15.5209 | 9119543 221922 42 0 0 0 64064 225 51 21207 41243 161 105 474 0 0 3 1 ]
|
||||
latency: IFETCH: [binsize: 16 max: 212 count: 126382608 average: 3.11852 | standard deviation: 2.02576 | 125570339 795768 9 0 0 0 4998 18 13 10748 580 20 30 85 ]
|
||||
latency: RMW_Read: [binsize: 16 max: 215 count: 490938 average: 6.04036 | standard deviation: 9.43363 | 425802 63708 13 0 0 0 1010 15 0 199 188 0 0 3 ]
|
||||
latency: Locked_RMW_Read: [binsize: 16 max: 216 count: 338982 average: 5.45592 | standard deviation: 7.80247 | 300141 38443 14 0 0 0 199 2 1 129 50 0 0 3 ]
|
||||
latency: Locked_RMW_Write: [binsize: 1 max: 3 count: 338982 average: 3 | standard deviation: 0 | 0 0 0 338982 ]
|
||||
hit latency: [binsize: 1 max: 3 count: 149239567 average: 3 | standard deviation: 0 | 0 0 0 149239567 ]
|
||||
hit latency: LD: [binsize: 1 max: 3 count: 13484760 average: 3 | standard deviation: 0 | 0 0 0 13484760 ]
|
||||
hit latency: ST: [binsize: 1 max: 3 count: 9119543 average: 3 | standard deviation: 0 | 0 0 0 9119543 ]
|
||||
hit latency: IFETCH: [binsize: 1 max: 3 count: 125570339 average: 3 | standard deviation: 0 | 0 0 0 125570339 ]
|
||||
hit latency: RMW_Read: [binsize: 1 max: 3 count: 425802 average: 3 | standard deviation: 0 | 0 0 0 425802 ]
|
||||
hit latency: Locked_RMW_Read: [binsize: 1 max: 3 count: 300141 average: 3 | standard deviation: 0 | 0 0 0 300141 ]
|
||||
hit latency: Locked_RMW_Write: [binsize: 1 max: 3 count: 338982 average: 3 | standard deviation: 0 | 0 0 0 338982 ]
|
||||
miss latency: [binsize: 16 max: 273 count: 2654766 average: 29.2027 | standard deviation: 29.3549 | 0 2474629 249 0 0 0 81668 388 77 47537 49060 219 193 742 0 0 3 1 ]
|
||||
miss latency: LD: [binsize: 16 max: 220 count: 1389022 average: 25.5672 | standard deviation: 18.6738 | 0 1354788 171 0 0 0 11397 128 12 15254 6999 38 58 177 ]
|
||||
miss latency: ST: [binsize: 16 max: 273 count: 349498 average: 62.8328 | standard deviation: 55.4881 | 0 221922 42 0 0 0 64064 225 51 21207 41243 161 105 474 0 0 3 1 ]
|
||||
miss latency: IFETCH: [binsize: 16 max: 212 count: 812269 average: 21.4412 | standard deviation: 17.3381 | 0 795768 9 0 0 0 4998 18 13 10748 580 20 30 85 ]
|
||||
miss latency: RMW_Read: [binsize: 16 max: 215 count: 65136 average: 25.9156 | standard deviation: 14.6732 | 0 63708 13 0 0 0 1010 15 0 199 188 0 0 3 ]
|
||||
miss latency: Locked_RMW_Read: [binsize: 16 max: 216 count: 38841 average: 24.4338 | standard deviation: 11.16 | 0 38443 14 0 0 0 199 2 1 129 50 0 0 3 ]
|
||||
latency: [binsize: 8 max: 146 count: 154826689 average: 3.40667 | standard deviation: 3.89546 | 152128107 0 2401408 123714 808 2 0 0 0 77303 1369 61 178 88161 4467 160 159 697 95 ]
|
||||
latency: LD: [binsize: 8 max: 145 count: 15355330 average: 5.00367 | standard deviation: 7.16019 | 13922963 0 1353229 47168 707 0 0 0 0 9533 185 18 25 20231 1016 49 23 146 37 ]
|
||||
latency: ST: [binsize: 8 max: 146 count: 9754590 average: 4.6097 | standard deviation: 10.5962 | 9399926 0 199287 31109 53 1 0 0 0 62468 1144 36 142 56433 3258 93 112 471 57 ]
|
||||
latency: IFETCH: [binsize: 8 max: 145 count: 128502469 average: 3.10882 | standard deviation: 1.62805 | 127704898 0 781778 353 6 0 0 0 0 4133 20 5 6 10992 160 18 23 76 1 ]
|
||||
latency: RMW_Read: [binsize: 8 max: 143 count: 526560 average: 6.05821 | standard deviation: 8.42496 | 454441 0 43162 27521 11 1 0 0 0 999 18 2 4 371 26 0 1 3 ]
|
||||
latency: Locked_RMW_Read: [binsize: 8 max: 143 count: 343870 average: 5.61917 | standard deviation: 7.40449 | 302009 0 23952 17563 31 0 0 0 0 170 2 0 1 134 7 0 0 1 ]
|
||||
latency: Locked_RMW_Write: [binsize: 1 max: 3 count: 343870 average: 3 | standard deviation: 0 | 0 0 0 343870 ]
|
||||
hit latency: [binsize: 1 max: 3 count: 152128107 average: 3 | standard deviation: 0 | 0 0 0 152128107 ]
|
||||
hit latency: LD: [binsize: 1 max: 3 count: 13922963 average: 3 | standard deviation: 0 | 0 0 0 13922963 ]
|
||||
hit latency: ST: [binsize: 1 max: 3 count: 9399926 average: 3 | standard deviation: 0 | 0 0 0 9399926 ]
|
||||
hit latency: IFETCH: [binsize: 1 max: 3 count: 127704898 average: 3 | standard deviation: 0 | 0 0 0 127704898 ]
|
||||
hit latency: RMW_Read: [binsize: 1 max: 3 count: 454441 average: 3 | standard deviation: 0 | 0 0 0 454441 ]
|
||||
hit latency: Locked_RMW_Read: [binsize: 1 max: 3 count: 302009 average: 3 | standard deviation: 0 | 0 0 0 302009 ]
|
||||
hit latency: Locked_RMW_Write: [binsize: 1 max: 3 count: 343870 average: 3 | standard deviation: 0 | 0 0 0 343870 ]
|
||||
miss latency: [binsize: 8 max: 146 count: 2698582 average: 26.332 | standard deviation: 18.3228 | 0 0 2401408 123714 808 2 0 0 0 77303 1369 61 178 88161 4467 160 159 697 95 ]
|
||||
miss latency: LD: [binsize: 8 max: 145 count: 1432367 average: 24.4798 | standard deviation: 11.4571 | 0 0 1353229 47168 707 0 0 0 0 9533 185 18 25 20231 1016 49 23 146 37 ]
|
||||
miss latency: ST: [binsize: 8 max: 146 count: 354664 average: 47.2728 | standard deviation: 34.6308 | 0 0 199287 31109 53 1 0 0 0 62468 1144 36 142 56433 3258 93 112 471 57 ]
|
||||
miss latency: IFETCH: [binsize: 8 max: 145 count: 797571 average: 20.5323 | standard deviation: 11.026 | 0 0 781778 353 6 0 0 0 0 4133 20 5 6 10992 160 18 23 76 1 ]
|
||||
miss latency: RMW_Read: [binsize: 8 max: 143 count: 72119 average: 25.3288 | standard deviation: 9.37846 | 0 0 43162 27521 11 1 0 0 0 999 18 2 4 371 26 0 1 3 ]
|
||||
miss latency: Locked_RMW_Read: [binsize: 8 max: 143 count: 41861 average: 24.5153 | standard deviation: 6.61955 | 0 0 23952 17563 31 0 0 0 0 170 2 0 1 134 7 0 0 1 ]
|
||||
|
||||
Request vs. RubySystem State Profile
|
||||
--------------------------------
|
||||
|
@ -60,10 +60,10 @@ Request vs. RubySystem State Profile
|
|||
|
||||
Message Delayed Cycles
|
||||
----------------------
|
||||
Total_delay_cycles: [binsize: 1 max: 13 count: 10872111 average: 0.594835 | standard deviation: 1.42402 | 9255080 1027 577 868 1612870 996 93 113 108 307 2 12 11 47 ]
|
||||
virtual_network_0_delay_cycles: [binsize: 1 max: 13 count: 6098873 average: 1.04349 | standard deviation: 1.75782 | 4508308 488 183 246 1588097 865 93 112 105 304 2 12 11 47 ]
|
||||
virtual_network_1_delay_cycles: [binsize: 1 max: 9 count: 4691974 average: 0.021726 | standard deviation: 0.292754 | 4665904 440 309 530 24688 96 0 1 3 3 ]
|
||||
virtual_network_2_delay_cycles: [binsize: 1 max: 5 count: 81264 average: 0.0130439 | standard deviation: 0.207207 | 80868 99 85 92 85 35 ]
|
||||
Total_delay_cycles: [binsize: 1 max: 15 count: 11145866 average: 0.602427 | standard deviation: 1.43356 | 9466902 2991 1616 2582 1666934 2480 317 253 407 1077 12 18 80 196 0 1 ]
|
||||
virtual_network_0_delay_cycles: [binsize: 1 max: 15 count: 6232784 average: 1.04523 | standard deviation: 1.76212 | 4606142 1096 355 706 1619950 2278 313 251 380 1006 12 18 80 196 0 1 ]
|
||||
virtual_network_1_delay_cycles: [binsize: 1 max: 9 count: 4782799 average: 0.0411809 | standard deviation: 0.401372 | 4731531 1706 955 1706 46644 155 4 2 27 69 ]
|
||||
virtual_network_2_delay_cycles: [binsize: 1 max: 9 count: 130283 average: 0.0224435 | standard deviation: 0.272229 | 129229 189 306 170 340 47 0 0 0 2 ]
|
||||
virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
||||
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
||||
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
||||
|
@ -75,82 +75,82 @@ Total_delay_cycles: [binsize: 1 max: 13 count: 10872111 average: 0.594835 | stan
|
|||
Resource Usage
|
||||
--------------
|
||||
page_size: 4096
|
||||
user_time: 450
|
||||
user_time: 786
|
||||
system_time: 0
|
||||
page_reclaims: 147544
|
||||
page_reclaims: 147660
|
||||
page_faults: 18
|
||||
swaps: 0
|
||||
block_inputs: 16000
|
||||
block_outputs: 528
|
||||
block_inputs: 28976
|
||||
block_outputs: 584
|
||||
|
||||
Network Stats
|
||||
-------------
|
||||
|
||||
total_msg_count_Control: 8503962 68031696
|
||||
total_msg_count_Request_Control: 242054 1936432
|
||||
total_msg_count_Response_Data: 8805918 634026096
|
||||
total_msg_count_Response_Control: 10888710 87109680
|
||||
total_msg_count_Writeback_Data: 4768131 343305432
|
||||
total_msg_count_Writeback_Control: 288573 2308584
|
||||
total_msgs: 33497348 total_bytes: 1136717920
|
||||
total_msg_count_Control: 8613696 68909568
|
||||
total_msg_count_Request_Control: 388888 3111104
|
||||
total_msg_count_Response_Data: 8909307 641470104
|
||||
total_msg_count_Response_Control: 11246253 89970024
|
||||
total_msg_count_Writeback_Data: 4870245 350657640
|
||||
total_msg_count_Writeback_Control: 246630 1973040
|
||||
total_msgs: 34275019 total_bytes: 1156091480
|
||||
|
||||
switch_0_inlinks: 2
|
||||
switch_0_outlinks: 2
|
||||
links_utilized_percent_switch_0: 0.0345415
|
||||
links_utilized_percent_switch_0_link_0: 0.041172 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_0_link_1: 0.0279109 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_0: 0.0887881
|
||||
links_utilized_percent_switch_0_link_0: 0.0962951 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_0_link_1: 0.0812812 bw: 16000 base_latency: 1
|
||||
|
||||
outgoing_messages_switch_0_link_0_Request_Control: 42325 338600 [ 42325 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_0_Response_Data: 891237 64169064 [ 0 891237 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_0_Response_Control: 508805 4070440 [ 0 508805 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Control: 903142 7225136 [ 903142 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Response_Data: 39642 2854224 [ 0 39642 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Response_Control: 538120 4304960 [ 0 16344 521776 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Writeback_Data: 441059 31756248 [ 440946 113 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Writeback_Control: 43648 349184 [ 43648 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_0_Request_Control: 68316 546528 [ 68316 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_0_Response_Data: 2091869 150614568 [ 0 2091869 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_0_Response_Control: 1536393 12291144 [ 0 1536393 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Control: 2111573 16892584 [ 2111573 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Response_Data: 62891 4528152 [ 0 62891 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Response_Control: 1585964 12687712 [ 0 28931 1557033 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Writeback_Data: 1435880 103383360 [ 1435828 52 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_0_link_1_Writeback_Control: 59452 475616 [ 59452 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
|
||||
switch_1_inlinks: 2
|
||||
switch_1_outlinks: 2
|
||||
links_utilized_percent_switch_1: 0.0735457
|
||||
links_utilized_percent_switch_1_link_0: 0.0813533 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_1_link_1: 0.0657382 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_1: 0.0201086
|
||||
links_utilized_percent_switch_1_link_0: 0.0254745 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_1_link_1: 0.0147426 bw: 16000 base_latency: 1
|
||||
|
||||
outgoing_messages_switch_1_link_0_Request_Control: 38939 311512 [ 38939 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_0_Response_Data: 1742034 125426448 [ 0 1742034 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_0_Response_Control: 1220994 9767952 [ 0 1220994 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Control: 1751624 14012992 [ 1751624 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Response_Data: 32707 2354904 [ 0 32707 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Response_Control: 1253695 10029560 [ 0 16684 1237011 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Writeback_Data: 1148318 82678896 [ 1148183 135 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Writeback_Control: 52543 420344 [ 52543 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_0_Request_Control: 61967 495736 [ 61967 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_0_Response_Data: 565417 40710024 [ 0 565417 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_0_Response_Control: 254373 2034984 [ 0 254373 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Control: 587009 4696072 [ 587009 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Response_Data: 59362 4274064 [ 0 59362 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Response_Control: 296190 2369520 [ 0 24320 271870 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Writeback_Data: 187535 13502520 [ 187261 274 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_1_link_1_Writeback_Control: 22758 182064 [ 22758 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
|
||||
switch_2_inlinks: 2
|
||||
switch_2_outlinks: 2
|
||||
links_utilized_percent_switch_2: 0.112646
|
||||
links_utilized_percent_switch_2_link_0: 0.0997896 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_2_link_1: 0.125503 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_2: 0.111781
|
||||
links_utilized_percent_switch_2_link_0: 0.10039 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_2_link_1: 0.123172 bw: 16000 base_latency: 1
|
||||
|
||||
outgoing_messages_switch_2_link_0_Control: 2654766 21238128 [ 2654766 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Response_Data: 204249 14705928 [ 0 204249 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Response_Control: 1883194 15065552 [ 0 124407 1758787 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Writeback_Data: 1589377 114435144 [ 1589129 248 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Writeback_Control: 96191 769528 [ 96191 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Control: 179888 1439104 [ 179888 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Request_Control: 79526 636208 [ 79526 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Response_Data: 2683069 193180968 [ 0 2683069 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Response_Control: 1723392 13787136 [ 0 1723392 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Control: 2698582 21588656 [ 2698582 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Response_Data: 218197 15710184 [ 0 218197 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Response_Control: 1945127 15561016 [ 0 116224 1828903 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Writeback_Data: 1623415 116885880 [ 1623089 326 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_0_Writeback_Control: 82210 657680 [ 82210 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Control: 172650 1381200 [ 172650 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Request_Control: 128322 1026576 [ 128322 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Response_Data: 2674866 192590352 [ 0 2674866 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_2_link_1_Response_Control: 1759453 14075624 [ 0 1759453 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
|
||||
switch_3_inlinks: 2
|
||||
switch_3_outlinks: 2
|
||||
links_utilized_percent_switch_3: 0.00674787
|
||||
links_utilized_percent_switch_3_link_0: 0.00517055 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_3_link_1: 0.00832519 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_3: 0.00635103
|
||||
links_utilized_percent_switch_3_link_0: 0.00487369 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_3_link_1: 0.00782837 bw: 16000 base_latency: 1
|
||||
|
||||
outgoing_messages_switch_3_link_0_Control: 179888 1439104 [ 179888 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_0_Response_Data: 97786 7040592 [ 0 97786 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_0_Response_Control: 16577 132616 [ 0 16577 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_1_Response_Data: 179888 12951936 [ 0 179888 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_1_Response_Control: 114363 914904 [ 0 114363 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_0_Control: 172650 1381200 [ 172650 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_0_Response_Data: 94286 6788592 [ 0 94286 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_0_Response_Control: 12858 102864 [ 0 12858 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_1_Response_Data: 172650 12430800 [ 0 172650 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_3_link_1_Response_Control: 107144 857152 [ 0 107144 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
|
||||
switch_4_inlinks: 2
|
||||
switch_4_outlinks: 2
|
||||
|
@ -161,25 +161,25 @@ links_utilized_percent_switch_4: 0
|
|||
|
||||
switch_5_inlinks: 5
|
||||
switch_5_outlinks: 5
|
||||
links_utilized_percent_switch_5: 0.0454971
|
||||
links_utilized_percent_switch_5_link_0: 0.041172 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_1: 0.0813533 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_2: 0.0997896 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_3: 0.00517055 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5: 0.0454067
|
||||
links_utilized_percent_switch_5_link_0: 0.0962951 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_1: 0.0254745 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_2: 0.10039 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_3: 0.00487369 bw: 16000 base_latency: 1
|
||||
links_utilized_percent_switch_5_link_4: 0 bw: 16000 base_latency: 1
|
||||
|
||||
outgoing_messages_switch_5_link_0_Request_Control: 42325 338600 [ 42325 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_0_Response_Data: 891237 64169064 [ 0 891237 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_0_Response_Control: 508805 4070440 [ 0 508805 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_1_Request_Control: 38939 311512 [ 38939 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_1_Response_Data: 1742034 125426448 [ 0 1742034 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_1_Response_Control: 1220994 9767952 [ 0 1220994 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Control: 2654766 21238128 [ 2654766 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Response_Data: 204249 14705928 [ 0 204249 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Response_Control: 1883194 15065552 [ 0 124407 1758787 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Writeback_Data: 1589377 114435144 [ 1589129 248 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Writeback_Control: 96191 769528 [ 96191 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_3_Control: 179888 1439104 [ 179888 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_3_Response_Data: 97786 7040592 [ 0 97786 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_3_Response_Control: 16577 132616 [ 0 16577 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_0_Request_Control: 68316 546528 [ 68316 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_0_Response_Data: 2091869 150614568 [ 0 2091869 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_0_Response_Control: 1536393 12291144 [ 0 1536393 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_1_Request_Control: 61967 495736 [ 61967 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_1_Response_Data: 565417 40710024 [ 0 565417 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_1_Response_Control: 254373 2034984 [ 0 254373 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Control: 2698582 21588656 [ 2698582 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Response_Data: 218197 15710184 [ 0 218197 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Response_Control: 1945127 15561016 [ 0 116224 1828903 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Writeback_Data: 1623415 116885880 [ 1623089 326 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_2_Writeback_Control: 82210 657680 [ 82210 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_3_Control: 172650 1381200 [ 172650 0 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_3_Response_Data: 94286 6788592 [ 0 94286 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
outgoing_messages_switch_5_link_3_Response_Control: 12858 102864 [ 0 12858 0 0 0 0 0 0 0 0 ] base_latency: 1
|
||||
|
||||
|
|
Loading…
Reference in a new issue