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arm: Change TLB Software Caching

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In ARM, certain variables are only updated when a necessary change is
detected.  Having 2 SMT threads share a TLB resulted in these not being
updated as required.  This patch adds a thread context identifer to
assist in the invalidation of these variables.
This commit is contained in:
Mitch Hayenga 2015-09-30 11:14:19 -05:00
parent 9e07a7504c
commit ccf4f6c3d7
2 changed files with 5 additions and 2 deletions
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6
src/arch/arm/tlb.cc
View file

@ -78,7 +78,7 @@ TLB::TLB(const ArmTLBParams *p)
stage2Mmu(NULL), rangeMRU(1), stage2Mmu(NULL), rangeMRU(1),
aarch64(false), aarch64EL(EL0), isPriv(false), isSecure(false), aarch64(false), aarch64EL(EL0), isPriv(false), isSecure(false),
isHyp(false), asid(0), vmid(0), dacr(0), isHyp(false), asid(0), vmid(0), dacr(0),
miscRegValid(false), curTranType(NormalTran) miscRegValid(false), miscRegContext(0), curTranType(NormalTran)
{ {
tableWalker->setTlb(this); tableWalker->setTlb(this);
@ -1204,7 +1204,8 @@ TLB::updateMiscReg(ThreadContext *tc, ArmTranslationType tranType)
// check if the regs have changed, or the translation mode is different. // check if the regs have changed, or the translation mode is different.
// NOTE: the tran type doesn't affect stage 2 TLB's as they only handle // NOTE: the tran type doesn't affect stage 2 TLB's as they only handle
// one type of translation anyway // one type of translation anyway
if (miscRegValid && ((tranType == curTranType) || isStage2)) { if (miscRegValid && miscRegContext == tc->contextId() &&
((tranType == curTranType) || isStage2)) {
return; return;
} }
@ -1300,6 +1301,7 @@ TLB::updateMiscReg(ThreadContext *tc, ArmTranslationType tranType)
} }
} }
miscRegValid = true; miscRegValid = true;
miscRegContext = tc->contextId();
curTranType = tranType; curTranType = tranType;
} }

1
src/arch/arm/tlb.hh
View file

@ -327,6 +327,7 @@ protected:
HCR hcr; HCR hcr;
uint32_t dacr; uint32_t dacr;
bool miscRegValid; bool miscRegValid;
ContextID miscRegContext;
ArmTranslationType curTranType; ArmTranslationType curTranType;
// Cached copies of system-level properties // Cached copies of system-level properties