More Python hacking to deal with config.py split
and resulting recursive import trickiness. --HG-- extra : convert_revision : 1ea93861eb8d260c9f3920dda0b8106db3e03705
This commit is contained in:
parent
1233dbb998
commit
c39aea440c
35 changed files with 155 additions and 102 deletions
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@ -29,11 +29,40 @@
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import sys, types
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import sys, types
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import m5
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from util import *
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from m5 import panic, cc_main
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from convert import *
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from multidict import multidict
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from multidict import multidict
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# These utility functions have to come first because they're
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# referenced in params.py... otherwise they won't be defined when we
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# import params below, and the recursive import of this file from
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# params.py will not find these names.
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def isSimObject(value):
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return isinstance(value, SimObject)
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def isSimObjectClass(value):
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return issubclass(value, SimObject)
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def isSimObjectSequence(value):
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if not isinstance(value, (list, tuple)) or len(value) == 0:
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return False
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for val in value:
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if not isNullPointer(val) and not isSimObject(val):
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return False
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return True
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def isSimObjectOrSequence(value):
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return isSimObject(value) or isSimObjectSequence(value)
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# Have to import params up top since Param is referenced on initial
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# load (when SimObject class references Param to create a class
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# variable, the 'name' param)...
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from params import *
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# There are a few things we need that aren't in params.__all__ since
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# normal users don't need them
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from params import ParamDesc, isNullPointer, SimObjVector
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noDot = False
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noDot = False
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try:
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try:
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import pydot
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import pydot
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@ -564,7 +593,7 @@ class SimObject(object):
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for param in param_names:
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for param in param_names:
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value = self._values.get(param, None)
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value = self._values.get(param, None)
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if value != None:
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if value != None:
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if isproxy(value):
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if proxy.isproxy(value):
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try:
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try:
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value = value.unproxy(self)
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value = value.unproxy(self)
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except:
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except:
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@ -679,52 +708,6 @@ class SimObject(object):
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class ParamContext(SimObject):
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class ParamContext(SimObject):
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pass
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pass
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# Special class for NULL pointers. Note the special check in
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# make_param_value() above that lets these be assigned where a
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# SimObject is required.
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# only one copy of a particular node
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class NullSimObject(object):
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__metaclass__ = Singleton
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def __call__(cls):
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return cls
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def _instantiate(self, parent = None, path = ''):
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pass
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def ini_str(self):
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return 'Null'
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def unproxy(self, base):
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return self
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def set_path(self, parent, name):
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pass
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def __str__(self):
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return 'Null'
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# The only instance you'll ever need...
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Null = NULL = NullSimObject()
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def isSimObject(value):
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return isinstance(value, SimObject)
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def isNullPointer(value):
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return isinstance(value, NullSimObject)
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def isSimObjectSequence(value):
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if not isinstance(value, (list, tuple)) or len(value) == 0:
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return False
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for val in value:
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if not isNullPointer(val) and not isSimObject(val):
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return False
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return True
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def isSimObjectOrSequence(value):
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return isSimObject(value) or isSimObjectSequence(value)
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# Function to provide to C++ so it can look up instances based on paths
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# Function to provide to C++ so it can look up instances based on paths
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def resolveSimObject(name):
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def resolveSimObject(name):
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obj = instanceDict[name]
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obj = instanceDict[name]
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@ -735,3 +718,7 @@ def resolveSimObject(name):
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# short to avoid polluting other namespaces.
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# short to avoid polluting other namespaces.
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__all__ = ['SimObject', 'ParamContext']
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__all__ = ['SimObject', 'ParamContext']
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# see comment on imports at end of __init__.py.
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import proxy
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import cc_main
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@ -71,8 +71,6 @@ build_env.update(defines.m5_build_env)
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env = smartdict.SmartDict()
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env = smartdict.SmartDict()
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env.update(os.environ)
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env.update(os.environ)
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from main import options, arguments, main
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# The final hook to generate .ini files. Called from the user script
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# The final hook to generate .ini files. Called from the user script
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# once the config is built.
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# once the config is built.
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def instantiate(root):
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def instantiate(root):
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@ -206,5 +204,7 @@ def switchCpus(cpuList):
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# you can get the wrong result if foo is only partially imported
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# you can get the wrong result if foo is only partially imported
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# at the point you do that (i.e., because foo is in the middle of
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# at the point you do that (i.e., because foo is in the middle of
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# importing *you*).
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# importing *you*).
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from main import options
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import objects
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import objects
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import params
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import params
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from SimObject import resolveSimObject
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@ -1,4 +1,5 @@
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from m5.config import *
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from m5.params import *
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from m5.proxy import *
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from Device import BasicPioDevice
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from Device import BasicPioDevice
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class AlphaConsole(BasicPioDevice):
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class AlphaConsole(BasicPioDevice):
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class AlphaTLB(SimObject):
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class AlphaTLB(SimObject):
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type = 'AlphaTLB'
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type = 'AlphaTLB'
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abstract = True
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abstract = True
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@ -1,4 +1,4 @@
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from m5.config import *
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from m5.params import *
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from Device import BasicPioDevice
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from Device import BasicPioDevice
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class BadDevice(BasicPioDevice):
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class BadDevice(BasicPioDevice):
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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from AlphaTLB import AlphaDTB, AlphaITB
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from AlphaTLB import AlphaDTB, AlphaITB
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from Bus import Bus
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from Bus import Bus
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@ -1,4 +1,4 @@
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from m5.config import *
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from m5.params import *
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from MemObject import MemObject
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from MemObject import MemObject
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class Prefetch(Enum): vals = ['none', 'tagged', 'stride', 'ghb']
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class Prefetch(Enum): vals = ['none', 'tagged', 'stride', 'ghb']
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@ -1,4 +1,4 @@
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from m5.config import *
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from m5.params import *
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from MemObject import MemObject
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from MemObject import MemObject
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class Bridge(MemObject):
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class Bridge(MemObject):
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from m5.config import *
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from m5.params import *
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from MemObject import MemObject
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from MemObject import MemObject
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class Bus(MemObject):
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class Bus(MemObject):
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class Coherence(Enum): vals = ['uni', 'msi', 'mesi', 'mosi', 'moesi']
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class Coherence(Enum): vals = ['uni', 'msi', 'mesi', 'mosi', 'moesi']
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class CoherenceProtocol(SimObject):
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class CoherenceProtocol(SimObject):
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from m5.config import *
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from m5.params import *
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from m5.proxy import *
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from MemObject import MemObject
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from MemObject import MemObject
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class PioDevice(MemObject):
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class PioDevice(MemObject):
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class DiskImage(SimObject):
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class DiskImage(SimObject):
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type = 'DiskImage'
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type = 'DiskImage'
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abstract = True
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abstract = True
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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from Device import DmaDevice
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from Device import DmaDevice
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from Pci import PciDevice, PciConfigData
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from Pci import PciDevice, PciConfigData
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class FUPool(SimObject):
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class FUPool(SimObject):
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type = 'FUPool'
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type = 'FUPool'
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class OpType(Enum):
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class OpType(Enum):
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vals = ['(null)', 'IntAlu', 'IntMult', 'IntDiv', 'FloatAdd',
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vals = ['(null)', 'IntAlu', 'IntMult', 'IntDiv', 'FloatAdd',
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from Pci import PciDevice, PciConfigData
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from Pci import PciDevice, PciConfigData
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class IdeID(Enum): vals = ['master', 'slave']
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class IdeID(Enum): vals = ['master', 'slave']
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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class IntrControl(SimObject):
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class IntrControl(SimObject):
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type = 'IntrControl'
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type = 'IntrControl'
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cpu = Param.BaseCPU(Parent.any, "the cpu")
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cpu = Param.BaseCPU(Parent.any, "the cpu")
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.SimObject import SimObject
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class MemObject(SimObject):
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class MemObject(SimObject):
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type = 'MemObject'
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type = 'MemObject'
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class MemTest(SimObject):
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class MemTest(SimObject):
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type = 'MemTest'
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type = 'MemTest'
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cache = Param.BaseCache("L1 cache")
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cache = Param.BaseCache("L1 cache")
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from m5.params import *
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from m5.proxy import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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from BaseCPU import BaseCPU
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from BaseCPU import BaseCPU
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from Checker import O3Checker
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from Checker import O3Checker
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from m5.params import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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from BaseCPU import BaseCPU
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from BaseCPU import BaseCPU
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class DerivOzoneCPU(BaseCPU):
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class DerivOzoneCPU(BaseCPU):
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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from Device import BasicPioDevice, DmaDevice, PioDevice
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from Device import BasicPioDevice, DmaDevice, PioDevice
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class PciConfigData(SimObject):
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class PciConfigData(SimObject):
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from m5.config import *
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from m5.params import *
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from m5.proxy import *
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from MemObject import *
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from MemObject import *
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class PhysicalMemory(MemObject):
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class PhysicalMemory(MemObject):
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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class Platform(SimObject):
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class Platform(SimObject):
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type = 'Platform'
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type = 'Platform'
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abstract = True
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abstract = True
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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class Process(SimObject):
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class Process(SimObject):
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type = 'Process'
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type = 'Process'
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abstract = True
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abstract = True
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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class Repl(SimObject):
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class Repl(SimObject):
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type = 'Repl'
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type = 'Repl'
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abstract = True
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abstract = True
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from Serialize import Serialize
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from Serialize import Serialize
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from Statistics import Statistics
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from Statistics import Statistics
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from Trace import Trace
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from Trace import Trace
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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class ConsoleListener(SimObject):
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class ConsoleListener(SimObject):
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type = 'ConsoleListener'
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type = 'ConsoleListener'
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port = Param.TcpPort(3456, "listen port")
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port = Param.TcpPort(3456, "listen port")
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from m5.config import *
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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class SimpleDisk(SimObject):
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class SimpleDisk(SimObject):
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type = 'SimpleDisk'
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type = 'SimpleDisk'
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disk = Param.DiskImage("Disk Image")
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disk = Param.DiskImage("Disk Image")
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from m5.params import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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from BaseCPU import BaseCPU
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from BaseCPU import BaseCPU
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class SimpleOzoneCPU(BaseCPU):
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class SimpleOzoneCPU(BaseCPU):
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from m5.SimObject import SimObject
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from m5.params import *
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from m5.proxy import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing']
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class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing']
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from m5.config import *
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from m5.params import *
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from m5.proxy import *
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from Device import BasicPioDevice
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from Device import BasicPioDevice
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from Platform import Platform
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from Platform import Platform
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from AlphaConsole import AlphaConsole
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from AlphaConsole import AlphaConsole
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from m5.params import *
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from m5.proxy import *
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from m5 import build_env
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from m5 import build_env
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from m5.config import *
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from Device import BasicPioDevice
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from Device import BasicPioDevice
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class Uart(BasicPioDevice):
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class Uart(BasicPioDevice):
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import sys, inspect, copy
|
import sys, inspect, copy
|
||||||
import convert
|
import convert
|
||||||
|
from util import *
|
||||||
|
|
||||||
# Dummy base class to identify types that are legitimate for SimObject
|
# Dummy base class to identify types that are legitimate for SimObject
|
||||||
# parameters.
|
# parameters.
|
||||||
|
@ -100,13 +101,14 @@ class ParamDesc(object):
|
||||||
def __getattr__(self, attr):
|
def __getattr__(self, attr):
|
||||||
if attr == 'ptype':
|
if attr == 'ptype':
|
||||||
try:
|
try:
|
||||||
ptype = eval(self.ptype_str, m5.objects.__dict__)
|
ptype = eval(self.ptype_str, objects.__dict__)
|
||||||
if not isinstance(ptype, type):
|
if not isinstance(ptype, type):
|
||||||
panic("Param qualifier is not a type: %s" % self.ptype)
|
raise NameError
|
||||||
self.ptype = ptype
|
self.ptype = ptype
|
||||||
return ptype
|
return ptype
|
||||||
except NameError:
|
except NameError:
|
||||||
pass
|
raise TypeError, \
|
||||||
|
"Param qualifier '%s' is not a type" % self.ptype_str
|
||||||
raise AttributeError, "'%s' object has no attribute '%s'" % \
|
raise AttributeError, "'%s' object has no attribute '%s'" % \
|
||||||
(type(self).__name__, attr)
|
(type(self).__name__, attr)
|
||||||
|
|
||||||
|
@ -120,7 +122,7 @@ class ParamDesc(object):
|
||||||
return value
|
return value
|
||||||
if isinstance(value, self.ptype):
|
if isinstance(value, self.ptype):
|
||||||
return value
|
return value
|
||||||
if isNullPointer(value) and issubclass(self.ptype, SimObject):
|
if isNullPointer(value) and isSimObjectClass(self.ptype):
|
||||||
return value
|
return value
|
||||||
return self.ptype(value)
|
return self.ptype(value)
|
||||||
|
|
||||||
|
@ -305,7 +307,7 @@ class CheckedInt(NumericParamValue):
|
||||||
|
|
||||||
def __init__(self, value):
|
def __init__(self, value):
|
||||||
if isinstance(value, str):
|
if isinstance(value, str):
|
||||||
self.value = toInteger(value)
|
self.value = convert.toInteger(value)
|
||||||
elif isinstance(value, (int, long, float)):
|
elif isinstance(value, (int, long, float)):
|
||||||
self.value = long(value)
|
self.value = long(value)
|
||||||
self._check()
|
self._check()
|
||||||
|
@ -340,7 +342,7 @@ class MemorySize(CheckedInt):
|
||||||
if isinstance(value, MemorySize):
|
if isinstance(value, MemorySize):
|
||||||
self.value = value.value
|
self.value = value.value
|
||||||
else:
|
else:
|
||||||
self.value = toMemorySize(value)
|
self.value = convert.toMemorySize(value)
|
||||||
self._check()
|
self._check()
|
||||||
|
|
||||||
class MemorySize32(CheckedInt):
|
class MemorySize32(CheckedInt):
|
||||||
|
@ -350,7 +352,7 @@ class MemorySize32(CheckedInt):
|
||||||
if isinstance(value, MemorySize):
|
if isinstance(value, MemorySize):
|
||||||
self.value = value.value
|
self.value = value.value
|
||||||
else:
|
else:
|
||||||
self.value = toMemorySize(value)
|
self.value = convert.toMemorySize(value)
|
||||||
self._check()
|
self._check()
|
||||||
|
|
||||||
class Addr(CheckedInt):
|
class Addr(CheckedInt):
|
||||||
|
@ -363,7 +365,7 @@ class Addr(CheckedInt):
|
||||||
self.value = value.value
|
self.value = value.value
|
||||||
else:
|
else:
|
||||||
try:
|
try:
|
||||||
self.value = toMemorySize(value)
|
self.value = convert.toMemorySize(value)
|
||||||
except TypeError:
|
except TypeError:
|
||||||
self.value = long(value)
|
self.value = long(value)
|
||||||
self._check()
|
self._check()
|
||||||
|
@ -430,7 +432,7 @@ class Bool(ParamValue):
|
||||||
cxx_type = 'bool'
|
cxx_type = 'bool'
|
||||||
def __init__(self, value):
|
def __init__(self, value):
|
||||||
try:
|
try:
|
||||||
self.value = toBool(value)
|
self.value = convert.toBool(value)
|
||||||
except TypeError:
|
except TypeError:
|
||||||
self.value = bool(value)
|
self.value = bool(value)
|
||||||
|
|
||||||
|
@ -586,10 +588,10 @@ def getLatency(value):
|
||||||
return 1 / value.value
|
return 1 / value.value
|
||||||
elif isinstance(value, str):
|
elif isinstance(value, str):
|
||||||
try:
|
try:
|
||||||
return toLatency(value)
|
return convert.toLatency(value)
|
||||||
except ValueError:
|
except ValueError:
|
||||||
try:
|
try:
|
||||||
return 1 / toFrequency(value)
|
return 1 / convert.toFrequency(value)
|
||||||
except ValueError:
|
except ValueError:
|
||||||
pass # fall through
|
pass # fall through
|
||||||
raise ValueError, "Invalid Frequency/Latency value '%s'" % value
|
raise ValueError, "Invalid Frequency/Latency value '%s'" % value
|
||||||
|
@ -678,7 +680,7 @@ class Clock(ParamValue):
|
||||||
class NetworkBandwidth(float,ParamValue):
|
class NetworkBandwidth(float,ParamValue):
|
||||||
cxx_type = 'float'
|
cxx_type = 'float'
|
||||||
def __new__(cls, value):
|
def __new__(cls, value):
|
||||||
val = toNetworkBandwidth(value) / 8.0
|
val = convert.toNetworkBandwidth(value) / 8.0
|
||||||
return super(cls, NetworkBandwidth).__new__(cls, val)
|
return super(cls, NetworkBandwidth).__new__(cls, val)
|
||||||
|
|
||||||
def __str__(self):
|
def __str__(self):
|
||||||
|
@ -690,7 +692,7 @@ class NetworkBandwidth(float,ParamValue):
|
||||||
class MemoryBandwidth(float,ParamValue):
|
class MemoryBandwidth(float,ParamValue):
|
||||||
cxx_type = 'float'
|
cxx_type = 'float'
|
||||||
def __new__(self, value):
|
def __new__(self, value):
|
||||||
val = toMemoryBandwidth(value)
|
val = convert.toMemoryBandwidth(value)
|
||||||
return super(cls, MemoryBandwidth).__new__(cls, val)
|
return super(cls, MemoryBandwidth).__new__(cls, val)
|
||||||
|
|
||||||
def __str__(self):
|
def __str__(self):
|
||||||
|
@ -703,6 +705,36 @@ class MemoryBandwidth(float,ParamValue):
|
||||||
# "Constants"... handy aliases for various values.
|
# "Constants"... handy aliases for various values.
|
||||||
#
|
#
|
||||||
|
|
||||||
|
# Special class for NULL pointers. Note the special check in
|
||||||
|
# make_param_value() above that lets these be assigned where a
|
||||||
|
# SimObject is required.
|
||||||
|
# only one copy of a particular node
|
||||||
|
class NullSimObject(object):
|
||||||
|
__metaclass__ = Singleton
|
||||||
|
|
||||||
|
def __call__(cls):
|
||||||
|
return cls
|
||||||
|
|
||||||
|
def _instantiate(self, parent = None, path = ''):
|
||||||
|
pass
|
||||||
|
|
||||||
|
def ini_str(self):
|
||||||
|
return 'Null'
|
||||||
|
|
||||||
|
def unproxy(self, base):
|
||||||
|
return self
|
||||||
|
|
||||||
|
def set_path(self, parent, name):
|
||||||
|
pass
|
||||||
|
def __str__(self):
|
||||||
|
return 'Null'
|
||||||
|
|
||||||
|
# The only instance you'll ever need...
|
||||||
|
NULL = NullSimObject()
|
||||||
|
|
||||||
|
def isNullPointer(value):
|
||||||
|
return isinstance(value, NullSimObject)
|
||||||
|
|
||||||
# Some memory range specifications use this as a default upper bound.
|
# Some memory range specifications use this as a default upper bound.
|
||||||
MaxAddr = Addr.max
|
MaxAddr = Addr.max
|
||||||
MaxTick = Tick.max
|
MaxTick = Tick.max
|
||||||
|
@ -821,11 +853,11 @@ __all__ = ['Param', 'VectorParam',
|
||||||
'NetworkBandwidth', 'MemoryBandwidth',
|
'NetworkBandwidth', 'MemoryBandwidth',
|
||||||
'Range', 'AddrRange', 'TickRange',
|
'Range', 'AddrRange', 'TickRange',
|
||||||
'MaxAddr', 'MaxTick', 'AllMemory',
|
'MaxAddr', 'MaxTick', 'AllMemory',
|
||||||
'Null', 'NULL',
|
'NextEthernetAddr', 'NULL',
|
||||||
'NextEthernetAddr',
|
|
||||||
'Port', 'VectorPort']
|
'Port', 'VectorPort']
|
||||||
|
|
||||||
# see comment on imports at end of __init__.py.
|
# see comment on imports at end of __init__.py.
|
||||||
from SimObject import SimObject, isSimObject, isSimObjectSequence, \
|
from SimObject import isSimObject, isSimObjectSequence, isSimObjectClass
|
||||||
isNullPointer
|
|
||||||
import proxy
|
import proxy
|
||||||
|
import objects
|
||||||
|
import cc_main
|
||||||
|
|
|
@ -151,8 +151,8 @@ main(int argc, char **argv)
|
||||||
// initialize SWIG 'cc_main' module
|
// initialize SWIG 'cc_main' module
|
||||||
init_cc_main();
|
init_cc_main();
|
||||||
|
|
||||||
PyRun_SimpleString("import m5");
|
PyRun_SimpleString("import m5.main");
|
||||||
PyRun_SimpleString("m5.main()");
|
PyRun_SimpleString("m5.main.main()");
|
||||||
|
|
||||||
// clean up Python intepreter.
|
// clean up Python intepreter.
|
||||||
Py_Finalize();
|
Py_Finalize();
|
||||||
|
|
Loading…
Reference in a new issue