better debugging
dev/ns_gige.cc:
Make all DPRINTF statements take one line. If they need two lines,
break them up into separate statements. This makes grep much more
effective since *every* line will be prefixed by the cycle that the
trace message is from and the object that caused the message.
normalize some debugging statements so that searching is easier
(e.g. always say rxState, not rx state or receive state)
break into the debugger when a packet is dropped since we don't really
like dropping packets.
--HG--
extra : convert_revision : 9cf309ca2143a6b8c8215ac5dd6a31aae60173cd
This commit is contained in:
Nathan Binkert
parent
e60a4c58ee
commit
a3a1b4dbae
1 changed files with 40 additions and 33 deletions
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@ -49,6 +49,7 @@
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#include "mem/functional_mem/memory_control.hh"
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#include "mem/functional_mem/physical_memory.hh"
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#include "sim/builder.hh"
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#include "sim/debug.hh"
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#include "sim/host.hh"
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#include "sim/sim_stats.hh"
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#include "targetarch/vtophys.hh"
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@ -1049,18 +1050,19 @@ NSGigE::devIntrClear(uint32_t interrupts)
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if (interrupts & ISR_RXOK)
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regs.isr &= ~ISR_RXOK;
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if (!(regs.isr & regs.imr))
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cpuIntrClear();
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DPRINTF(EthernetIntr,
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"interrupt cleared from ISR: intr=%x isr=%x imr=%x\n",
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interrupts, regs.isr, regs.imr);
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if (!(regs.isr & regs.imr))
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cpuIntrClear();
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}
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void
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NSGigE::devIntrChangeMask()
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{
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DPRINTF(EthernetIntr, "interrupt mask changed\n");
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DPRINTF(EthernetIntr, "interrupt mask changed: isr=%x imr=%x masked=%x\n",
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regs.isr, regs.imr, regs.isr & regs.imr);
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if (regs.isr & regs.imr)
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cpuIntrPost(curTick);
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@ -1187,7 +1189,8 @@ NSGigE::rxReset()
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rxState = rxIdle;
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}
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void NSGigE::regsReset()
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void
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NSGigE::regsReset()
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{
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memset(®s, 0, sizeof(regs));
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regs.config = 0x80000000;
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@ -1315,7 +1318,7 @@ NSGigE::rxDmaWriteDone()
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void
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NSGigE::rxKick()
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{
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DPRINTF(EthernetSM, "receive kick state=%s (rxBuf.size=%d)\n",
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DPRINTF(EthernetSM, "receive kick rxState=%s (rxBuf.size=%d)\n",
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NsRxStateStrings[rxState], rxFifo.size());
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if (rxKickTick > curTick) {
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@ -1393,11 +1396,10 @@ NSGigE::rxKick()
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goto exit;
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DPRINTF(EthernetDesc,
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"rxDescCache:\n"
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"\tlink=%08x\n"
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"\tbufptr=%08x\n"
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"\tcmdsts=%08x\n"
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"\textsts=%08x\n",
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"rxDescCache: addr=%08x read descriptor\n",
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regs.rxdp & 0x3fffffff);
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DPRINTF(EthernetDesc,
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"rxDescCache: link=%08x bufptr=%08x cmdsts=%08x extsts=%08x\n",
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rxDescCache.link, rxDescCache.bufptr, rxDescCache.cmdsts,
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rxDescCache.extsts);
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@ -1422,7 +1424,7 @@ NSGigE::rxKick()
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if (rxFifo.empty())
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goto exit;
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DPRINTF(EthernetSM, "\n\n*****processing receive of new packet\n");
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DPRINTF(EthernetSM, "****processing receive of new packet****\n");
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// If we don't have a packet, grab a new one from the fifo.
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rxPacket = rxFifo.front();
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@ -1536,8 +1538,12 @@ NSGigE::rxKick()
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*/
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DPRINTF(EthernetDesc,
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"rxDesc writeback:\n\tcmdsts=%08x\n\textsts=%08x\n",
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rxDescCache.cmdsts, rxDescCache.extsts);
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"rxDescCache: addr=%08x writeback cmdsts extsts\n",
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regs.rxdp & 0x3fffffff);
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DPRINTF(EthernetDesc,
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"rxDescCache: link=%08x bufptr=%08x cmdsts=%08x extsts=%08x\n",
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rxDescCache.link, rxDescCache.bufptr, rxDescCache.cmdsts,
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rxDescCache.extsts);
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rxDmaAddr = (regs.rxdp + offsetof(ns_desc, cmdsts)) & 0x3fffffff;
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rxDmaData = &(rxDescCache.cmdsts);
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@ -1608,8 +1614,7 @@ NSGigE::rxKick()
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panic("Invalid rxState!");
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}
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DPRINTF(EthernetSM, "entering next rx state = %s\n",
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DPRINTF(EthernetSM, "entering next rxState=%s\n",
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NsRxStateStrings[rxState]);
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goto next;
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@ -1618,7 +1623,7 @@ NSGigE::rxKick()
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/**
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* @todo do we want to schedule a future kick?
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*/
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DPRINTF(EthernetSM, "rx state machine exited state=%s\n",
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DPRINTF(EthernetSM, "rx state machine exited rxState=%s\n",
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NsRxStateStrings[rxState]);
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}
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@ -1630,7 +1635,7 @@ NSGigE::transmit()
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return;
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}
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DPRINTF(Ethernet, "\n\nAttempt Pkt Transmit: txFifo length = %d\n",
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DPRINTF(Ethernet, "Attempt Pkt Transmit: txFifo length=%d\n",
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maxTxFifoSize - txFifoAvail);
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if (interface->sendPacket(txFifo.front())) {
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#if TRACING_ON
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@ -1785,7 +1790,8 @@ NSGigE::txDmaWriteDone()
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void
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NSGigE::txKick()
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{
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DPRINTF(EthernetSM, "transmit kick state=%s\n", NsTxStateStrings[txState]);
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DPRINTF(EthernetSM, "transmit kick txState=%s\n",
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NsTxStateStrings[txState]);
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if (txKickTick > curTick) {
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DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n",
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@ -1857,11 +1863,7 @@ NSGigE::txKick()
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goto exit;
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DPRINTF(EthernetDesc,
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"txDescCache data:\n"
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"\tlink=%08x\n"
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"\tbufptr=%08x\n"
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"\tcmdsts=%08x\n"
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"\textsts=%08x\n",
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"txDescCache: link=%08x bufptr=%08x cmdsts=%08x extsts=%08x\n",
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txDescCache.link, txDescCache.bufptr, txDescCache.cmdsts,
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txDescCache.extsts);
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@ -1878,7 +1880,7 @@ NSGigE::txKick()
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case txFifoBlock:
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if (!txPacket) {
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DPRINTF(EthernetSM, "\n\n*****starting the tx of a new packet\n");
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DPRINTF(EthernetSM, "****starting the tx of a new packet****\n");
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txPacket = new EtherPacket;
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txPacket->data = new uint8_t[16384];
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txPacketBufPtr = txPacket->data;
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@ -1939,7 +1941,7 @@ NSGigE::txKick()
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txDescCache.cmdsts |= CMDSTS_OK;
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DPRINTF(EthernetDesc,
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"txDesc writeback:\n\tcmdsts=%08x\n\textsts=%08x\n",
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"txDesc writeback: cmdsts=%08x extsts=%08x\n",
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txDescCache.cmdsts, txDescCache.extsts);
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txDmaAddr = regs.txdp + offsetof(ns_desc, cmdsts);
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@ -2041,7 +2043,7 @@ NSGigE::txKick()
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panic("invalid state");
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}
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DPRINTF(EthernetSM, "entering next tx state=%s\n",
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DPRINTF(EthernetSM, "entering next txState=%s\n",
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NsTxStateStrings[txState]);
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goto next;
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@ -2050,15 +2052,19 @@ NSGigE::txKick()
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/**
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* @todo do we want to schedule a future kick?
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*/
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DPRINTF(EthernetSM, "tx state machine exited state=%s\n",
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DPRINTF(EthernetSM, "tx state machine exited txState=%s\n",
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NsTxStateStrings[txState]);
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}
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void
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NSGigE::transferDone()
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{
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if (txFifo.empty())
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if (txFifo.empty()) {
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DPRINTF(Ethernet, "transfer complete: txFifo empty...nothing to do\n");
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return;
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}
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DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
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if (txEvent.scheduled())
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txEvent.reschedule(curTick + 1);
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@ -2122,11 +2128,12 @@ NSGigE::recvPacket(PacketPtr packet)
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rxBytes += packet->length;
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rxPackets++;
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DPRINTF(Ethernet, "\n\nReceiving packet from wire, rxFifoAvail=%d\n",
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DPRINTF(Ethernet, "Receiving packet from wire, rxFifoAvail=%d\n",
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maxRxFifoSize - rxFifoCnt);
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if (!rxEnable) {
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DPRINTF(Ethernet, "receive disabled...packet dropped\n");
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debug_break();
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interface->recvDone();
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return true;
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}
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