Actually finished moving the register file stuff around.

--HG--
extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
This commit is contained in:
Gabe Black 2006-11-10 05:49:16 -05:00
parent 9731fb3fd7
commit 9ef51f2dba
4 changed files with 16 additions and 32 deletions

View file

@ -42,6 +42,11 @@ class Checkpoint;
namespace AlphaISA
{
static inline std::string getFloatRegName(RegIndex)
{
return "";
}
class FloatRegFile
{
public:

View file

@ -41,6 +41,11 @@ class Checkpoint;
namespace AlphaISA
{
static inline std::string getIntRegName(RegIndex)
{
return "";
}
// redirected register map, really only used for the full system case.
extern const int reg_redir[NumIntRegs];

View file

@ -54,6 +54,11 @@ namespace AlphaISA
MISCREG_INTR
};
static inline std::string getMiscRegName(RegIndex)
{
return "";
}
class MiscRegFile {
protected:
uint64_t fpcr; // floating point condition codes

View file

@ -32,6 +32,7 @@
#define __ARCH_ALPHA_REGFILE_HH__
#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/floatregfile.hh"
#include "arch/alpha/intregfile.hh"
#include "arch/alpha/miscregfile.hh"
#include "arch/alpha/types.hh"
@ -47,38 +48,6 @@ class ThreadContext;
namespace AlphaISA
{
static inline std::string getIntRegName(RegIndex)
{
return "";
}
static inline std::string getFloatRegName(RegIndex)
{
return "";
}
static inline std::string getMiscRegName(RegIndex)
{
return "";
}
class FloatRegFile
{
public:
union {
uint64_t q[NumFloatRegs]; // integer qword view
double d[NumFloatRegs]; // double-precision floating point view
};
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string &section);
void clear()
{ bzero(d, sizeof(d)); }
};
class RegFile {
protected: