tests: Update regressions for the new kernels and various preceeding fixes.
This commit is contained in:
parent
f2db2a96d1
commit
93c0307d41
101 changed files with 25484 additions and 21174 deletions
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@ -15,10 +15,10 @@ boot_cpu_frequency=500
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boot_osflags=root=/dev/hda1 console=ttyS0
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boot_osflags=root=/dev/hda1 console=ttyS0
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cache_line_size=64
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cache_line_size=64
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clk_domain=system.clk_domain
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clk_domain=system.clk_domain
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console=/scratch/nilay/GEM5/system/binaries/console
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console=/dist/binaries/console
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eventq_index=0
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eventq_index=0
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init_param=0
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init_param=0
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kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
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kernel=/dist/binaries/vmlinux
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kernel_addr_check=true
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kernel_addr_check=true
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load_addr_mask=1099511627775
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load_addr_mask=1099511627775
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load_offset=0
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load_offset=0
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@ -26,8 +26,8 @@ mem_mode=timing
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mem_ranges=0:134217727
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mem_ranges=0:134217727
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memories=system.physmem
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memories=system.physmem
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num_work_ids=16
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num_work_ids=16
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pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
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pal=/dist/binaries/ts_osfpal
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readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
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readfile=/work/gem5.latest/tests/halt.sh
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symbolfile=
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symbolfile=
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system_rev=1024
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system_rev=1024
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system_type=34
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system_type=34
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@ -691,7 +691,7 @@ table_size=65536
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[system.disk0.image.child]
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[system.disk0.image.child]
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type=RawDiskImage
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type=RawDiskImage
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eventq_index=0
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eventq_index=0
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image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
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image_file=/dist/disks/linux-latest.img
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read_only=true
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read_only=true
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[system.disk2]
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[system.disk2]
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@ -714,7 +714,7 @@ table_size=65536
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[system.disk2.image.child]
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[system.disk2.image.child]
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type=RawDiskImage
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type=RawDiskImage
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eventq_index=0
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eventq_index=0
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image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
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image_file=/dist/disks/linux-bigswap2.img
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read_only=true
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read_only=true
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[system.dvfs_handler]
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[system.dvfs_handler]
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@ -844,6 +844,7 @@ clk_domain=system.clk_domain
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conf_table_reported=true
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conf_table_reported=true
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device_bus_width=8
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device_bus_width=8
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device_rowbuffer_size=1024
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device_rowbuffer_size=1024
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device_size=536870912
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devices_per_rank=8
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devices_per_rank=8
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dll=true
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dll=true
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eventq_index=0
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eventq_index=0
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@ -894,7 +895,7 @@ system=system
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[system.simple_disk.disk]
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[system.simple_disk.disk]
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type=RawDiskImage
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type=RawDiskImage
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eventq_index=0
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eventq_index=0
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image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
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image_file=/dist/disks/linux-latest.img
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read_only=true
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read_only=true
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[system.terminal]
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[system.terminal]
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@ -1,3 +1,4 @@
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warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
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warn: Sockets disabled, not accepting terminal connections
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warn: Sockets disabled, not accepting terminal connections
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warn: Sockets disabled, not accepting gdb connections
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warn: Sockets disabled, not accepting gdb connections
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warn: Prefetch instructions in Alpha do not do anything
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warn: Prefetch instructions in Alpha do not do anything
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@ -1,14 +1,12 @@
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Redirecting stdout to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-minor/simout
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Redirecting stderr to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-minor/simerr
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gem5 Simulator System. http://gem5.org
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled May 7 2014 10:41:53
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gem5 compiled Oct 29 2014 09:12:51
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gem5 started May 7 2014 10:52:34
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gem5 started Oct 29 2014 09:20:31
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gem5 executing on cz3212c2d7
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gem5 executing on u200540-lin
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-minor -re tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-minor
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-minor -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-minor
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Global frequency set at 1000000000000 ticks per second
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Global frequency set at 1000000000000 ticks per second
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info: kernel located at: /arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux
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info: kernel located at: /dist/binaries/vmlinux
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0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
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0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
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info: Entering event queue @ 0. Starting simulation...
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info: Entering event queue @ 0. Starting simulation...
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Exiting @ tick 1885187323500 because m5_exit instruction encountered
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Exiting @ tick 1883224346500 because m5_exit instruction encountered
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@ -4,11 +4,11 @@ sim_seconds 1.883224 # Nu
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sim_ticks 1883224346500 # Number of ticks simulated
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sim_ticks 1883224346500 # Number of ticks simulated
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final_tick 1883224346500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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final_tick 1883224346500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 293967 # Simulator instruction rate (inst/s)
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host_inst_rate 279379 # Simulator instruction rate (inst/s)
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host_op_rate 293967 # Simulator op (including micro ops) rate (op/s)
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host_op_rate 279379 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 9864607727 # Simulator tick rate (ticks/s)
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host_tick_rate 9375076807 # Simulator tick rate (ticks/s)
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host_mem_usage 317632 # Number of bytes of host memory used
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host_mem_usage 311380 # Number of bytes of host memory used
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host_seconds 190.91 # Real time elapsed on the host
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host_seconds 200.88 # Real time elapsed on the host
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sim_insts 56120453 # Number of instructions simulated
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sim_insts 56120453 # Number of instructions simulated
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sim_ops 56120453 # Number of ops (including micro ops) simulated
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sim_ops 56120453 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.voltage_domain.voltage 1 # Voltage in Volts
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@ -409,8 +409,6 @@ system.iocache.fast_writes 41552 # nu
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system.iocache.cache_copies 0 # number of cache copies performed
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system.iocache.cache_copies 0 # number of cache copies performed
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system.iocache.ReadReq_mshr_misses::tsunami.ide 173 # number of ReadReq MSHR misses
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system.iocache.ReadReq_mshr_misses::tsunami.ide 173 # number of ReadReq MSHR misses
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system.iocache.ReadReq_mshr_misses::total 173 # number of ReadReq MSHR misses
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system.iocache.ReadReq_mshr_misses::total 173 # number of ReadReq MSHR misses
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system.iocache.WriteInvalidateReq_mshr_misses::tsunami.ide 41552 # number of WriteInvalidateReq MSHR misses
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system.iocache.WriteInvalidateReq_mshr_misses::total 41552 # number of WriteInvalidateReq MSHR misses
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system.iocache.demand_mshr_misses::tsunami.ide 173 # number of demand (read+write) MSHR misses
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system.iocache.demand_mshr_misses::tsunami.ide 173 # number of demand (read+write) MSHR misses
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system.iocache.demand_mshr_misses::total 173 # number of demand (read+write) MSHR misses
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system.iocache.demand_mshr_misses::total 173 # number of demand (read+write) MSHR misses
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system.iocache.overall_mshr_misses::tsunami.ide 173 # number of overall MSHR misses
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system.iocache.overall_mshr_misses::tsunami.ide 173 # number of overall MSHR misses
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@ -425,16 +423,14 @@ system.iocache.overall_mshr_miss_latency::tsunami.ide 12136383
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system.iocache.overall_mshr_miss_latency::total 12136383 # number of overall MSHR miss cycles
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system.iocache.overall_mshr_miss_latency::total 12136383 # number of overall MSHR miss cycles
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system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
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system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
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system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
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system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
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system.iocache.WriteInvalidateReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for WriteInvalidateReq accesses
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system.iocache.WriteInvalidateReq_mshr_miss_rate::total 1 # mshr miss rate for WriteInvalidateReq accesses
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system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
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system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
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system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
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system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
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system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
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system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
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system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
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system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
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system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average ReadReq mshr miss latency
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system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average ReadReq mshr miss latency
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system.iocache.ReadReq_avg_mshr_miss_latency::total 70152.502890 # average ReadReq mshr miss latency
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system.iocache.ReadReq_avg_mshr_miss_latency::total 70152.502890 # average ReadReq mshr miss latency
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system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide 60470.207379 # average WriteInvalidateReq mshr miss latency
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system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide inf # average WriteInvalidateReq mshr miss latency
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system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60470.207379 # average WriteInvalidateReq mshr miss latency
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system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
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system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
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system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
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system.iocache.demand_avg_mshr_miss_latency::total 70152.502890 # average overall mshr miss latency
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system.iocache.demand_avg_mshr_miss_latency::total 70152.502890 # average overall mshr miss latency
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system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
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system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
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@ -15,10 +15,10 @@ boot_cpu_frequency=500
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boot_osflags=root=/dev/hda1 console=ttyS0
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boot_osflags=root=/dev/hda1 console=ttyS0
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cache_line_size=64
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cache_line_size=64
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clk_domain=system.clk_domain
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clk_domain=system.clk_domain
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console=/scratch/nilay/GEM5/system/binaries/console
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console=/dist/binaries/console
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eventq_index=0
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eventq_index=0
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init_param=0
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init_param=0
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kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
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kernel=/dist/binaries/vmlinux
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kernel_addr_check=true
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kernel_addr_check=true
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load_addr_mask=1099511627775
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load_addr_mask=1099511627775
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load_offset=0
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load_offset=0
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mem_ranges=0:134217727
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mem_ranges=0:134217727
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memories=system.physmem
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memories=system.physmem
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num_work_ids=16
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num_work_ids=16
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pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
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pal=/dist/binaries/ts_osfpal
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readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
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readfile=/work/gem5.latest/tests/halt.sh
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symbolfile=
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symbolfile=
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system_rev=1024
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system_rev=1024
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system_type=34
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system_type=34
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[system.disk0.image.child]
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[system.disk0.image.child]
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type=RawDiskImage
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type=RawDiskImage
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eventq_index=0
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eventq_index=0
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image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
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image_file=/dist/disks/linux-latest.img
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read_only=true
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read_only=true
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[system.disk2]
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[system.disk2]
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[system.disk2.image.child]
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[system.disk2.image.child]
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type=RawDiskImage
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type=RawDiskImage
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eventq_index=0
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eventq_index=0
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image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
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image_file=/dist/disks/linux-bigswap2.img
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read_only=true
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read_only=true
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[system.dvfs_handler]
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[system.dvfs_handler]
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conf_table_reported=true
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conf_table_reported=true
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device_bus_width=8
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device_bus_width=8
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device_rowbuffer_size=1024
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device_rowbuffer_size=1024
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device_size=536870912
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devices_per_rank=8
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devices_per_rank=8
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dll=true
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dll=true
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eventq_index=0
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eventq_index=0
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[system.simple_disk.disk]
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[system.simple_disk.disk]
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type=RawDiskImage
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type=RawDiskImage
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eventq_index=0
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eventq_index=0
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image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
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image_file=/dist/disks/linux-latest.img
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read_only=true
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read_only=true
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[system.terminal]
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[system.terminal]
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@ -1,5 +1,5 @@
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warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
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warn: Sockets disabled, not accepting terminal connections
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warn: Sockets disabled, not accepting terminal connections
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warn: Sockets disabled, not accepting gdb connections
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warn: Sockets disabled, not accepting gdb connections
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warn: Prefetch instructions in Alpha do not do anything
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warn: Prefetch instructions in Alpha do not do anything
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warn: Prefetch instructions in Alpha do not do anything
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warn: Prefetch instructions in Alpha do not do anything
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warn: Obsolete M5 ivlb instruction encountered.
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Redirecting stdout to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual/simout
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Redirecting stderr to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual/simerr
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gem5 Simulator System. http://gem5.org
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gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Jun 21 2014 10:36:29
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gem5 compiled Oct 29 2014 09:12:51
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gem5 started Jun 21 2014 13:05:58
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gem5 started Oct 29 2014 09:21:02
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gem5 executing on phenom
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gem5 executing on u200540-lin
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual
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Global frequency set at 1000000000000 ticks per second
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Global frequency set at 1000000000000 ticks per second
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info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux
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info: kernel located at: /dist/binaries/vmlinux
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0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
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0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
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info: Entering event queue @ 0. Starting simulation...
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info: Entering event queue @ 0. Starting simulation...
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info: Launching CPU 1 @ 121062000
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info: Launching CPU 1 @ 119596000
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Exiting @ tick 1906207240000 because m5_exit instruction encountered
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Exiting @ tick 1905067807000 because m5_exit instruction encountered
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@ -4,11 +4,11 @@ sim_seconds 1.905068 # Nu
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sim_ticks 1905067807000 # Number of ticks simulated
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sim_ticks 1905067807000 # Number of ticks simulated
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final_tick 1905067807000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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final_tick 1905067807000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 133407 # Simulator instruction rate (inst/s)
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host_inst_rate 163944 # Simulator instruction rate (inst/s)
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host_op_rate 133407 # Simulator op (including micro ops) rate (op/s)
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host_op_rate 163944 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 4441980470 # Simulator tick rate (ticks/s)
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host_tick_rate 5458738398 # Simulator tick rate (ticks/s)
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host_mem_usage 322876 # Number of bytes of host memory used
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host_mem_usage 318552 # Number of bytes of host memory used
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host_seconds 428.88 # Real time elapsed on the host
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host_seconds 348.99 # Real time elapsed on the host
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sim_insts 57215334 # Number of instructions simulated
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sim_insts 57215334 # Number of instructions simulated
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sim_ops 57215334 # Number of ops (including micro ops) simulated
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sim_ops 57215334 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.voltage_domain.voltage 1 # Voltage in Volts
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||||||
|
@ -739,8 +739,6 @@ system.iocache.fast_writes 41552 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::tsunami.ide 177 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::tsunami.ide 177 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 177 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 177 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::tsunami.ide 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::tsunami.ide 177 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::tsunami.ide 177 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 177 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 177 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::tsunami.ide 177 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::tsunami.ide 177 # number of overall MSHR misses
|
||||||
|
@ -755,16 +753,14 @@ system.iocache.overall_mshr_miss_latency::tsunami.ide 12381383
|
||||||
system.iocache.overall_mshr_miss_latency::total 12381383 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 12381383 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::tsunami.ide 0.999952 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 0.999952 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 69951.316384 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 69951.316384 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 69951.316384 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 69951.316384 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide 60474.936465 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60474.936465 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 69951.316384 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 69951.316384 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 69951.316384 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 69951.316384 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 69951.316384 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 69951.316384 # average overall mshr miss latency
|
||||||
|
|
|
@ -15,10 +15,10 @@ boot_cpu_frequency=500
|
||||||
boot_osflags=root=/dev/hda1 console=ttyS0
|
boot_osflags=root=/dev/hda1 console=ttyS0
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
console=/scratch/nilay/GEM5/system/binaries/console
|
console=/dist/binaries/console
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
|
kernel=/dist/binaries/vmlinux
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -26,8 +26,8 @@ mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
|
pal=/dist/binaries/ts_osfpal
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
symbolfile=
|
symbolfile=
|
||||||
system_rev=1024
|
system_rev=1024
|
||||||
system_type=34
|
system_type=34
|
||||||
|
@ -640,7 +640,7 @@ table_size=65536
|
||||||
[system.disk0.image.child]
|
[system.disk0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.disk2]
|
[system.disk2]
|
||||||
|
@ -663,7 +663,7 @@ table_size=65536
|
||||||
[system.disk2.image.child]
|
[system.disk2.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.dvfs_handler]
|
[system.dvfs_handler]
|
||||||
|
@ -793,6 +793,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -843,7 +844,7 @@ system=system
|
||||||
[system.simple_disk.disk]
|
[system.simple_disk.disk]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
|
|
|
@ -1,3 +1,4 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
warn: Prefetch instructions in Alpha do not do anything
|
||||||
|
|
|
@ -1,14 +1,12 @@
|
||||||
Redirecting stdout to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3/simout
|
|
||||||
Redirecting stderr to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3/simerr
|
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 10:36:29
|
gem5 compiled Oct 29 2014 09:12:51
|
||||||
gem5 started Jun 21 2014 13:05:52
|
gem5 started Oct 29 2014 09:20:51
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux
|
info: kernel located at: /dist/binaries/vmlinux
|
||||||
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 1860172195000 because m5_exit instruction encountered
|
Exiting @ tick 1859038679000 because m5_exit instruction encountered
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.859039 # Nu
|
||||||
sim_ticks 1859038679000 # Number of ticks simulated
|
sim_ticks 1859038679000 # Number of ticks simulated
|
||||||
final_tick 1859038679000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1859038679000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 145866 # Simulator instruction rate (inst/s)
|
host_inst_rate 164458 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 145866 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 164458 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 5123409698 # Simulator tick rate (ticks/s)
|
host_tick_rate 5776457310 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 320704 # Number of bytes of host memory used
|
host_mem_usage 314484 # Number of bytes of host memory used
|
||||||
host_seconds 362.85 # Real time elapsed on the host
|
host_seconds 321.83 # Real time elapsed on the host
|
||||||
sim_insts 52927600 # Number of instructions simulated
|
sim_insts 52927600 # Number of instructions simulated
|
||||||
sim_ops 52927600 # Number of ops (including micro ops) simulated
|
sim_ops 52927600 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -420,8 +420,6 @@ system.iocache.fast_writes 41552 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::tsunami.ide 173 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::tsunami.ide 173 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 173 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 173 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::tsunami.ide 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::tsunami.ide 173 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::tsunami.ide 173 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 173 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 173 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::tsunami.ide 173 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::tsunami.ide 173 # number of overall MSHR misses
|
||||||
|
@ -436,16 +434,14 @@ system.iocache.overall_mshr_miss_latency::tsunami.ide 12136383
|
||||||
system.iocache.overall_mshr_miss_latency::total 12136383 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 12136383 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::tsunami.ide 0.997935 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 0.997935 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 70152.502890 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 70152.502890 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide 60880.680280 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60880.680280 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 70152.502890 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 70152.502890 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 70152.502890 # average overall mshr miss latency
|
||||||
|
|
|
@ -15,10 +15,10 @@ boot_cpu_frequency=500
|
||||||
boot_osflags=root=/dev/hda1 console=ttyS0
|
boot_osflags=root=/dev/hda1 console=ttyS0
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
console=/scratch/nilay/GEM5/system/binaries/console
|
console=/dist/binaries/console
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
|
kernel=/dist/binaries/vmlinux
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -26,8 +26,8 @@ mem_mode=atomic
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
|
pal=/dist/binaries/ts_osfpal
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
symbolfile=
|
symbolfile=
|
||||||
system_rev=1024
|
system_rev=1024
|
||||||
system_type=34
|
system_type=34
|
||||||
|
@ -697,7 +697,7 @@ table_size=65536
|
||||||
[system.disk0.image.child]
|
[system.disk0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.disk2]
|
[system.disk2]
|
||||||
|
@ -720,7 +720,7 @@ table_size=65536
|
||||||
[system.disk2.image.child]
|
[system.disk2.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.dvfs_handler]
|
[system.dvfs_handler]
|
||||||
|
@ -885,6 +885,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -935,7 +936,7 @@ system=system
|
||||||
[system.simple_disk.disk]
|
[system.simple_disk.disk]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
|
|
|
@ -1,8 +1,5 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
warn: Prefetch instructions in Alpha do not do anything
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
warn: Prefetch instructions in Alpha do not do anything
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
|
||||||
|
|
|
@ -1,11 +1,9 @@
|
||||||
Redirecting stdout to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full/simout
|
|
||||||
Redirecting stderr to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full/simerr
|
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 10:36:29
|
gem5 compiled Oct 29 2014 09:12:51
|
||||||
gem5 started Jun 21 2014 13:11:51
|
gem5 started Oct 29 2014 09:24:03
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.841612 # Nu
|
||||||
sim_ticks 1841612450000 # Number of ticks simulated
|
sim_ticks 1841612450000 # Number of ticks simulated
|
||||||
final_tick 1841612450000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1841612450000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 216403 # Simulator instruction rate (inst/s)
|
host_inst_rate 223623 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 216403 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 223623 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 6103470891 # Simulator tick rate (ticks/s)
|
host_tick_rate 6307109470 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 319676 # Number of bytes of host memory used
|
host_mem_usage 313464 # Number of bytes of host memory used
|
||||||
host_seconds 301.73 # Real time elapsed on the host
|
host_seconds 291.99 # Real time elapsed on the host
|
||||||
sim_insts 65295558 # Number of instructions simulated
|
sim_insts 65295558 # Number of instructions simulated
|
||||||
sim_ops 65295558 # Number of ops (including micro ops) simulated
|
sim_ops 65295558 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -737,8 +737,6 @@ system.iocache.fast_writes 41552 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::tsunami.ide 70 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::tsunami.ide 70 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 70 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 70 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::tsunami.ide 17280 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 17280 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::tsunami.ide 70 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::tsunami.ide 70 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 70 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 70 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::tsunami.ide 70 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::tsunami.ide 70 # number of overall MSHR misses
|
||||||
|
@ -753,16 +751,14 @@ system.iocache.overall_mshr_miss_latency::tsunami.ide 5776462
|
||||||
system.iocache.overall_mshr_miss_latency::total 5776462 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 5776462 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 0.404624 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 0.404624 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 0.404624 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 0.404624 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::tsunami.ide 0.415864 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 0.415864 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::tsunami.ide 0.404624 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::tsunami.ide 0.404624 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 0.404624 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 0.404624 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::tsunami.ide 0.404624 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::tsunami.ide 0.404624 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 0.404624 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 0.404624 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 82520.885714 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 82520.885714 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 82520.885714 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 82520.885714 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide 60157.282465 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60157.282465 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 82520.885714 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 82520.885714 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 82520.885714 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 82520.885714 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 82520.885714 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 82520.885714 # average overall mshr miss latency
|
||||||
|
|
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.physmem system.realview.nvmem
|
memories=system.realview.vram system.physmem system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -705,6 +705,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -1424,6 +1425,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -1561,15 +1563,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1588,8 +1591,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1624,7 +1627,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1647,8 +1650,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -1704,6 +1707,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1713,7 +1717,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -1742,46 +1746,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -1851,18 +1846,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1871,8 +1866,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1880,51 +1875,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1934,38 +2007,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1974,13 +2120,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1989,20 +2135,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -2013,7 +2159,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -2022,10 +2186,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2033,10 +2197,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -2048,18 +2212,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -2070,34 +2246,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2105,21 +2259,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -2129,9 +2272,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -2144,9 +2287,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -2158,8 +2301,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -2172,10 +2315,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2183,10 +2326,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2194,10 +2337,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2205,10 +2392,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,44 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
|
||||||
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
|
|
@ -1,17 +1,32 @@
|
||||||
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual/simout
|
|
||||||
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual/simerr
|
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled May 7 2014 10:57:46
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started May 7 2014 12:48:24
|
gem5 started Oct 29 2014 10:01:45
|
||||||
gem5 executing on cz3211bhr8
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu0.isa: ISA system set to: 0x15f94710 0x15f94710
|
0: system.cpu0.isa: ISA system set to: 0x40cab00 0x40cab00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x15f94710 0x15f94710
|
0: system.cpu1.isa: ISA system set to: 0x40cab00 0x40cab00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 1146870140500 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2843718094000 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.physmem system.realview.nvmem
|
memories=system.realview.vram system.physmem system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -705,6 +705,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu.istage2_mmu]
|
[system.cpu.istage2_mmu]
|
||||||
|
@ -771,7 +772,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.toL2Bus.master[0]
|
cpu_side=system.cpu.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.cpu.l2cache.tags]
|
[system.cpu.l2cache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -825,15 +826,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -852,8 +854,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -876,8 +878,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -933,6 +935,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -942,7 +945,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -971,46 +974,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -1080,18 +1074,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1100,8 +1094,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1109,51 +1103,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1163,38 +1235,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1203,13 +1348,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1218,20 +1363,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1242,7 +1387,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1251,10 +1414,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1262,10 +1425,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1277,18 +1440,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1299,34 +1474,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1334,21 +1487,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1358,9 +1500,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1373,9 +1515,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1387,8 +1529,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1401,10 +1543,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1412,10 +1554,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1423,10 +1565,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1434,10 +1620,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,38 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
|
||||||
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
|
|
@ -1,16 +1,31 @@
|
||||||
Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor/simout
|
|
||||||
Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor/simerr
|
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled May 7 2014 10:57:46
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started May 7 2014 17:07:27
|
gem5 started Oct 29 2014 10:01:02
|
||||||
gem5 executing on cz3211bhr8
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu.isa: ISA system set to: 0x1a1f0030 0x1a1f0030
|
0: system.cpu.isa: ISA system set to: 0x4defb00 0x4defb00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 2567809308500 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2852200332000 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.physmem system.realview.vram system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -308,6 +308,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu.checker.istage2_mmu]
|
[system.cpu.checker.istage2_mmu]
|
||||||
|
@ -762,6 +763,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu.istage2_mmu]
|
[system.cpu.istage2_mmu]
|
||||||
|
@ -828,7 +830,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.toL2Bus.master[0]
|
cpu_side=system.cpu.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.cpu.l2cache.tags]
|
[system.cpu.l2cache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -882,15 +884,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -909,8 +912,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -933,8 +936,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -990,6 +993,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -999,7 +1003,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -1028,46 +1032,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -1137,18 +1132,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1157,8 +1152,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1166,51 +1161,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1220,38 +1293,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1260,13 +1406,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1275,20 +1421,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1299,7 +1445,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1308,10 +1472,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1319,10 +1483,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1334,18 +1498,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1356,34 +1532,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1391,21 +1545,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1415,9 +1558,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1430,9 +1573,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1444,8 +1587,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1458,10 +1601,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1469,10 +1612,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1480,10 +1623,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1491,10 +1678,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,30 +1,49 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: 8445832500: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0
|
||||||
warn: 6127336500: Instruction results do not match! (Values may not actually be integers) Inst: 0x3704, checker: 0x3708
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 6135886500: Instruction results do not match! (Values may not actually be integers) Inst: 0x36c4, checker: 0x36c8
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 6171724500: Instruction results do not match! (Values may not actually be integers) Inst: 0x3604, checker: 0x3608
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 6187045500: Instruction results do not match! (Values may not actually be integers) Inst: 0x35c4, checker: 0x35c8
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 6729690500: Instruction results do not match! (Values may not actually be integers) Inst: 0x34f0, checker: 0x34f8
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 51815926000: Instruction results do not match! (Values may not actually be integers) Inst: 0x19dc, checker: 0x1a04
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 2464496392000: Instruction results do not match! (Values may not actually be integers) Inst: 0x2, checker: 0
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 2490035144500: Instruction results do not match! (Values may not actually be integers) Inst: 0x9d2b4, checker: 0
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: 2491240940500: Instruction results do not match! (Values may not actually be integers) Inst: 0x9d2a4, checker: 0
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
warn: 2491596722500: Instruction results do not match! (Values may not actually be integers) Inst: 0x2, checker: 0
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
warn: 2505538162500: Instruction results do not match! (Values may not actually be integers) Inst: 0x2, checker: 0
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
warn: 2507237495000: Instruction results do not match! (Values may not actually be integers) Inst: 0x2, checker: 0
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
warn: 2512436106000: Instruction results do not match! (Values may not actually be integers) Inst: 0x9d2b4, checker: 0
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
warn: 2512950831500: Instruction results do not match! (Values may not actually be integers) Inst: 0x9d2b4, checker: 0
|
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0]
|
||||||
warn: 2518637805000: Instruction results do not match! (Values may not actually be integers) Inst: 0x9d974, checker: 0
|
warn: 81667444500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000
|
||||||
warn: 2519704735000: Instruction results do not match! (Values may not actually be integers) Inst: 0x9d9fc, checker: 0
|
warn: Returning zero for read from miscreg pmcr
|
||||||
warn: 2519705958000: Instruction results do not match! (Values may not actually be integers) Inst: 0x9da34, checker: 0
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: CP14 unimplemented crn[12], opc1[5], crm[8], opc2[0]
|
||||||
|
warn: 404836653500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: instruction 'mcr dcisw' unimplemented
|
||||||
|
|
|
@ -1,15 +1,47 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:22:42
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started Jun 21 2014 21:27:42
|
gem5 started Oct 29 2014 10:12:13
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-checker
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu.checker.isa: ISA system set to: 0x639d990 0x639d990
|
0: system.cpu.checker.isa: ISA system set to: 0x59c2b00 0x59c2b00
|
||||||
0: system.cpu.isa: ISA system set to: 0x639d990 0x639d990
|
0: system.cpu.isa: ISA system set to: 0x59c2b00 0x59c2b00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 2525888859000 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2826845674500 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.physmem system.realview.nvmem
|
memories=system.realview.nvmem system.physmem system.realview.vram
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -612,6 +612,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -1238,6 +1239,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -1375,15 +1377,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1402,8 +1405,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1438,7 +1441,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1461,8 +1464,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -1518,6 +1521,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1527,7 +1531,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -1556,46 +1560,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -1665,18 +1660,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1685,8 +1680,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1694,51 +1689,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1748,38 +1821,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1788,13 +1934,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1803,20 +1949,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1827,7 +1973,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1836,10 +2000,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1847,10 +2011,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1862,18 +2026,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1884,34 +2060,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1919,21 +2073,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1943,9 +2086,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1958,9 +2101,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1972,8 +2115,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1986,10 +2129,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1997,10 +2140,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2008,10 +2151,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -2019,10 +2206,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,44 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: allocating bonus target for snoop
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: instruction 'mcr dcisw' unimplemented
|
||||||
|
|
|
@ -1,15 +1,32 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:22:42
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started Jun 21 2014 21:27:42
|
gem5 started Oct 29 2014 10:14:43
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3-dual
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu0.isa: ISA system set to: 0x628e100 0x628e100
|
0: system.cpu0.isa: ISA system set to: 0x5555b00 0x5555b00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x628e100 0x628e100
|
0: system.cpu1.isa: ISA system set to: 0x5555b00 0x5555b00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 2605245500000 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2824356167500 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.physmem system.realview.nvmem
|
memories=system.realview.nvmem system.physmem system.realview.vram
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -612,6 +612,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu.istage2_mmu]
|
[system.cpu.istage2_mmu]
|
||||||
|
@ -678,7 +679,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.toL2Bus.master[0]
|
cpu_side=system.cpu.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.cpu.l2cache.tags]
|
[system.cpu.l2cache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -732,15 +733,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -759,8 +761,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -783,8 +785,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -840,6 +842,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -849,7 +852,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -878,46 +881,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -987,18 +981,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1007,8 +1001,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1016,51 +1010,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1070,38 +1142,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1110,13 +1255,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1125,20 +1270,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1149,7 +1294,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1158,10 +1321,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1169,10 +1332,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1184,18 +1347,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1206,34 +1381,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1241,21 +1394,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1265,9 +1407,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1280,9 +1422,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1294,8 +1436,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1308,10 +1450,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1319,10 +1461,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1330,10 +1472,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1341,10 +1527,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,14 +1,39 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: CP14 unimplemented crn[12], opc1[5], crm[8], opc2[0]
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: instruction 'mcr dcisw' unimplemented
|
||||||
|
|
|
@ -1,14 +1,31 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:22:42
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started Jun 21 2014 21:27:42
|
gem5 started Oct 29 2014 10:06:55
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu.isa: ISA system set to: 0x4e2f380 0x4e2f380
|
0: system.cpu.isa: ISA system set to: 0x5387b00 0x5387b00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 2525888859000 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2826845674500 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=atomic
|
mem_mode=atomic
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.physmem system.realview.nvmem
|
memories=system.realview.vram system.physmem system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -278,6 +278,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -424,6 +425,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -948,6 +950,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu2.istage2_mmu]
|
[system.cpu2.istage2_mmu]
|
||||||
|
@ -1019,15 +1022,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1046,8 +1050,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1082,7 +1086,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1105,8 +1109,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -1162,6 +1166,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1171,7 +1176,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -1200,46 +1205,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -1309,18 +1305,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1329,8 +1325,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1338,51 +1334,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1392,38 +1466,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1432,13 +1579,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1447,20 +1594,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1471,7 +1618,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1480,10 +1645,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1491,10 +1656,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1506,18 +1671,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1528,34 +1705,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1563,21 +1718,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1587,9 +1731,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1602,9 +1746,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1616,8 +1760,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1630,10 +1774,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1641,10 +1785,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1652,10 +1796,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1663,10 +1851,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,28 +1,45 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
warn: User mode does not have SPSR
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
warn: User mode does not have SPSR
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
warn: User mode does not have SPSR
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
warn: User mode does not have SPSR
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[3]
|
||||||
|
warn: CP14 unimplemented crn[6], opc1[5], crm[4], opc2[3]
|
||||||
|
warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[1]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[2]
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: instruction 'mcr dcisw' unimplemented
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
|
@ -31,6 +48,8 @@ warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
|
warn: CP14 unimplemented crn[14], opc1[7], crm[1], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[14], opc1[7], crm[14], opc2[7]
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
|
|
|
@ -1,11 +1,11 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:22:42
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started Jun 21 2014 21:27:42
|
gem5 started Oct 29 2014 10:14:55
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-full
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
0: system.cpu0.isa: ISA system set to: 0x61c8fe0 0x61c8fe0
|
0: system.cpu0.isa: ISA system set to: 0x5395b00 0x5395b00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x61c8fe0 0x61c8fe0
|
0: system.cpu1.isa: ISA system set to: 0x5395b00 0x5395b00
|
||||||
0: system.cpu2.isa: ISA system set to: 0x61c8fe0 0x61c8fe0
|
0: system.cpu2.isa: ISA system set to: 0x5395b00 0x5395b00
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.physmem system.realview.nvmem
|
memories=system.realview.vram system.physmem system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -654,6 +654,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -1180,6 +1181,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -1251,15 +1253,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1278,8 +1281,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1314,7 +1317,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -1337,8 +1340,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -1394,6 +1397,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -1403,7 +1407,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -1432,46 +1436,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -1541,18 +1536,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1561,8 +1556,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1570,51 +1565,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1624,38 +1697,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1664,13 +1810,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1679,20 +1825,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1703,7 +1849,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1712,10 +1876,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1723,10 +1887,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1738,18 +1902,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1760,34 +1936,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1795,21 +1949,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1819,9 +1962,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1834,9 +1977,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1848,8 +1991,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1862,10 +2005,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1873,10 +2016,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1884,10 +2027,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1895,10 +2082,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,24 +1,54 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
|
||||||
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[8], opc1[4], crm[12], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[4], crm[8], opc2[1]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[4], crm[0], opc2[5]
|
||||||
|
warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[1]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[6]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2]
|
||||||
|
warn: CP14 unimplemented crn[4], opc1[5], crm[12], opc2[1]
|
||||||
|
warn: CP14 unimplemented crn[15], opc1[0], crm[8], opc2[0]
|
||||||
|
warn: User mode does not have SPSR
|
||||||
|
warn: User mode does not have SPSR
|
||||||
|
warn: User mode does not have SPSR
|
||||||
|
warn: User mode does not have SPSR
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
|
|
|
@ -1,10 +1,10 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:22:42
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started Jun 21 2014 21:27:42
|
gem5 started Oct 29 2014 10:21:54
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
0: system.cpu0.isa: ISA system set to: 0x60c5390 0x60c5390
|
0: system.cpu0.isa: ISA system set to: 0x422cb00 0x422cb00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x60c5390 0x60c5390
|
0: system.cpu1.isa: ISA system set to: 0x422cb00 0x422cb00
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.physmem system.realview.nvmem system.realview.vram
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -274,6 +274,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -420,6 +421,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -491,15 +493,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -518,8 +521,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -554,7 +557,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -577,8 +580,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -634,6 +637,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -643,7 +647,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -672,46 +676,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -781,18 +776,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -801,8 +796,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -810,51 +805,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -864,38 +937,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -904,13 +1050,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -919,20 +1065,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -943,7 +1089,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -952,10 +1116,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -963,10 +1127,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -978,18 +1142,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1000,34 +1176,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1035,21 +1189,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1059,9 +1202,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1074,9 +1217,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1088,8 +1231,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1102,10 +1245,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1113,10 +1256,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1124,10 +1267,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1135,10 +1322,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,20 +1,36 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: User mode does not have SPSR
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
|
|
|
@ -1,10 +1,10 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 23 2014 12:08:08
|
gem5 compiled Oct 29 2014 09:18:22
|
||||||
gem5 started Jan 23 2014 19:11:44
|
gem5 started Oct 29 2014 10:26:21
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-timing -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-timing
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-timing -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
0: system.cpu0.isa: ISA system set to: 0x6f57400 0x6f57400
|
0: system.cpu0.isa: ISA system set to: 0x3fa4b00 0x3fa4b00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x6f57400 0x6f57400
|
0: system.cpu1.isa: ISA system set to: 0x3fa4b00 0x3fa4b00
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -20,7 +20,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
intel_mp_pointer=system.intel_mp_pointer
|
intel_mp_pointer=system.intel_mp_pointer
|
||||||
intel_mp_table=system.intel_mp_table
|
intel_mp_table=system.intel_mp_table
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
|
kernel=/dist/binaries/x86_64-vmlinux-2.6.22.9
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=18446744073709551615
|
load_addr_mask=18446744073709551615
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -28,7 +28,7 @@ mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
smbios_table=system.smbios_table
|
smbios_table=system.smbios_table
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -1560,7 +1560,7 @@ table_size=65536
|
||||||
[system.pc.south_bridge.ide.disks0.image.child]
|
[system.pc.south_bridge.ide.disks0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
|
image_file=/dist/disks/linux-x86.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.pc.south_bridge.ide.disks1]
|
[system.pc.south_bridge.ide.disks1]
|
||||||
|
@ -1583,7 +1583,7 @@ table_size=65536
|
||||||
[system.pc.south_bridge.ide.disks1.image.child]
|
[system.pc.south_bridge.ide.disks1.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.pc.south_bridge.int_lines0]
|
[system.pc.south_bridge.int_lines0]
|
||||||
|
@ -1807,6 +1807,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
|
|
@ -1,11 +1,11 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Reading current count from inactive timer.
|
warn: Reading current count from inactive timer.
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Don't know what interrupt to clear for console.
|
warn: Don't know what interrupt to clear for console.
|
||||||
warn: x86 cpuid: unknown family 0x8086
|
warn: x86 cpuid: unknown family 0x8086
|
||||||
warn: x86 cpuid: unknown family 0x8086
|
warn: x86 cpuid: unknown family 0x8086
|
||||||
warn: x86 cpuid: unimplemented function 8
|
warn: x86 cpuid: unknown family 0x8086
|
||||||
warn: x86 cpuid: unimplemented function 8
|
|
||||||
warn: Tried to clear PCI interrupt 14
|
warn: Tried to clear PCI interrupt 14
|
||||||
warn: Unknown mouse command 0xe1.
|
warn: Unknown mouse command 0xe1.
|
||||||
warn: instruction 'wbinvd' unimplemented
|
warn: instruction 'wbinvd' unimplemented
|
||||||
|
|
|
@ -1,12 +1,12 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:13:07
|
gem5 compiled Oct 29 2014 09:18:07
|
||||||
gem5 started Jun 21 2014 22:16:40
|
gem5 started Oct 29 2014 09:27:02
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing
|
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re /work/gem5.latest/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/x86_64-vmlinux-2.6.22.9
|
info: kernel located at: /dist/binaries/x86_64-vmlinux-2.6.22.9
|
||||||
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 5137926173000 because m5_exit instruction encountered
|
Exiting @ tick 5125902116500 because m5_exit instruction encountered
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 5.125902 # Nu
|
||||||
sim_ticks 5125902116500 # Number of ticks simulated
|
sim_ticks 5125902116500 # Number of ticks simulated
|
||||||
final_tick 5125902116500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 5125902116500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 254798 # Simulator instruction rate (inst/s)
|
host_inst_rate 196886 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 503662 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 389187 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 3201100243 # Simulator tick rate (ticks/s)
|
host_tick_rate 2473535129 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 749084 # Number of bytes of host memory used
|
host_mem_usage 743248 # Number of bytes of host memory used
|
||||||
host_seconds 1601.29 # Real time elapsed on the host
|
host_seconds 2072.30 # Real time elapsed on the host
|
||||||
sim_insts 408006726 # Number of instructions simulated
|
sim_insts 408006726 # Number of instructions simulated
|
||||||
sim_ops 806511598 # Number of ops (including micro ops) simulated
|
sim_ops 806511598 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -426,8 +426,6 @@ system.iocache.fast_writes 46720 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::pc.south_bridge.ide 910 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::pc.south_bridge.ide 910 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 910 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 910 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::pc.south_bridge.ide 46720 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 46720 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::pc.south_bridge.ide 910 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::pc.south_bridge.ide 910 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 910 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 910 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::pc.south_bridge.ide 910 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::pc.south_bridge.ide 910 # number of overall MSHR misses
|
||||||
|
@ -442,16 +440,14 @@ system.iocache.overall_mshr_miss_latency::pc.south_bridge.ide 104814946
|
||||||
system.iocache.overall_mshr_miss_latency::total 104814946 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 104814946 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 1 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::pc.south_bridge.ide 115181.259341 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::pc.south_bridge.ide 115181.259341 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 115181.259341 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 115181.259341 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::pc.south_bridge.ide 60928.460338 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::pc.south_bridge.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60928.460338 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::pc.south_bridge.ide 115181.259341 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::pc.south_bridge.ide 115181.259341 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 115181.259341 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 115181.259341 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::pc.south_bridge.ide 115181.259341 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::pc.south_bridge.ide 115181.259341 # average overall mshr miss latency
|
||||||
|
|
|
@ -20,7 +20,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
intel_mp_pointer=system.intel_mp_pointer
|
intel_mp_pointer=system.intel_mp_pointer
|
||||||
intel_mp_table=system.intel_mp_table
|
intel_mp_table=system.intel_mp_table
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
|
kernel=/dist/binaries/x86_64-vmlinux-2.6.22.9
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=18446744073709551615
|
load_addr_mask=18446744073709551615
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -28,7 +28,7 @@ mem_mode=atomic
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
smbios_table=system.smbios_table
|
smbios_table=system.smbios_table
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -1616,7 +1616,7 @@ table_size=65536
|
||||||
[system.pc.south_bridge.ide.disks0.image.child]
|
[system.pc.south_bridge.ide.disks0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
|
image_file=/dist/disks/linux-x86.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.pc.south_bridge.ide.disks1]
|
[system.pc.south_bridge.ide.disks1]
|
||||||
|
@ -1639,7 +1639,7 @@ table_size=65536
|
||||||
[system.pc.south_bridge.ide.disks1.image.child]
|
[system.pc.south_bridge.ide.disks1.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.pc.south_bridge.int_lines0]
|
[system.pc.south_bridge.int_lines0]
|
||||||
|
@ -1863,6 +1863,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
|
|
@ -1,13 +1,10 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Reading current count from inactive timer.
|
warn: Reading current count from inactive timer.
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Don't know what interrupt to clear for console.
|
warn: Don't know what interrupt to clear for console.
|
||||||
warn: x86 cpuid: unknown family 0xbacc
|
|
||||||
warn: x86 cpuid: unknown family 0xbacc
|
|
||||||
warn: x86 cpuid: unknown family 0x8086
|
warn: x86 cpuid: unknown family 0x8086
|
||||||
warn: x86 cpuid: unknown family 0x8086
|
warn: x86 cpuid: unknown family 0x8086
|
||||||
warn: x86 cpuid: unimplemented function 8
|
|
||||||
warn: x86 cpuid: unimplemented function 8
|
|
||||||
warn: Tried to clear PCI interrupt 14
|
warn: Tried to clear PCI interrupt 14
|
||||||
warn: Unknown mouse command 0xe1.
|
warn: Unknown mouse command 0xe1.
|
||||||
warn: instruction 'wbinvd' unimplemented
|
warn: instruction 'wbinvd' unimplemented
|
||||||
|
|
|
@ -1,9 +1,9 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jun 21 2014 11:13:07
|
gem5 compiled Oct 29 2014 09:18:07
|
||||||
gem5 started Jun 21 2014 22:18:32
|
gem5 started Oct 29 2014 09:28:19
|
||||||
gem5 executing on phenom
|
gem5 executing on u200540-lin
|
||||||
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full
|
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full -re /work/gem5.latest/tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-switcheroo-full
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 5.137752 # Nu
|
||||||
sim_ticks 5137751757500 # Number of ticks simulated
|
sim_ticks 5137751757500 # Number of ticks simulated
|
||||||
final_tick 5137751757500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 5137751757500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 205879 # Simulator instruction rate (inst/s)
|
host_inst_rate 311526 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 409313 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 619354 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 4343855741 # Simulator tick rate (ticks/s)
|
host_tick_rate 6572918502 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 976756 # Number of bytes of host memory used
|
host_mem_usage 927072 # Number of bytes of host memory used
|
||||||
host_seconds 1182.76 # Real time elapsed on the host
|
host_seconds 781.65 # Real time elapsed on the host
|
||||||
sim_insts 243506025 # Number of instructions simulated
|
sim_insts 243506025 # Number of instructions simulated
|
||||||
sim_ops 484120527 # Number of ops (including micro ops) simulated
|
sim_ops 484120527 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -854,8 +854,6 @@ system.iocache.fast_writes 46720 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::pc.south_bridge.ide 734 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::pc.south_bridge.ide 734 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 734 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 734 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::pc.south_bridge.ide 22056 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 22056 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::pc.south_bridge.ide 734 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::pc.south_bridge.ide 734 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 734 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 734 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::pc.south_bridge.ide 734 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::pc.south_bridge.ide 734 # number of overall MSHR misses
|
||||||
|
@ -870,16 +868,14 @@ system.iocache.overall_mshr_miss_latency::pc.south_bridge.ide 93740027
|
||||||
system.iocache.overall_mshr_miss_latency::total 93740027 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 93740027 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::pc.south_bridge.ide 0.811947 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::pc.south_bridge.ide 0.811947 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 0.811947 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 0.811947 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::pc.south_bridge.ide 0.472089 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 0.472089 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::pc.south_bridge.ide 0.811947 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::pc.south_bridge.ide 0.811947 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 0.811947 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 0.811947 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::pc.south_bridge.ide 0.811947 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::pc.south_bridge.ide 0.811947 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 0.811947 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 0.811947 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::pc.south_bridge.ide 127711.208447 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::pc.south_bridge.ide 127711.208447 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 127711.208447 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 127711.208447 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::pc.south_bridge.ide 60294.715633 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::pc.south_bridge.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60294.715633 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::pc.south_bridge.ide 127711.208447 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::pc.south_bridge.ide 127711.208447 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 127711.208447 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 127711.208447 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::pc.south_bridge.ide 127711.208447 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::pc.south_bridge.ide 127711.208447 # average overall mshr miss latency
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 0.407884 # Nu
|
||||||
sim_ticks 407883784500 # Number of ticks simulated
|
sim_ticks 407883784500 # Number of ticks simulated
|
||||||
final_tick 407883784500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 407883784500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 135225 # Simulator instruction rate (inst/s)
|
host_inst_rate 91246 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 166480 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 112336 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 86093843 # Simulator tick rate (ticks/s)
|
host_tick_rate 58093586 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 2533572 # Number of bytes of host memory used
|
host_mem_usage 2566152 # Number of bytes of host memory used
|
||||||
host_seconds 4737.67 # Real time elapsed on the host
|
host_seconds 7021.15 # Real time elapsed on the host
|
||||||
sim_insts 640649298 # Number of instructions simulated
|
sim_insts 640649298 # Number of instructions simulated
|
||||||
sim_ops 788724957 # Number of ops (including micro ops) simulated
|
sim_ops 788724957 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -420,7 +420,7 @@ system.cpu.numCycles 815767570 # nu
|
||||||
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
||||||
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
||||||
system.cpu.fetch.icacheStallCycles 84062545 # Number of cycles fetch is stalled on an Icache miss
|
system.cpu.fetch.icacheStallCycles 84062545 # Number of cycles fetch is stalled on an Icache miss
|
||||||
system.cpu.fetch.Insts 1200075862 # Number of instructions fetch has processed
|
system.cpu.fetch.Insts 1200075863 # Number of instructions fetch has processed
|
||||||
system.cpu.fetch.Branches 233961455 # Number of branches that fetch encountered
|
system.cpu.fetch.Branches 233961455 # Number of branches that fetch encountered
|
||||||
system.cpu.fetch.predictedBranches 133292629 # Number of branches that fetch has predicted taken
|
system.cpu.fetch.predictedBranches 133292629 # Number of branches that fetch has predicted taken
|
||||||
system.cpu.fetch.Cycles 716015819 # Number of cycles fetch has run and was not squashing or blocked
|
system.cpu.fetch.Cycles 716015819 # Number of cycles fetch has run and was not squashing or blocked
|
||||||
|
|
|
@ -15,10 +15,10 @@ boot_cpu_frequency=500
|
||||||
boot_osflags=root=/dev/hda1 console=ttyS0
|
boot_osflags=root=/dev/hda1 console=ttyS0
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
console=/scratch/nilay/GEM5/system/binaries/console
|
console=/dist/binaries/console
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
|
kernel=/dist/binaries/vmlinux
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -26,8 +26,8 @@ mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
|
pal=/dist/binaries/ts_osfpal
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
symbolfile=
|
symbolfile=
|
||||||
system_rev=1024
|
system_rev=1024
|
||||||
system_type=34
|
system_type=34
|
||||||
|
@ -339,7 +339,7 @@ table_size=65536
|
||||||
[system.disk0.image.child]
|
[system.disk0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.disk2]
|
[system.disk2]
|
||||||
|
@ -362,7 +362,7 @@ table_size=65536
|
||||||
[system.disk2.image.child]
|
[system.disk2.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.dvfs_handler]
|
[system.dvfs_handler]
|
||||||
|
@ -527,6 +527,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -577,7 +578,7 @@ system=system
|
||||||
[system.simple_disk.disk]
|
[system.simple_disk.disk]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
|
|
|
@ -1,3 +1,4 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
warn: Prefetch instructions in Alpha do not do anything
|
||||||
|
|
|
@ -1,13 +1,13 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 16:27:55
|
gem5 compiled Oct 29 2014 09:12:51
|
||||||
gem5 started Jan 22 2014 17:25:12
|
gem5 started Oct 29 2014 09:20:02
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/vmlinux
|
info: kernel located at: /dist/binaries/vmlinux
|
||||||
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
info: Launching CPU 1 @ 688618000
|
info: Launching CPU 1 @ 690168000
|
||||||
Exiting @ tick 1960909874500 because m5_exit instruction encountered
|
Exiting @ tick 1961826628500 because m5_exit instruction encountered
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.961827 # Nu
|
||||||
sim_ticks 1961826628500 # Number of ticks simulated
|
sim_ticks 1961826628500 # Number of ticks simulated
|
||||||
final_tick 1961826628500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1961826628500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 855480 # Simulator instruction rate (inst/s)
|
host_inst_rate 1248737 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 855480 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1248737 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 27561784483 # Simulator tick rate (ticks/s)
|
host_tick_rate 40231703865 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 318220 # Number of bytes of host memory used
|
host_mem_usage 312404 # Number of bytes of host memory used
|
||||||
host_seconds 71.18 # Real time elapsed on the host
|
host_seconds 48.76 # Real time elapsed on the host
|
||||||
sim_insts 60892387 # Number of instructions simulated
|
sim_insts 60892387 # Number of instructions simulated
|
||||||
sim_ops 60892387 # Number of ops (including micro ops) simulated
|
sim_ops 60892387 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -728,8 +728,6 @@ system.iocache.fast_writes 41552 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::tsunami.ide 174 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::tsunami.ide 174 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 174 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 174 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::tsunami.ide 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::tsunami.ide 174 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::tsunami.ide 174 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 174 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 174 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::tsunami.ide 174 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::tsunami.ide 174 # number of overall MSHR misses
|
||||||
|
@ -744,16 +742,14 @@ system.iocache.overall_mshr_miss_latency::tsunami.ide 12199383
|
||||||
system.iocache.overall_mshr_miss_latency::total 12199383 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 12199383 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 1 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 70111.396552 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 70111.396552 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 70111.396552 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 70111.396552 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide 60199.384049 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60199.384049 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 70111.396552 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 70111.396552 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 70111.396552 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 70111.396552 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 70111.396552 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 70111.396552 # average overall mshr miss latency
|
||||||
|
|
|
@ -15,10 +15,10 @@ boot_cpu_frequency=500
|
||||||
boot_osflags=root=/dev/hda1 console=ttyS0
|
boot_osflags=root=/dev/hda1 console=ttyS0
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
console=/scratch/nilay/GEM5/system/binaries/console
|
console=/dist/binaries/console
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
|
kernel=/dist/binaries/vmlinux
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=1099511627775
|
load_addr_mask=1099511627775
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -26,8 +26,8 @@ mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
|
pal=/dist/binaries/ts_osfpal
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
symbolfile=
|
symbolfile=
|
||||||
system_rev=1024
|
system_rev=1024
|
||||||
system_type=34
|
system_type=34
|
||||||
|
@ -260,7 +260,7 @@ table_size=65536
|
||||||
[system.disk0.image.child]
|
[system.disk0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.disk2]
|
[system.disk2]
|
||||||
|
@ -283,7 +283,7 @@ table_size=65536
|
||||||
[system.disk2.image.child]
|
[system.disk2.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.dvfs_handler]
|
[system.dvfs_handler]
|
||||||
|
@ -413,6 +413,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -463,7 +464,7 @@ system=system
|
||||||
[system.simple_disk.disk]
|
[system.simple_disk.disk]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
|
image_file=/dist/disks/linux-latest.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
|
|
|
@ -1,3 +1,4 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
warn: Prefetch instructions in Alpha do not do anything
|
warn: Prefetch instructions in Alpha do not do anything
|
||||||
|
|
|
@ -1,12 +1,12 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 16:27:55
|
gem5 compiled Oct 29 2014 09:12:51
|
||||||
gem5 started Jan 22 2014 17:24:48
|
gem5 started Oct 29 2014 09:20:00
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing
|
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/vmlinux
|
info: kernel located at: /dist/binaries/vmlinux
|
||||||
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 1920428041000 because m5_exit instruction encountered
|
Exiting @ tick 1919439025000 because m5_exit instruction encountered
|
||||||
|
|
|
@ -4,11 +4,11 @@ sim_seconds 1.919439 # Nu
|
||||||
sim_ticks 1919439025000 # Number of ticks simulated
|
sim_ticks 1919439025000 # Number of ticks simulated
|
||||||
final_tick 1919439025000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
final_tick 1919439025000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
||||||
host_inst_rate 960719 # Simulator instruction rate (inst/s)
|
host_inst_rate 1406989 # Simulator instruction rate (inst/s)
|
||||||
host_op_rate 960718 # Simulator op (including micro ops) rate (op/s)
|
host_op_rate 1406988 # Simulator op (including micro ops) rate (op/s)
|
||||||
host_tick_rate 32869301826 # Simulator tick rate (ticks/s)
|
host_tick_rate 48137648137 # Simulator tick rate (ticks/s)
|
||||||
host_mem_usage 317196 # Number of bytes of host memory used
|
host_mem_usage 309300 # Number of bytes of host memory used
|
||||||
host_seconds 58.40 # Real time elapsed on the host
|
host_seconds 39.87 # Real time elapsed on the host
|
||||||
sim_insts 56102180 # Number of instructions simulated
|
sim_insts 56102180 # Number of instructions simulated
|
||||||
sim_ops 56102180 # Number of ops (including micro ops) simulated
|
sim_ops 56102180 # Number of ops (including micro ops) simulated
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
system.voltage_domain.voltage 1 # Voltage in Volts
|
||||||
|
@ -412,8 +412,6 @@ system.iocache.fast_writes 41552 # nu
|
||||||
system.iocache.cache_copies 0 # number of cache copies performed
|
system.iocache.cache_copies 0 # number of cache copies performed
|
||||||
system.iocache.ReadReq_mshr_misses::tsunami.ide 173 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::tsunami.ide 173 # number of ReadReq MSHR misses
|
||||||
system.iocache.ReadReq_mshr_misses::total 173 # number of ReadReq MSHR misses
|
system.iocache.ReadReq_mshr_misses::total 173 # number of ReadReq MSHR misses
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::tsunami.ide 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_misses::total 41552 # number of WriteInvalidateReq MSHR misses
|
|
||||||
system.iocache.demand_mshr_misses::tsunami.ide 173 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::tsunami.ide 173 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.demand_mshr_misses::total 173 # number of demand (read+write) MSHR misses
|
system.iocache.demand_mshr_misses::total 173 # number of demand (read+write) MSHR misses
|
||||||
system.iocache.overall_mshr_misses::tsunami.ide 173 # number of overall MSHR misses
|
system.iocache.overall_mshr_misses::tsunami.ide 173 # number of overall MSHR misses
|
||||||
|
@ -428,16 +426,14 @@ system.iocache.overall_mshr_miss_latency::tsunami.ide 15526633
|
||||||
system.iocache.overall_mshr_miss_latency::total 15526633 # number of overall MSHR miss cycles
|
system.iocache.overall_mshr_miss_latency::total 15526633 # number of overall MSHR miss cycles
|
||||||
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::tsunami.ide 0.999904 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.WriteInvalidateReq_mshr_miss_rate::total 0.999904 # mshr miss rate for WriteInvalidateReq accesses
|
|
||||||
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
|
||||||
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::tsunami.ide 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 89749.323699 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 89749.323699 # average ReadReq mshr miss latency
|
||||||
system.iocache.ReadReq_avg_mshr_miss_latency::total 89749.323699 # average ReadReq mshr miss latency
|
system.iocache.ReadReq_avg_mshr_miss_latency::total 89749.323699 # average ReadReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide 60458.661533 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::tsunami.ide inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total 60458.661533 # average WriteInvalidateReq mshr miss latency
|
system.iocache.WriteInvalidateReq_avg_mshr_miss_latency::total inf # average WriteInvalidateReq mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 89749.323699 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 89749.323699 # average overall mshr miss latency
|
||||||
system.iocache.demand_avg_mshr_miss_latency::total 89749.323699 # average overall mshr miss latency
|
system.iocache.demand_avg_mshr_miss_latency::total 89749.323699 # average overall mshr miss latency
|
||||||
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 89749.323699 # average overall mshr miss latency
|
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 89749.323699 # average overall mshr miss latency
|
||||||
|
|
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=atomic
|
mem_mode=atomic
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.realview.nvmem system.physmem system.realview.vram
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -278,6 +278,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -570,6 +571,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -707,15 +709,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -734,8 +737,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -770,7 +773,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -793,8 +796,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -824,47 +827,38 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -934,18 +928,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -954,8 +948,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -963,51 +957,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1017,38 +1089,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1057,13 +1202,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1072,20 +1217,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1096,7 +1241,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1105,10 +1268,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1116,10 +1279,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1131,18 +1294,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1153,34 +1328,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1188,21 +1341,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1212,9 +1354,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1227,9 +1369,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1241,8 +1383,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1255,10 +1397,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1266,10 +1408,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1277,10 +1419,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1288,10 +1474,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,39 @@
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
|
|
@ -1,15 +1,32 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 23 2014 12:08:08
|
gem5 compiled Oct 29 2014 15:46:15
|
||||||
gem5 started Jan 23 2014 17:07:33
|
gem5 started Oct 29 2014 15:58:03
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu0.isa: ISA system set to: 0x6a97800 0x6a97800
|
0: system.cpu0.isa: ISA system set to: 0x530db00 0x530db00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x6a97800 0x6a97800
|
0: system.cpu1.isa: ISA system set to: 0x530db00 0x530db00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 912096767500 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2802882496500 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=atomic
|
mem_mode=atomic
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.physmem system.realview.vram system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -278,6 +278,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu.istage2_mmu]
|
[system.cpu.istage2_mmu]
|
||||||
|
@ -344,7 +345,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.toL2Bus.master[0]
|
cpu_side=system.cpu.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.cpu.l2cache.tags]
|
[system.cpu.l2cache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -398,15 +399,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -425,8 +427,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -449,8 +451,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -480,47 +482,38 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -590,18 +583,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -610,8 +603,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -619,51 +612,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -673,38 +744,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -713,13 +857,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -728,20 +872,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -752,7 +896,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -761,10 +923,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -772,10 +934,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -787,18 +949,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -809,34 +983,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -844,21 +996,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -868,9 +1009,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -883,9 +1024,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -897,8 +1038,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -911,10 +1052,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -922,10 +1063,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -933,10 +1074,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -944,10 +1129,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,32 @@
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
|
|
@ -1,14 +1,31 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 23 2014 12:08:08
|
gem5 compiled Oct 29 2014 15:46:15
|
||||||
gem5 started Jan 23 2014 17:06:34
|
gem5 started Oct 29 2014 15:56:38
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu.isa: ISA system set to: 0x55f5800 0x55f5800
|
0: system.cpu.isa: ISA system set to: 0x55e4b00 0x55e4b00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 2332810269000 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2783853461500 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.realview.nvmem system.physmem system.realview.vram
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -274,6 +274,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -562,6 +563,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -699,15 +701,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -726,8 +729,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -762,7 +765,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -785,8 +788,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -842,6 +845,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -851,7 +855,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -880,46 +884,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -989,18 +984,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -1009,8 +1004,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -1018,51 +1013,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -1072,38 +1145,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1112,13 +1258,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -1127,20 +1273,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -1151,7 +1297,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -1160,10 +1324,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1171,10 +1335,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -1186,18 +1350,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -1208,34 +1384,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1243,21 +1397,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1267,9 +1410,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1282,9 +1425,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1296,8 +1439,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1310,10 +1453,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1321,10 +1464,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1332,10 +1475,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1343,10 +1530,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,40 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
|
warn: instruction 'mcr bpiall' unimplemented
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
|
|
@ -1,15 +1,32 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 23 2014 12:08:08
|
gem5 compiled Oct 29 2014 15:46:15
|
||||||
gem5 started Jan 23 2014 17:08:43
|
gem5 started Oct 29 2014 15:58:33
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu0.isa: ISA system set to: 0x6319800 0x6319800
|
0: system.cpu0.isa: ISA system set to: 0x5550b00 0x5550b00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x6319800 0x6319800
|
0: system.cpu1.isa: ISA system set to: 0x5550b00 0x5550b00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 1196139241000 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2866929256000 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=timing
|
mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.physmem system.realview.vram system.realview.nvmem
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -274,6 +274,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu.istage2_mmu]
|
[system.cpu.istage2_mmu]
|
||||||
|
@ -340,7 +341,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.cpu.toL2Bus.master[0]
|
cpu_side=system.cpu.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.cpu.l2cache.tags]
|
[system.cpu.l2cache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -394,15 +395,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -421,8 +423,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -445,8 +447,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -502,6 +504,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -511,7 +514,7 @@ mem_sched_policy=frfcfs
|
||||||
min_writes_per_switch=16
|
min_writes_per_switch=16
|
||||||
null=false
|
null=false
|
||||||
page_policy=open_adaptive
|
page_policy=open_adaptive
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
ranks_per_channel=2
|
ranks_per_channel=2
|
||||||
read_buffer_size=32
|
read_buffer_size=32
|
||||||
static_backend_latency=10000
|
static_backend_latency=10000
|
||||||
|
@ -540,46 +543,37 @@ tXSDLL=0
|
||||||
write_buffer_size=64
|
write_buffer_size=64
|
||||||
write_high_thresh_perc=85
|
write_high_thresh_perc=85
|
||||||
write_low_thresh_perc=50
|
write_low_thresh_perc=50
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -649,18 +643,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -669,8 +663,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -678,51 +672,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -732,38 +804,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -772,13 +917,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -787,20 +932,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -811,7 +956,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -820,10 +983,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -831,10 +994,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -846,18 +1009,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -868,34 +1043,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -903,21 +1056,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -927,9 +1069,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -942,9 +1084,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -956,8 +1098,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -970,10 +1112,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -981,10 +1123,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -992,10 +1134,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1003,10 +1189,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,13 +1,33 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
|
|
|
@ -1,14 +1,31 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 23 2014 12:08:08
|
gem5 compiled Oct 29 2014 15:46:15
|
||||||
gem5 started Jan 23 2014 17:08:28
|
gem5 started Oct 29 2014 15:58:15
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
info: kernel located at: /dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
0: system.cpu.isa: ISA system set to: 0x6b2c800 0x6b2c800
|
0: system.cpu.isa: ISA system set to: 0x56b5b00 0x56b5b00
|
||||||
info: Using bootloader at address 0x80000000
|
info: Using bootloader at address 0x10
|
||||||
info: Using kernel entry physical address at 0x8000
|
info: Using kernel entry physical address at 0x80008000
|
||||||
|
info: Loading DTB file: /dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 2616536483000 because m5_exit instruction encountered
|
info: Read CNTFREQ_EL0 frequency
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
|
||||||
|
Exiting @ tick 2902619131000 because m5_exit instruction encountered
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -11,18 +11,18 @@ time_sync_spin_threshold=100000000
|
||||||
[system]
|
[system]
|
||||||
type=LinuxArmSystem
|
type=LinuxArmSystem
|
||||||
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
|
||||||
atags_addr=256
|
atags_addr=134217728
|
||||||
boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
|
boot_loader=/dist/binaries/boot_emm.arm
|
||||||
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
|
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
|
||||||
boot_release_addr=65528
|
boot_release_addr=65528
|
||||||
cache_line_size=64
|
cache_line_size=64
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dtb_filename=
|
dtb_filename=/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
|
||||||
early_kernel_symbols=false
|
early_kernel_symbols=false
|
||||||
enable_context_switch_stats_dump=false
|
enable_context_switch_stats_dump=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
flags_addr=268435504
|
flags_addr=469827632
|
||||||
gic_cpu_addr=520093952
|
gic_cpu_addr=738205696
|
||||||
have_generic_timer=false
|
have_generic_timer=false
|
||||||
have_large_asid_64=false
|
have_large_asid_64=false
|
||||||
have_lpae=false
|
have_lpae=false
|
||||||
|
@ -30,20 +30,20 @@ have_security=false
|
||||||
have_virtualization=false
|
have_virtualization=false
|
||||||
highest_el_is_64=false
|
highest_el_is_64=false
|
||||||
init_param=0
|
init_param=0
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
|
kernel=/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=268435455
|
load_addr_mask=268435455
|
||||||
load_offset=0
|
load_offset=2147483648
|
||||||
machine_type=RealView_PBX
|
machine_type=VExpress_EMM
|
||||||
mem_mode=atomic
|
mem_mode=atomic
|
||||||
mem_ranges=0:134217727
|
mem_ranges=2147483648:2415919103
|
||||||
memories=system.realview.nvmem system.physmem
|
memories=system.physmem system.realview.nvmem system.realview.vram
|
||||||
multi_proc=true
|
multi_proc=true
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
panic_on_oops=true
|
panic_on_oops=true
|
||||||
panic_on_panic=true
|
panic_on_panic=true
|
||||||
phys_addr_range_64=40
|
phys_addr_range_64=40
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
reset_addr_64=0
|
reset_addr_64=0
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -53,14 +53,14 @@ work_cpus_ckpt_count=0
|
||||||
work_end_ckpt_count=0
|
work_end_ckpt_count=0
|
||||||
work_end_exit_count=0
|
work_end_exit_count=0
|
||||||
work_item_id=-1
|
work_item_id=-1
|
||||||
system_port=system.membus.slave[0]
|
system_port=system.membus.slave[1]
|
||||||
|
|
||||||
[system.bridge]
|
[system.bridge]
|
||||||
type=Bridge
|
type=Bridge
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
delay=50000
|
delay=50000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ranges=268435456:520093695 1073741824:1610612735
|
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
|
||||||
req_size=16
|
req_size=16
|
||||||
resp_size=16
|
resp_size=16
|
||||||
master=system.iobus.slave[0]
|
master=system.iobus.slave[0]
|
||||||
|
@ -86,7 +86,7 @@ table_size=65536
|
||||||
[system.cf0.image.child]
|
[system.cf0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
|
image_file=/dist/disks/linux-aarch32-ael.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.clk_domain]
|
[system.clk_domain]
|
||||||
|
@ -278,6 +278,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu0.istage2_mmu]
|
[system.cpu0.istage2_mmu]
|
||||||
|
@ -428,6 +429,7 @@ id_mmfr3=34611729
|
||||||
id_pfr0=49
|
id_pfr0=49
|
||||||
id_pfr1=4113
|
id_pfr1=4113
|
||||||
midr=1091551472
|
midr=1091551472
|
||||||
|
pmu=Null
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.cpu1.istage2_mmu]
|
[system.cpu1.istage2_mmu]
|
||||||
|
@ -499,15 +501,16 @@ type=NoncoherentXBar
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
header_cycles=1
|
header_cycles=1
|
||||||
use_default_range=false
|
use_default_range=true
|
||||||
width=8
|
width=8
|
||||||
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
|
default=system.realview.pciconfig.pio
|
||||||
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
|
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
|
||||||
|
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
|
||||||
|
|
||||||
[system.iocache]
|
[system.iocache]
|
||||||
type=BaseCache
|
type=BaseCache
|
||||||
children=tags
|
children=tags
|
||||||
addr_ranges=0:134217727
|
addr_ranges=2147483648:2415919103
|
||||||
assoc=8
|
assoc=8
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
@ -526,8 +529,8 @@ tags=system.iocache.tags
|
||||||
tgts_per_mshr=12
|
tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.iobus.master[26]
|
cpu_side=system.iobus.master[27]
|
||||||
mem_side=system.membus.slave[2]
|
mem_side=system.membus.slave[3]
|
||||||
|
|
||||||
[system.iocache.tags]
|
[system.iocache.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -562,7 +565,7 @@ tgts_per_mshr=12
|
||||||
two_queue=false
|
two_queue=false
|
||||||
write_buffers=8
|
write_buffers=8
|
||||||
cpu_side=system.toL2Bus.master[0]
|
cpu_side=system.toL2Bus.master[0]
|
||||||
mem_side=system.membus.slave[1]
|
mem_side=system.membus.slave[2]
|
||||||
|
|
||||||
[system.l2c.tags]
|
[system.l2c.tags]
|
||||||
type=LRU
|
type=LRU
|
||||||
|
@ -585,8 +588,8 @@ system=system
|
||||||
use_default_range=false
|
use_default_range=false
|
||||||
width=8
|
width=8
|
||||||
default=system.membus.badaddr_responder.pio
|
default=system.membus.badaddr_responder.pio
|
||||||
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
|
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
|
||||||
slave=system.system_port system.l2c.mem_side system.iocache.mem_side
|
slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
|
||||||
|
|
||||||
[system.membus.badaddr_responder]
|
[system.membus.badaddr_responder]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
|
@ -616,47 +619,38 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=0:134217727
|
range=2147483648:2415919103
|
||||||
port=system.membus.master[6]
|
port=system.membus.master[5]
|
||||||
|
|
||||||
[system.realview]
|
[system.realview]
|
||||||
type=RealView
|
type=RealView
|
||||||
children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
|
children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
intrctrl=system.intrctrl
|
intrctrl=system.intrctrl
|
||||||
pci_cfg_base=0
|
pci_cfg_base=805306368
|
||||||
pci_cfg_gen_offsets=false
|
pci_cfg_gen_offsets=false
|
||||||
pci_io_base=0
|
pci_io_base=0
|
||||||
system=system
|
system=system
|
||||||
|
|
||||||
[system.realview.a9scu]
|
|
||||||
type=A9SCU
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
pio_addr=520093696
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.membus.master[4]
|
|
||||||
|
|
||||||
[system.realview.aaci_fake]
|
[system.realview.aaci_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
amba_id=0
|
amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268451840
|
pio_addr=470024192
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[21]
|
pio=system.iobus.master[18]
|
||||||
|
|
||||||
[system.realview.cf_ctrl]
|
[system.realview.cf_ctrl]
|
||||||
type=IdeController
|
type=IdeController
|
||||||
BAR0=402653184
|
BAR0=471465984
|
||||||
BAR0LegacyIO=true
|
BAR0LegacyIO=true
|
||||||
BAR0Size=16
|
BAR0Size=256
|
||||||
BAR1=402653440
|
BAR1=471466240
|
||||||
BAR1LegacyIO=true
|
BAR1LegacyIO=true
|
||||||
BAR1Size=1
|
BAR1Size=4096
|
||||||
BAR2=1
|
BAR2=1
|
||||||
BAR2LegacyIO=false
|
BAR2LegacyIO=false
|
||||||
BAR2Size=8
|
BAR2Size=8
|
||||||
|
@ -726,18 +720,18 @@ VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
config_latency=20000
|
config_latency=20000
|
||||||
ctrl_offset=2
|
ctrl_offset=2
|
||||||
disks=system.cf0
|
disks=
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
io_shift=1
|
io_shift=2
|
||||||
pci_bus=2
|
pci_bus=2
|
||||||
pci_dev=7
|
pci_dev=0
|
||||||
pci_func=0
|
pci_func=0
|
||||||
pio_latency=30000
|
pio_latency=30000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
config=system.iobus.master[8]
|
config=system.iobus.master[9]
|
||||||
dma=system.iobus.slave[2]
|
dma=system.iobus.slave[2]
|
||||||
pio=system.iobus.master[7]
|
pio=system.iobus.master[8]
|
||||||
|
|
||||||
[system.realview.clcd]
|
[system.realview.clcd]
|
||||||
type=Pl111
|
type=Pl111
|
||||||
|
@ -746,8 +740,8 @@ clk_domain=system.clk_domain
|
||||||
enable_capture=true
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num=55
|
int_num=46
|
||||||
pio_addr=268566528
|
pio_addr=471793664
|
||||||
pio_latency=10000
|
pio_latency=10000
|
||||||
pixel_clock=41667
|
pixel_clock=41667
|
||||||
system=system
|
system=system
|
||||||
|
@ -755,51 +749,129 @@ vnc=system.vncserver
|
||||||
dma=system.iobus.slave[1]
|
dma=system.iobus.slave[1]
|
||||||
pio=system.iobus.master[4]
|
pio=system.iobus.master[4]
|
||||||
|
|
||||||
[system.realview.dmac_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268632064
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[9]
|
|
||||||
|
|
||||||
[system.realview.energy_ctrl]
|
[system.realview.energy_ctrl]
|
||||||
type=EnergyCtrl
|
type=EnergyCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
dvfs_handler=system.dvfs_handler
|
dvfs_handler=system.dvfs_handler
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
pio_addr=268496896
|
pio_addr=470286336
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
|
pio=system.iobus.master[22]
|
||||||
|
|
||||||
|
[system.realview.ethernet]
|
||||||
|
type=IGbE
|
||||||
|
BAR0=0
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=131072
|
||||||
|
BAR1=0
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=0
|
||||||
|
BAR2=0
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=0
|
||||||
|
BAR3=0
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=0
|
||||||
|
BAR4=0
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=0
|
||||||
|
BAR5=0
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=2
|
||||||
|
Command=0
|
||||||
|
DeviceID=4213
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=1
|
||||||
|
InterruptPin=1
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=255
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=0
|
||||||
|
Revision=0
|
||||||
|
Status=0
|
||||||
|
SubClassCode=0
|
||||||
|
SubsystemID=4104
|
||||||
|
SubsystemVendorID=32902
|
||||||
|
VendorID=32902
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
eventq_index=0
|
||||||
|
fetch_comp_delay=10000
|
||||||
|
fetch_delay=10000
|
||||||
|
hardware_address=00:90:00:00:00:01
|
||||||
|
pci_bus=0
|
||||||
|
pci_dev=0
|
||||||
|
pci_func=0
|
||||||
|
phy_epid=896
|
||||||
|
phy_pid=680
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
rx_desc_cache_size=64
|
||||||
|
rx_fifo_size=393216
|
||||||
|
rx_write_delay=0
|
||||||
|
system=system
|
||||||
|
tx_desc_cache_size=64
|
||||||
|
tx_fifo_size=393216
|
||||||
|
tx_read_delay=0
|
||||||
|
wb_comp_delay=10000
|
||||||
|
wb_delay=10000
|
||||||
|
config=system.iobus.master[26]
|
||||||
|
dma=system.iobus.slave[4]
|
||||||
pio=system.iobus.master[25]
|
pio=system.iobus.master[25]
|
||||||
|
|
||||||
[system.realview.flash_fake]
|
[system.realview.generic_timer]
|
||||||
type=IsaFake
|
type=GenericTimer
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=true
|
gic=system.realview.gic
|
||||||
pio_addr=1073741824
|
int_num=29
|
||||||
pio_latency=100000
|
|
||||||
pio_size=536870912
|
|
||||||
ret_bad_addr=false
|
|
||||||
ret_data16=65535
|
|
||||||
ret_data32=4294967295
|
|
||||||
ret_data64=18446744073709551615
|
|
||||||
ret_data8=255
|
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
|
||||||
warn_access=
|
|
||||||
pio=system.iobus.master[24]
|
|
||||||
|
|
||||||
[system.realview.gic]
|
[system.realview.gic]
|
||||||
type=Pl390
|
type=Pl390
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
cpu_addr=520093952
|
cpu_addr=738205696
|
||||||
cpu_pio_delay=10000
|
cpu_pio_delay=10000
|
||||||
dist_addr=520097792
|
dist_addr=738201600
|
||||||
dist_pio_delay=10000
|
dist_pio_delay=10000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
int_latency=10000
|
int_latency=10000
|
||||||
|
@ -809,38 +881,111 @@ platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[2]
|
pio=system.membus.master[2]
|
||||||
|
|
||||||
[system.realview.gpio0_fake]
|
[system.realview.hdlcd]
|
||||||
type=AmbaFake
|
type=HDLcd
|
||||||
amba_id=0
|
amba_id=1314816
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
enable_capture=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
gic=system.realview.gic
|
||||||
pio_addr=268513280
|
int_num=117
|
||||||
pio_latency=100000
|
pio_addr=721420288
|
||||||
|
pio_latency=10000
|
||||||
|
pixel_clock=7299
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[16]
|
vnc=system.vncserver
|
||||||
|
dma=system.membus.slave[0]
|
||||||
|
pio=system.iobus.master[5]
|
||||||
|
|
||||||
[system.realview.gpio1_fake]
|
[system.realview.ide]
|
||||||
type=AmbaFake
|
type=IdeController
|
||||||
amba_id=0
|
BAR0=1
|
||||||
|
BAR0LegacyIO=false
|
||||||
|
BAR0Size=8
|
||||||
|
BAR1=1
|
||||||
|
BAR1LegacyIO=false
|
||||||
|
BAR1Size=4
|
||||||
|
BAR2=1
|
||||||
|
BAR2LegacyIO=false
|
||||||
|
BAR2Size=8
|
||||||
|
BAR3=1
|
||||||
|
BAR3LegacyIO=false
|
||||||
|
BAR3Size=4
|
||||||
|
BAR4=1
|
||||||
|
BAR4LegacyIO=false
|
||||||
|
BAR4Size=16
|
||||||
|
BAR5=1
|
||||||
|
BAR5LegacyIO=false
|
||||||
|
BAR5Size=0
|
||||||
|
BIST=0
|
||||||
|
CacheLineSize=0
|
||||||
|
CapabilityPtr=0
|
||||||
|
CardbusCIS=0
|
||||||
|
ClassCode=1
|
||||||
|
Command=0
|
||||||
|
DeviceID=28945
|
||||||
|
ExpansionROM=0
|
||||||
|
HeaderType=0
|
||||||
|
InterruptLine=2
|
||||||
|
InterruptPin=2
|
||||||
|
LatencyTimer=0
|
||||||
|
LegacyIOBase=0
|
||||||
|
MSICAPBaseOffset=0
|
||||||
|
MSICAPCapId=0
|
||||||
|
MSICAPMaskBits=0
|
||||||
|
MSICAPMsgAddr=0
|
||||||
|
MSICAPMsgCtrl=0
|
||||||
|
MSICAPMsgData=0
|
||||||
|
MSICAPMsgUpperAddr=0
|
||||||
|
MSICAPNextCapability=0
|
||||||
|
MSICAPPendingBits=0
|
||||||
|
MSIXCAPBaseOffset=0
|
||||||
|
MSIXCAPCapId=0
|
||||||
|
MSIXCAPNextCapability=0
|
||||||
|
MSIXMsgCtrl=0
|
||||||
|
MSIXPbaOffset=0
|
||||||
|
MSIXTableOffset=0
|
||||||
|
MaximumLatency=0
|
||||||
|
MinimumGrant=0
|
||||||
|
PMCAPBaseOffset=0
|
||||||
|
PMCAPCapId=0
|
||||||
|
PMCAPCapabilities=0
|
||||||
|
PMCAPCtrlStatus=0
|
||||||
|
PMCAPNextCapability=0
|
||||||
|
PXCAPBaseOffset=0
|
||||||
|
PXCAPCapId=0
|
||||||
|
PXCAPCapabilities=0
|
||||||
|
PXCAPDevCap2=0
|
||||||
|
PXCAPDevCapabilities=0
|
||||||
|
PXCAPDevCtrl=0
|
||||||
|
PXCAPDevCtrl2=0
|
||||||
|
PXCAPDevStatus=0
|
||||||
|
PXCAPLinkCap=0
|
||||||
|
PXCAPLinkCtrl=0
|
||||||
|
PXCAPLinkStatus=0
|
||||||
|
PXCAPNextCapability=0
|
||||||
|
ProgIF=133
|
||||||
|
Revision=0
|
||||||
|
Status=640
|
||||||
|
SubClassCode=1
|
||||||
|
SubsystemID=0
|
||||||
|
SubsystemVendorID=0
|
||||||
|
VendorID=32902
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
|
config_latency=20000
|
||||||
|
ctrl_offset=0
|
||||||
|
disks=system.cf0
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
io_shift=0
|
||||||
pio_addr=268517376
|
pci_bus=0
|
||||||
pio_latency=100000
|
pci_dev=1
|
||||||
|
pci_func=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[17]
|
config=system.iobus.master[24]
|
||||||
|
dma=system.iobus.slave[3]
|
||||||
[system.realview.gpio2_fake]
|
pio=system.iobus.master[23]
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268521472
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[18]
|
|
||||||
|
|
||||||
[system.realview.kmi0]
|
[system.realview.kmi0]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -849,13 +994,13 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=52
|
int_num=44
|
||||||
is_mouse=false
|
is_mouse=false
|
||||||
pio_addr=268460032
|
pio_addr=470155264
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[5]
|
pio=system.iobus.master[6]
|
||||||
|
|
||||||
[system.realview.kmi1]
|
[system.realview.kmi1]
|
||||||
type=Pl050
|
type=Pl050
|
||||||
|
@ -864,20 +1009,20 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=1000000
|
int_delay=1000000
|
||||||
int_num=53
|
int_num=45
|
||||||
is_mouse=true
|
is_mouse=true
|
||||||
pio_addr=268464128
|
pio_addr=470220800
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
vnc=system.vncserver
|
vnc=system.vncserver
|
||||||
pio=system.iobus.master[6]
|
pio=system.iobus.master[7]
|
||||||
|
|
||||||
[system.realview.l2x0_fake]
|
[system.realview.l2x0_fake]
|
||||||
type=IsaFake
|
type=IsaFake
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
fake_mem=false
|
fake_mem=false
|
||||||
pio_addr=520101888
|
pio_addr=739246080
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
pio_size=4095
|
pio_size=4095
|
||||||
ret_bad_addr=false
|
ret_bad_addr=false
|
||||||
|
@ -888,7 +1033,25 @@ ret_data8=255
|
||||||
system=system
|
system=system
|
||||||
update_data=false
|
update_data=false
|
||||||
warn_access=
|
warn_access=
|
||||||
pio=system.membus.master[3]
|
pio=system.iobus.master[12]
|
||||||
|
|
||||||
|
[system.realview.lan_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=436207616
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=65535
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[19]
|
||||||
|
|
||||||
[system.realview.local_cpu_timer]
|
[system.realview.local_cpu_timer]
|
||||||
type=CpuLocalTimer
|
type=CpuLocalTimer
|
||||||
|
@ -897,10 +1060,10 @@ eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num_timer=29
|
int_num_timer=29
|
||||||
int_num_watchdog=30
|
int_num_watchdog=30
|
||||||
pio_addr=520095232
|
pio_addr=738721792
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.membus.master[5]
|
pio=system.membus.master[3]
|
||||||
|
|
||||||
[system.realview.mmc_fake]
|
[system.realview.mmc_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -908,10 +1071,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268455936
|
pio_addr=470089728
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[22]
|
pio=system.iobus.master[21]
|
||||||
|
|
||||||
[system.realview.nvmem]
|
[system.realview.nvmem]
|
||||||
type=SimpleMemory
|
type=SimpleMemory
|
||||||
|
@ -923,18 +1086,30 @@ in_addr_map=true
|
||||||
latency=30000
|
latency=30000
|
||||||
latency_var=0
|
latency_var=0
|
||||||
null=false
|
null=false
|
||||||
range=2147483648:2214592511
|
range=0:67108863
|
||||||
port=system.membus.master[1]
|
port=system.membus.master[1]
|
||||||
|
|
||||||
|
[system.realview.pciconfig]
|
||||||
|
type=PciConfigAll
|
||||||
|
bus=0
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
pio_addr=0
|
||||||
|
pio_latency=30000
|
||||||
|
platform=system.realview
|
||||||
|
size=268435456
|
||||||
|
system=system
|
||||||
|
pio=system.iobus.default
|
||||||
|
|
||||||
[system.realview.realview_io]
|
[system.realview.realview_io]
|
||||||
type=RealViewCtrl
|
type=RealViewCtrl
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
idreg=0
|
idreg=35979264
|
||||||
pio_addr=268435456
|
pio_addr=469827584
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
proc_id0=201326592
|
proc_id0=335544320
|
||||||
proc_id1=201327138
|
proc_id1=335544320
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[1]
|
pio=system.iobus.master[1]
|
||||||
|
|
||||||
|
@ -945,34 +1120,12 @@ clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=42
|
int_num=36
|
||||||
pio_addr=268529664
|
pio_addr=471269376
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
time=Thu Jan 1 00:00:00 2009
|
time=Thu Jan 1 00:00:00 2009
|
||||||
pio=system.iobus.master[23]
|
pio=system.iobus.master[10]
|
||||||
|
|
||||||
[system.realview.sci_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268492800
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[20]
|
|
||||||
|
|
||||||
[system.realview.smc_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=269357056
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[13]
|
|
||||||
|
|
||||||
[system.realview.sp810_fake]
|
[system.realview.sp810_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -980,21 +1133,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=true
|
ignore_access=true
|
||||||
pio_addr=268439552
|
pio_addr=469893120
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[14]
|
pio=system.iobus.master[16]
|
||||||
|
|
||||||
[system.realview.ssp_fake]
|
|
||||||
type=AmbaFake
|
|
||||||
amba_id=0
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
ignore_access=false
|
|
||||||
pio_addr=268488704
|
|
||||||
pio_latency=100000
|
|
||||||
system=system
|
|
||||||
pio=system.iobus.master[19]
|
|
||||||
|
|
||||||
[system.realview.timer0]
|
[system.realview.timer0]
|
||||||
type=Sp804
|
type=Sp804
|
||||||
|
@ -1004,9 +1146,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=36
|
int_num0=34
|
||||||
int_num1=36
|
int_num1=34
|
||||||
pio_addr=268505088
|
pio_addr=470876160
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[2]
|
pio=system.iobus.master[2]
|
||||||
|
@ -1019,9 +1161,9 @@ clock0=1000000
|
||||||
clock1=1000000
|
clock1=1000000
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_num0=37
|
int_num0=35
|
||||||
int_num1=37
|
int_num1=35
|
||||||
pio_addr=268509184
|
pio_addr=470941696
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[3]
|
pio=system.iobus.master[3]
|
||||||
|
@ -1033,8 +1175,8 @@ end_on_eot=false
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
gic=system.realview.gic
|
gic=system.realview.gic
|
||||||
int_delay=100000
|
int_delay=100000
|
||||||
int_num=44
|
int_num=37
|
||||||
pio_addr=268472320
|
pio_addr=470351872
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
platform=system.realview
|
platform=system.realview
|
||||||
system=system
|
system=system
|
||||||
|
@ -1047,10 +1189,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268476416
|
pio_addr=470417408
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[10]
|
pio=system.iobus.master[13]
|
||||||
|
|
||||||
[system.realview.uart2_fake]
|
[system.realview.uart2_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1058,10 +1200,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268480512
|
pio_addr=470482944
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[11]
|
pio=system.iobus.master[14]
|
||||||
|
|
||||||
[system.realview.uart3_fake]
|
[system.realview.uart3_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1069,10 +1211,54 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268484608
|
pio_addr=470548480
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[12]
|
pio=system.iobus.master[15]
|
||||||
|
|
||||||
|
[system.realview.usb_fake]
|
||||||
|
type=IsaFake
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
fake_mem=false
|
||||||
|
pio_addr=452984832
|
||||||
|
pio_latency=100000
|
||||||
|
pio_size=131071
|
||||||
|
ret_bad_addr=false
|
||||||
|
ret_data16=65535
|
||||||
|
ret_data32=4294967295
|
||||||
|
ret_data64=18446744073709551615
|
||||||
|
ret_data8=255
|
||||||
|
system=system
|
||||||
|
update_data=false
|
||||||
|
warn_access=
|
||||||
|
pio=system.iobus.master[20]
|
||||||
|
|
||||||
|
[system.realview.vgic]
|
||||||
|
type=VGic
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
eventq_index=0
|
||||||
|
gic=system.realview.gic
|
||||||
|
hv_addr=738213888
|
||||||
|
pio_delay=10000
|
||||||
|
platform=system.realview
|
||||||
|
ppint=25
|
||||||
|
system=system
|
||||||
|
vcpu_addr=738222080
|
||||||
|
pio=system.membus.master[4]
|
||||||
|
|
||||||
|
[system.realview.vram]
|
||||||
|
type=SimpleMemory
|
||||||
|
bandwidth=73.000000
|
||||||
|
clk_domain=system.clk_domain
|
||||||
|
conf_table_reported=false
|
||||||
|
eventq_index=0
|
||||||
|
in_addr_map=true
|
||||||
|
latency=30000
|
||||||
|
latency_var=0
|
||||||
|
null=false
|
||||||
|
range=402653184:436207615
|
||||||
|
port=system.iobus.master[11]
|
||||||
|
|
||||||
[system.realview.watchdog_fake]
|
[system.realview.watchdog_fake]
|
||||||
type=AmbaFake
|
type=AmbaFake
|
||||||
|
@ -1080,10 +1266,10 @@ amba_id=0
|
||||||
clk_domain=system.clk_domain
|
clk_domain=system.clk_domain
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
ignore_access=false
|
ignore_access=false
|
||||||
pio_addr=268500992
|
pio_addr=470745088
|
||||||
pio_latency=100000
|
pio_latency=100000
|
||||||
system=system
|
system=system
|
||||||
pio=system.iobus.master[15]
|
pio=system.iobus.master[17]
|
||||||
|
|
||||||
[system.terminal]
|
[system.terminal]
|
||||||
type=Terminal
|
type=Terminal
|
||||||
|
|
|
@ -1,16 +1,35 @@
|
||||||
warn: Sockets disabled, not accepting vnc client connections
|
warn: Sockets disabled, not accepting vnc client connections
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
|
||||||
|
warn: Not doing anything for miscreg ACTLR
|
||||||
|
warn: Not doing anything for write of miscreg ACTLR
|
||||||
warn: The clidr register always reports 0 caches.
|
warn: The clidr register always reports 0 caches.
|
||||||
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
warn: clidr LoUIS field of 0b001 to match current ARM implementations.
|
||||||
warn: The csselr register isn't implemented.
|
warn: The csselr register isn't implemented.
|
||||||
warn: The ccsidr register isn't implemented and always reads as 0.
|
warn: instruction 'mcr dccmvau' unimplemented
|
||||||
|
warn: instruction 'mcr icimvau' unimplemented
|
||||||
warn: instruction 'mcr bpiallis' unimplemented
|
warn: instruction 'mcr bpiallis' unimplemented
|
||||||
warn: instruction 'mcr icialluis' unimplemented
|
warn: instruction 'mcr icialluis' unimplemented
|
||||||
warn: instruction 'mcr dccimvac' unimplemented
|
warn: instruction 'mcr dccimvac' unimplemented
|
||||||
warn: instruction 'mcr dccmvau' unimplemented
|
warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
|
||||||
warn: instruction 'mcr icimvau' unimplemented
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
warn: LCD dual screen mode not supported
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
|
||||||
|
warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
|
||||||
|
warn: Returning zero for read from miscreg pmcr
|
||||||
|
warn: Ignoring write to miscreg pmcntenclr
|
||||||
|
warn: Ignoring write to miscreg pmintenclr
|
||||||
|
warn: Ignoring write to miscreg pmovsr
|
||||||
|
warn: Ignoring write to miscreg pmcr
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
warn: User mode does not have SPSR
|
warn: User mode does not have SPSR
|
||||||
|
|
|
@ -1,10 +1,10 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 23 2014 12:08:08
|
gem5 compiled Oct 29 2014 15:46:15
|
||||||
gem5 started Jan 23 2014 17:10:38
|
gem5 started Oct 29 2014 16:00:04
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic
|
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
0: system.cpu0.isa: ISA system set to: 0x56d2400 0x56d2400
|
0: system.cpu0.isa: ISA system set to: 0x50c1b00 0x50c1b00
|
||||||
0: system.cpu1.isa: ISA system set to: 0x56d2400 0x56d2400
|
0: system.cpu1.isa: ISA system set to: 0x50c1b00 0x50c1b00
|
||||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -20,7 +20,7 @@ eventq_index=0
|
||||||
init_param=0
|
init_param=0
|
||||||
intel_mp_pointer=system.intel_mp_pointer
|
intel_mp_pointer=system.intel_mp_pointer
|
||||||
intel_mp_table=system.intel_mp_table
|
intel_mp_table=system.intel_mp_table
|
||||||
kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
|
kernel=/dist/binaries/x86_64-vmlinux-2.6.22.9
|
||||||
kernel_addr_check=true
|
kernel_addr_check=true
|
||||||
load_addr_mask=18446744073709551615
|
load_addr_mask=18446744073709551615
|
||||||
load_offset=0
|
load_offset=0
|
||||||
|
@ -28,7 +28,7 @@ mem_mode=timing
|
||||||
mem_ranges=0:134217727
|
mem_ranges=0:134217727
|
||||||
memories=system.physmem
|
memories=system.physmem
|
||||||
num_work_ids=16
|
num_work_ids=16
|
||||||
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
|
readfile=/work/gem5.latest/tests/halt.sh
|
||||||
smbios_table=system.smbios_table
|
smbios_table=system.smbios_table
|
||||||
symbolfile=
|
symbolfile=
|
||||||
work_begin_ckpt_count=0
|
work_begin_ckpt_count=0
|
||||||
|
@ -1180,7 +1180,7 @@ table_size=65536
|
||||||
[system.pc.south_bridge.ide.disks0.image.child]
|
[system.pc.south_bridge.ide.disks0.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
|
image_file=/dist/disks/linux-x86.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.pc.south_bridge.ide.disks1]
|
[system.pc.south_bridge.ide.disks1]
|
||||||
|
@ -1203,7 +1203,7 @@ table_size=65536
|
||||||
[system.pc.south_bridge.ide.disks1.image.child]
|
[system.pc.south_bridge.ide.disks1.image.child]
|
||||||
type=RawDiskImage
|
type=RawDiskImage
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
|
image_file=/dist/disks/linux-bigswap2.img
|
||||||
read_only=true
|
read_only=true
|
||||||
|
|
||||||
[system.pc.south_bridge.int_lines0]
|
[system.pc.south_bridge.int_lines0]
|
||||||
|
@ -1427,6 +1427,7 @@ clk_domain=system.clk_domain
|
||||||
conf_table_reported=true
|
conf_table_reported=true
|
||||||
device_bus_width=8
|
device_bus_width=8
|
||||||
device_rowbuffer_size=1024
|
device_rowbuffer_size=1024
|
||||||
|
device_size=536870912
|
||||||
devices_per_rank=8
|
devices_per_rank=8
|
||||||
dll=true
|
dll=true
|
||||||
eventq_index=0
|
eventq_index=0
|
||||||
|
|
|
@ -1,3 +1,4 @@
|
||||||
|
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
|
||||||
warn: Sockets disabled, not accepting terminal connections
|
warn: Sockets disabled, not accepting terminal connections
|
||||||
warn: Reading current count from inactive timer.
|
warn: Reading current count from inactive timer.
|
||||||
warn: Sockets disabled, not accepting gdb connections
|
warn: Sockets disabled, not accepting gdb connections
|
||||||
|
|
|
@ -1,12 +1,12 @@
|
||||||
gem5 Simulator System. http://gem5.org
|
gem5 Simulator System. http://gem5.org
|
||||||
gem5 is copyrighted software; use the --copyright option for details.
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
gem5 compiled Jan 22 2014 17:10:34
|
gem5 compiled Oct 29 2014 09:18:07
|
||||||
gem5 started Jan 22 2014 17:30:19
|
gem5 started Oct 29 2014 09:26:24
|
||||||
gem5 executing on u200540-lin
|
gem5 executing on u200540-lin
|
||||||
command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing -re tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
|
command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing -re /work/gem5.latest/tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
|
||||||
Global frequency set at 1000000000000 ticks per second
|
Global frequency set at 1000000000000 ticks per second
|
||||||
info: kernel located at: /dist/binaries/x86_64-vmlinux-2.6.22.9
|
info: kernel located at: /dist/binaries/x86_64-vmlinux-2.6.22.9
|
||||||
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
|
||||||
info: Entering event queue @ 0. Starting simulation...
|
info: Entering event queue @ 0. Starting simulation...
|
||||||
Exiting @ tick 5196390180000 because m5_exit instruction encountered
|
Exiting @ tick 5194410635000 because m5_exit instruction encountered
|
||||||
|
|
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