Print ports in config.ini as well.
--HG-- extra : convert_revision : 703d3a57250613315735709de8f40a9956cee6e2
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2 changed files with 21 additions and 0 deletions
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@ -604,6 +604,20 @@ class SimObject(object):
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setattr(self, param, value)
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setattr(self, param, value)
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print '%s=%s' % (param, self._values[param].ini_str())
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print '%s=%s' % (param, self._values[param].ini_str())
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port_names = self._ports.keys()
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port_names.sort()
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for port_name in port_names:
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port = self._port_map.get(port_name, None)
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if port == None:
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default = getattr(self._ports[port_name], 'default', None)
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if default == None:
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# port is unbound... that's OK, go to next port
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continue
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else:
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print port_name, default
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port = m5.makeList(port) # make list even if it's a scalar port
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print '%s=%s' % (port_name, ' '.join([str(p) for p in port]))
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print # blank line between objects
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print # blank line between objects
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for child in child_names:
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for child in child_names:
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@ -722,3 +736,4 @@ __all__ = ['SimObject', 'ParamContext']
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# see comment on imports at end of __init__.py.
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# see comment on imports at end of __init__.py.
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import proxy
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import proxy
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import cc_main
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import cc_main
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import m5
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@ -761,6 +761,12 @@ class PortRef(object):
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self.peer = None # not associated with another port yet
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self.peer = None # not associated with another port yet
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self.ccConnected = False # C++ port connection done?
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self.ccConnected = False # C++ port connection done?
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def __str__(self):
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ext = ''
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if self.isVec:
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ext = '[%d]' % self.index
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return '%s.%s%s' % (self.simobj.path(), self.name, ext)
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# Set peer port reference. Called via __setattr__ as a result of
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# Set peer port reference. Called via __setattr__ as a result of
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# a port assignment, e.g., "obj1.port1 = obj2.port2".
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# a port assignment, e.g., "obj1.port1 = obj2.port2".
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def setPeer(self, other):
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def setPeer(self, other):
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